JPH1127612A - Image display device, image transfer method and storage medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an image display device, image transfer method and storage medium by which de-framing 'through-display' is attained and power consumption at the 'through-display' is reduced by writing image data transferred from a YUV processor to an image memory at an interval of several frames and transferring the written data to a video encoder. SOLUTION: A memory controller 5 executes DMA transfer processing of YUV data and transfer processing of the data to a video encoder, starts data processing in response to a DMA transfer start signal received in a frame synchronization interrupt timing from a CPU 8, and writes in an image memory 6 the YUV data in the unit of frames received by a CCD 2 via a YUV processor 4 at an interval of several frames. The controller 5 reads the YUV data from the image memory 6 at an interval of several frames and transfers the data to a video encoder 11, by which the deframed monitor image is displayed on a liquid crystal display module 12.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image transfer method, an image display device, and a storage medium for transferring image data when through display is performed from captured color image data.

[0002]

2. Description of the Related Art Conventionally, in a digital camera or the like, image data for one frame imaged by an image pickup device such as a CCD (Charge Coupled Device) is YUV.
After the color process processing (color calculation processing) is performed by the processor, the data is written in the image memory. And that C
Importing image data from a CD and transferring the image data written to the image memory after being color-processed by the YUV processor to the video encoder frame by frame, thereby displaying a through image on the display unit. Can be. For example, one frame of image data is 1/3
If it is captured in 0 seconds, a through display of 30 frames per second can be performed.

That is, in a conventional digital camera having a display function, in order to confirm an image of a subject taken from an image pickup device before photographing, image data taken at several tens of frames per second from the CCD is used for each frame. Some of them have a function of processing by a video encoder and displaying a through display on a display unit.

[0004]

However, in such a digital camera having such a conventional display function, in order to confirm an image of a subject taken in from an image pickup device before taking a picture, a second time is required from the CCD. It had a function to process image data captured at tens of frames per frame with a video encoder for each frame and display it through on the display unit, but if the image data captured at tens of frames per second is displayed as it is, Although a smooth monitor image display can be obtained, a smooth monitor image is not always necessary if only the image of the subject to be photographed is checked, which is disadvantageous in terms of power consumption for displaying the monitor image. There was a problem.

[0005] An object of the present invention is to write image data transferred from a YUV processor into an image memory every few frames and transfer the image data to a video encoder, thereby enabling frame-by-frame display. An object of the present invention is to provide an image transfer method, an image display device, and a storage medium capable of suppressing power consumption.

[0006]

According to the first aspect of the present invention,
Image generating means for sequentially generating one screen of image data from an input image, image storing means for storing one screen of image data generated by the image generating means, and one screen stored in the image storing means Image display control means for reading image data for one screen and displaying the image data on a display means, wherein one image data for one screen is sequentially generated by the image generation means, and is output once for a plurality of frames. Image transfer control means for controlling the image data to be transferred to and stored in the image storage means at a ratio.

According to the first aspect of the present invention, an image generating means for sequentially generating one screen of image data from an input image, and an image for storing one screen of image data generated by the image generating means. An image display device comprising: a storage unit; and an image display control unit that reads image data for one screen stored in the image storage unit and displays the image data on a display unit. Of the image data for one screen sequentially generated by
The image data is controlled to be transferred to and stored in the image storage means once in a plurality of frames.

According to a fourth aspect of the present invention, one screen of image data sequentially generated from an input image is transferred to an image storage means and stored, and then the image data is read out from the image storage means to read one screen of image data. An image transfer method for controlling transfer of the sequentially generated image data for one screen to the image storage unit when displaying image data on a display unit,
It is characterized in that the image data is controlled so as to be transferred to the image storage means and stored at a rate of once in a plurality of frames out of the image data for one screen which is sequentially generated.

According to the fourth aspect of the present invention, after one screen of image data sequentially generated from the input image is transferred to the image storage means and stored therein, the image data is read out from the image storage means and read. When displaying the image data for one screen on the display means, in the image transfer method for controlling the transfer of the image data for one screen generated sequentially to the image storage means, the image data for one screen generated sequentially is displayed. The image data is controlled to be transferred to and stored in the image storage means at a rate of once in a plurality of frames.

[0010] Therefore, it is possible to perform the through display by dropping the frame of the image data generated from the input image, and it is possible to reduce the power consumption when the input image is displayed through.

According to a second aspect of the present invention, there is provided an image generating means for sequentially generating one screen of image data from an input image, and an image storing means for storing one screen of image data generated by the image generating means. An image display control means for reading out one screen of image data stored in the image storage means and displaying the image data on a display means. Image generation control means for controlling generation of image data for one screen at a time rate; and when the image generation means generates image data in the image generation means, the generated image data is Image transfer control means for controlling transfer to the image storage means,
It is characterized by having.

According to the second aspect of the present invention, an image generating means for sequentially generating one screen of image data from an input image, and an image for storing one screen of image data generated by the image generating means. An image display device comprising: a storage unit; and an image display control unit that reads image data for one screen stored in the image storage unit and displays the image data on a display unit. And controlling the image data for one screen from the input image at a rate of once in a plurality of frames, and the image transfer control means generates the image data in the image generation means by the image generation control means. Sometimes
The generated image data is controlled to be transferred to the image storage means.

According to a fifth aspect of the present invention, after one screen of image data sequentially generated from an input image is transferred to and stored in an image storage means, the image data is read out from the image storage means to read one screen of image data. An image transfer method for controlling transfer of the sequentially generated image data for one screen to the image storage unit when displaying image data on a display unit,
Controlling the image data for one screen from the input image once in a plurality of frames; and when the image data is generated by the image generation control, the generated image data is stored in the image storage means. It is characterized in that it is controlled so that it is transferred to

According to the fifth aspect of the present invention, one screen of image data sequentially generated from the input image is transferred to the image storage means and stored, and then the image data is read out from the image storage means and read. In the image transfer method for controlling the transfer of the sequentially generated image data for one screen to the image storage means when displaying the image data for one screen on the display means, once from the input image to a plurality of frames. Is controlled so as to generate image data for one screen at a rate of .times., And when the image data is generated by the image generation control, the generated image data is controlled to be transferred to the image storage means.

Therefore, it is possible to perform the through display without dropping the image data generated from the input image, and it is possible to further reduce the power consumption when the input image is displayed through.

According to a third aspect of the present invention, in the image display device according to the first or second aspect, a plurality of image storage areas for storing the image data of a plurality of screens are set in the image storage means, and One image storage area of the image storage areas is set as a transfer image area for transferring image data by the image transfer control unit, and one image storage area different from the transfer image area among the plurality of image storage areas is set. When the image display control means sets image data to be displayed as a display image area to be displayed, and when the image transfer control means completes the transfer of one screen of image data to the transfer image area, the transfer image transfer is completed. The transfer image area is changed to one of the plurality of image storage areas different from the area, and the image display control means transfers the image data of one screen. When the display to indicate unit is completed, it is effective to change the transfer image area where the transfer is completed in the display image area.

According to the third aspect of the present invention, a plurality of image storage areas for storing the image data for a plurality of screens are set in the image storage means, and one image storage area of the plurality of image storage areas is stored. An area is set as a transfer image area for transferring image data by the image transfer control means, and one image storage area of the plurality of image storage areas, which is different from the transfer image area, is assigned image data by the image display control means. When the transfer of one screen of image data to the transfer image area is completed by the image transfer control unit, the plurality of image storages different from the transfer image area in which the transfer has been completed are set as display image areas to be displayed. The transfer image area is changed to one of the areas, and when the display of the image data for one screen on the display means is completed by the image display control means, the transfer is performed. But to change the transfer image area ended in the display image area.

Therefore, the writing area and the reading area of the image data generated from the input image can be set so that the display timing of the image data for each frame on the display means does not collapse.

According to a sixth aspect of the present invention, there is provided a storage medium storing a computer readable program for storing image data generated from an input image in an image storage means and displaying the image data. A program code for sequentially generating image data for one screen, and one of the sequentially generated image data for one screen,
A program code for transferring and storing the image data to the image storage means at a rate of one time, and a program code for reading out one screen of image data stored in the image storage means and displaying the image data on the display means are stored. It is characterized by doing.

According to the sixth aspect of the present invention, there is provided a storage medium storing a computer readable program for storing and displaying image data generated from an input image in an image storage means. A program code for sequentially generating one screen of image data from an image, and transferring the image data to the image storage means at a rate of once in a plurality of frames out of the sequentially generated one screen image data. A program code to be stored and a program code to read out one screen of image data stored in the image storage unit and display the image data on the display unit are stored.

Therefore, by reading and executing the program stored in the storage medium by the computer, it is possible to display the image data generated from the input image in a frame-by-frame manner. Power consumption can be reduced.

According to a seventh aspect of the present invention, there is provided a storage medium storing a computer-readable program for storing image data generated from an input image in an image storage means and displaying the image data. A program code for generating one screen of image data once in a plurality of frames and, when the image data is generated, transferring the generated one screen of image data to the image storage means for storage. It is characterized by storing a program code and a program code for reading out image data for one screen stored in the image storage means and displaying it on a display means.

According to the seventh aspect of the present invention, there is provided a storage medium storing a computer-readable program for storing and displaying image data generated from an input image in an image storage means. A program code for generating one screen of image data once per a plurality of frames from an input image, and when the image data is generated, transferring the generated one screen of image data to the image storage means. And a program code for reading image data for one screen stored in the image storage means and displaying the image data on the display means.

Therefore, by reading and executing the program stored in the storage medium by the computer, the through-display can be performed without dropping the image data generated from the input image. The power consumption at the time of expression can be further suppressed.

[0025]

Embodiments of the present invention will be described below in detail with reference to the drawings.

(First Embodiment) FIGS. 1 to 7 show a digital camera according to a first embodiment to which an image display device and an image display method according to the present invention are applied.

First, the configuration will be described.

FIG. 1 is a block diagram showing a main configuration of a digital camera 1 according to the first embodiment. In FIG. 1, a digital camera 1 includes a CCD 2, a CCD control unit 3, a YUV processor 4, a memory controller 5, an image memory 6, a key processing unit 7, a CPU 8, a ROM 9, a storage medium 10, a video encoder 11, and a liquid crystal module 12.
It consists of.

The CCD (Charge Coupled Device) 2 is
A pixel surface in which a large number of elements (pixels) each having a transfer electrode superposed on a light receiving unit such as a photodiode are arranged in a plane, and an output unit having a buffer that converts charges accumulated in each pixel into a voltage and outputs the voltage. Consists of In the CCD 2, light incident through an unillustrated imaging lens (not shown) is received by the pixel surface, and charges proportional to the amount of received light are accumulated in each pixel. The accumulated charge of each pixel is sequentially read out as an electric signal for each pixel by the output unit in accordance with a drive signal supplied from the CCD control unit 3, and is output as an image signal (analog signal) via a buffer to the CCD control unit. 3 is output.

The CCD control unit 3 performs A / D (Analog to D-igital) conversion of an imaging signal input from the CCD 2.
It comprises a / D conversion circuit, a drive control circuit that drives and controls the exposure and readout timing of the CCD 2, and a timing generator that controls the drive timing (frame synchronization timing) in the drive control circuit. The CCD controller 3 converts an image signal input from the CCD 2 via a buffer of the output unit from an analog signal to a digital signal and supplies the digital signal to a timing generator. The timing generator supplies the digital signal from the A / D conversion circuit. The obtained digital signal is output to the YUV processor as an imaging signal. Further, the drive control circuit controls the drive of the exposure and readout timing of the CCD 2 at the frame synchronization timing based on the timing signal supplied from the timing generator.

The YUV processor 4 performs a color calculation process on an image pickup signal (digital signal) supplied via a timing generator in the CCD control unit 3 and
The luminance data (Y) and the color data (Cb data, Cr data) are sequentially generated from the image data input from the control unit 3, and the luminance data (Y data) and the color data (Cb data or Cr data) are generated from the generated luminance data (Y data). YU composed
The V data is sequentially output to the memory controller 5.

The memory controller 5 sequentially transfers the luminance data (Y) and the color data (Cb, Cr) inputted from the YUV processor 4 for each frame to the image memory 6 and accumulates them. Three types of data for one frame sequentially generated and transferred from the image data are sequentially stored in the image memory 6 as YUV data. Further, the memory controller 5 includes a YUV
The DMA transfer process of the data and the transfer process to the video encoder are executed, and a series of processes by the DMA transfer process and the transfer process to the video encoder are performed in a frame synchronization period in which the CCD 2 captures one frame of image data. The processing is started according to the DMA transfer start signal input from the CPU 8 at the frame synchronization interrupt timing, and the YUV data of the frame unit taken in by the CCD 2 and input from the YUV processor 4 is inserted every few frames. Then, the YUV data is read out from the image memory 6 every several frames and transferred to the video encoder 11, and the monitor image with the number of display frames reduced by the video encoder 11 is displayed on the liquid crystal module 12.

The image memory 6 is composed of three types of data (luminance data (Y data) and color data (Cb data, Cr data)) transferred every frame or every several frames by the memory controller 5 at frame synchronization interrupt timing. The configured YUV data is stored for each frame, and the stored YUV data is read out by the memory controller 5 and transferred to the video encoder 11 at every frame or every several frames. In the image memory 6, the memory controller 5 sends the DMV from the YUV processor 4 for each frame.
A memory area 0 (mem area) is used as a memory area in which YUV data to be transferred A is written and a memory area in which the written YUV data is read.
1), memory area 1 (mem area 1), and memory area 2 (mem area 2) are set.

The use of three memory areas in the image memory 6 is such that when the captured monitor image is displayed through, the video encoder 11 converts the captured YUV data for each frame into a video signal. This is so as not to collapse.

The key processing unit 7 includes a mode changeover switch, a power switch, a shutter key, and the like (not shown).
Output to U8.

CPU (Central Processing Unit) 8
Is a central processing unit that controls each unit of the digital camera 1 according to various control programs stored in the ROM 9. Specifically, when the mode changeover switch is slid and the shooting mode is designated, the CPU 8 sets the CCD
The control unit 3 controls the driving of the CCD 2, and the CCD control unit 3, the YUV processor 4, and the memory controller 5
To execute a process related to photographing.

At the time of this photographing processing, an analog signal image signal picked up by the CCD 2 is A / D-converted by the CCD control section 3 and the digital image signal is subjected to color calculation processing by the YUV processor 4 so that one frame is processed. When YUV data composed of luminance data (Y data) and color data (Cb data, Cr data) are sequentially generated and input to the memory controller 5 for the image data of When the image display mode is designated by sliding the mode change switch in the key processing unit 7 after the accumulation, the DMA transfer processing of YUV data to be described later to the memory controller 5 and the video encoder 11 and the video encoder Execute the transfer process to

A ROM (Read Only Memory) 9 is a CPU
Numeral 8 stores various control programs for controlling each unit of the digital camera 1, and also stores a DMA transfer processing program of YUV data to be described later, which is executed by a memory controller, and a transfer processing to a video encoder.

The storage medium 10 is constituted by a magnetic or optical recording medium or a semiconductor memory.
The image data transferred from U8 is stored in the storage order N
o. A plurality is stored in association with data.

The video encoder 11 generates a video signal based on one frame of YUV data transferred every few frames by the memory controller 5 and drives the liquid crystal module 12 with the generated video signal to drop frames. To display the monitor image.

The liquid crystal module 12 displays an image on a display screen based on a video signal input from the video encoder 11.

Next, the operation of the first embodiment will be described.

First, the operation of the digital camera 1 for displaying a smooth through display as in the prior art, as shown in FIG.
This will be described with reference to the timing charts of the signals of the respective parts shown in FIG.

In FIG. 2, (a) is a frame synchronization signal indicating a frame synchronization period set by the CCD controller 3 when image data of one frame is taken from the CCD 2, and (b) is a YUV processor 4. (C) is a memory write signal output by the memory controller 5 at the interrupt timing by the dma start signal shown in the figure, and (d). ~ (F)
Are three writing areas (memarea) in the image memory 6.
0, mem area1, mem area2), the writing state of YUV data for each frame,
(G) is a write area No. for designating a write area output by the memory controller 5 when YUV data is written to the image memory 6. (H) is a read area No. that designates a read area output by the memory controller 5 when YUV data is read from the image memory 6. (I) is a vertical synchronizing signal for synchronizing the YUV data read from the image memory 6 when transferring it to the video encoder 11, and (j) is a video output by the video encoder 11 for each frame. Signal.

In the digital camera 1 shown in FIG. 1, when the shutter key is pressed in the key processing section 7, the image picked up by the CCD 2 is immediately and smoothly displayed on the liquid crystal module 12 as described below. The processing in each unit in the digital camera 1 is performed.

First, in the CCD 2, a driving signal supplied from the CCD controller 3 and an image signal for one frame sequentially imaged in accordance with the set frame synchronization signal of FIG. Are sequentially output from the CCD controller 3, the imaging signal for one frame sequentially input from the CCD 2 is sequentially converted from an analog signal to a digital signal, and a YUV processor is used as an imaging signal of a digital signal for each frame. Are sequentially output.

In the YUV processor 4, a CCD
A color calculation process is performed on one frame of the imaging signal (digital signal) sequentially input from the control unit 3 within each frame synchronization period, and luminance data (Y data) and color data (Cb) are obtained from the image data. Data and Cr data) are sequentially generated, and are composed of the luminance data (Y data) and the color data (Cb data or Cr data).
(B) is sequentially output to the memory controller 5 as YUV data for each frame.

In the memory controller 5, the DMA input from the CPU 8 at the frame-synchronized interrupt timing
In response to the transfer start signal (dma start in FIG. 2), the memory write signal in FIG. 2C and the write area No. in FIG. Is output, the DMA transfer processing of the YUV data input from the YUV processor 4 for each frame to the image memory 6 and the writing area No. are performed. The writing process to the memory area designated by is performed. This D
The MA transfer process ends for each frame and is not performed until the next DMA transfer start signal is output.

That is, in FIG. 2, when the first DMA transfer start signal is output, the memory controller 5 writes the write area No. in FIG. Is "mem area
0 ", and the YUV data 1 in FIG. 3B is DMA-transferred and written into a memory area 0 in the image memory 6. When this first DMA transfer process is completed,
The write area No. And reading area No. in FIG.
Is updated, and the read area No. for the image memory 6 is updated.
Is changed to the memory area 0 where the DMA transfer processing of the first YUV data has been completed.

Then, the memory area 0 in the image memory 6
The YUV data 1 written in the read area No. is read first at the timing based on the vertical synchronization signal in the video encoder 11 in FIG. "Mem specified as
area0 ", the memory area 0 in the image memory 6
And transferred to the video encoder 11.
In the video encoder 11, based on the YUV data 1 transferred from the memory controller 5, the video signal (1-1) of the first field and the video signal (1-2) of the second field shown in FIG. They are sequentially generated and output to the liquid crystal module 12.

Subsequently, at the frame synchronization interrupt timing of the next frame synchronization signal, the DMA transfer start signal is
8 is output from the memory controller 5 to the memory controller 5, the write area No. of FIG. Is "m
em area1 ”, and is output as Y in FIG.
UV data 2 is stored in memory area 1 in image memory 6
A is transferred and written. When the second DMA transfer process is completed, the write area No. And reading area No. in FIG. Is updated, and the read area No. for the image memory 6 is updated. Is changed to the memory area 1 in which the DMA transfer processing of the second YUV data has been completed.

Then, the memory area 1 in the image memory 6
The YUV data 2 written in the read area No. is read first at the timing based on the vertical synchronization signal in the video encoder 11 in FIG. "Mem specified as
area1 in the image memory 6
And transferred to the video encoder 11.
In the video encoder 11, based on the YUV data 2 transferred from the memory controller 5, the video signal (2-1) of the first field and the video signal (2-2) of the second field shown in FIG. They are sequentially generated and output to the liquid crystal module 12.

Thereafter, similarly, at the frame synchronization interrupt timing of the frame synchronization signal, the DMA transfer start signal is
8 to the memory controller 5, the YUV data transfer / write processing and read / transfer processing for each frame by the memory controller 5 and the video signal generation processing by the video encoder 11 are repeatedly executed. Since the video signal is updated in the video encoder 11 based on the YUV data sequentially written to the image memory 6 based on the image pickup signal taken in every frame from, a smooth monitor image is displayed on the liquid crystal module 12. .

Next, the operation of the digital camera 1 for displaying a frame-dropped monitor image will be described with reference to the timing chart of the signals of the respective sections shown in FIG.

In FIG. 3, (a), (b), (f)
2 (a), 2 (b), and 2 (i) are the signals shown in FIGS.
These are the same as the signals shown in (g) to (j). In FIG. 3, (c) is a memory write signal output by the memory controller 5 at an interrupt timing due to the dma start signal output by the CPU 8 every few frames shown in the figure, and (d), (d) e)
Are two write areas (mem are) in the image memory 6.
aU, mem area1) YU for each frame
This shows the write state of V data. In this case, the interval between the write timings of the YUV data transferred from the YUV processor 4 is longer than that in the case of the through display, so that
One memory area is enough.

In the operation according to the timing chart shown in FIG. 3, similarly to FIG. 2, the write area of one frame of YUV data written by DMA transfer from the YUV processor 4 to the image memory 6 by the memory controller 5 is shown in FIG. 3 (f) write area No. The read area of one frame of YUV data read from the image memory 6 and transferred to the video encoder 11 is designated by the read area No. in FIG. When the DMA transfer processing of the YUV data is completed, the write area No. And read area No. Is updated.

In the digital camera 1 shown in FIG. 1, when the shutter key is pressed in the key processing section 7, the image picked up by the CCD 2 is immediately displayed on the liquid crystal module 12 in a frame-by-frame manner. The processing in each unit in the digital camera 1 to be described is performed.

First, in the CCD 2, an image signal for one frame sequentially imaged according to the drive signal supplied from the CCD control unit 3 and the set frame synchronizing signal of FIG. Are sequentially output from the CCD controller 3, the imaging signal for one frame sequentially input from the CCD 2 is sequentially converted from an analog signal to a digital signal, and a YUV processor is used as an imaging signal of a digital signal for each frame. 4 sequentially.

Then, in the YUV processor 4, the CCD
A color calculation process is performed on one frame of the imaging signal (digital signal) sequentially input from the control unit 3 within each frame synchronization period, and luminance data (Y data) and color data (Cb) are obtained from the image data. Data and Cr data are sequentially generated, and are composed of the luminance data (Y data) and the color data (Cb data or Cr data).
(B) is sequentially output to the memory controller 5 as YUV data for each frame.

In the memory controller 5, the DMA input from the CPU 8 at the frame synchronous interrupt timing
In response to the transfer start signal (dma start in FIG. 3), the memory write signal in FIG. 3C and the write area No. in FIG. Is output, the DMA transfer processing of the YUV data input from the YUV processor 4 for each frame to the image memory 6 and the writing area No. are performed. The writing process to the memory area designated by is performed. This D
The MA transfer process ends for each frame and is not performed until the next DMA transfer start signal is output.

That is, in FIG. 3, when the first DMA transfer start signal is output, the memory controller 5 writes the write area No. in FIG. Is "mem area
0 ", and the first YUV data 1 in FIG. 3B is DMA-transferred and written into the memory area 0 in the image memory 6. When this first DMA transfer process is completed, the write area No. And read area No. in FIG. Is updated, and the read area N for the image memory 6 is
o. Is changed to the memory area 0 where the DMA transfer processing of the first YUV data has been completed.

Then, the memory area 0 in the image memory 6
The YUV data 1 written in the read area No. is read first at the timing based on the vertical synchronization signal in the video encoder 11 in FIG. "Mem specified as
area0 ", the memory area 0 in the image memory 6
And transferred to the video encoder 11.
In the video encoder 11, based on the YUV data 1 transferred from the memory controller 5, the video signal (1-1) of the first field and the video signal (1-2) of the second field shown in FIG. They are sequentially generated and output to the liquid crystal module 12.

Subsequently, at the frame synchronization interrupt timing of the next second frame synchronization signal shown in FIG.
No MA transfer start signal is output, and therefore, the YUV data 2 transferred from the YUV processor 4 to the memory controller 5 at the timing of the next frame synchronization signal is not DMA-transferred to the image memory 6. Therefore, at the second frame synchronization timing, the YUV data 1 written to the image memory 6 at the previous first frame synchronization timing is set.
Is read out by the memory controller 5 and transferred to the video encoder 11, and as shown in FIG. 3 (i), the video signal (1-1) of the same first field as the previous frame is output from the video encoder 11. , The video signal (1-2) of the second field is output to the liquid crystal module 12. At this time, the writing area No. And read area No. Is not updated, and the writing area No. And read area No. Remains “mem area 0”.

Next, at the frame synchronization interrupt timing of the next third frame synchronization signal shown in FIG.
The MA transfer start signal is output and the memory controller 5
From the write area No. in FIG. Is "mem are
a0 ”, and the third YUV in FIG.
The data 3 is DMA-transferred and written into the memory area 0 in the image memory 6. When the third DMA transfer process is completed, the write area No. And read area No. in FIG. Is updated, and the read area No. for the image memory 6 is updated. Is changed to the memory area 0 where the DMA transfer processing of the first YUV data has been completed.

Then, the memory area 0 in the image memory 6
The YUV data 3 written to the read area No. is read first at the timing based on the vertical synchronization signal in the video encoder 11 in FIG. "Mem specified as
area0 ", the memory area 0 in the image memory 6
And transferred to the video encoder 11.
In the video encoder 11, based on the YUV data 3 transferred from the memory controller 5, the video signal (3-1) of the first field shown in FIG. ) And output to the liquid crystal module 12.

Thereafter, similarly, every time a DMA transfer start signal is output from the CPU 8 to the memory controller 5 at the frame synchronization interrupt timing for every two frames of the frame synchronization signal, the memory controller 5 transfers the YUV data for every two frames. The write processing, the read transfer processing, and the video signal generation processing by the video encoder 11 are repeatedly executed, so that the image memory 6
Since the video signal is updated in the video encoder 11 based on the YUV data written every two frames, the number of frames is reduced in the liquid crystal module 12 and the monitor image is displayed through.

Next, the details of the DMA transfer processing of the YUV data executed by the memory controller 5 in the through display of the frame-dropped monitor image will be described with reference to the flowchart shown in FIG.

In the DMA transfer processing of the YUV data shown in FIG.
It is monitored whether or not the MA transfer start signal (dma start) has been input (step S1).
When a transfer start signal (dma start) is input,
It waits for the input of one frame of YUV data from the YUV processor 4 (step S2). And YUV
It is checked whether or not the YUV data input from the processor 4 has accumulated for one frame for the DMA transfer processing (step S3). When it is confirmed that the YUV data has accumulated for one frame, the accumulated YUV data is stored in the above-mentioned manner. Write area No. DMA transfer and write to the memory area in the image memory 6 designated by
4).

Next, it is confirmed whether or not the DMA transfer of the one frame of YUV data to the image memory 6 has been completed (step S5). If not completed, the process returns to the step S3, and the process returns to step S3. The DMA transfer process of the YUV data to the image memory 6 is repeatedly executed, and when it is confirmed that the DMA transfer process of the YUV data for the one frame to the image memory 6 is completed, the DMA transfer process to the CPU 8 is completed. In order to show that
MA transfer end interrupt processing is performed, and the DMA transfer processing of the present YUV data ends.

Next, the details of the transfer processing to the video encoder 11 executed by the memory controller 5 in the through display of the frame-dropped monitor image will be described with reference to the flowchart shown in FIG.

In the transfer process to the video encoder 11 shown in FIG. 5, the memory controller 5 first reads the read area No. according to the timing based on the vertical synchronization signal in the video encoder 11. The YUV data for one frame is read from the memory area in the image memory 6 designated by (1) (step S11), and the read YUV data for one frame is transferred to the video encoder 11 (step S12). Then, the transfer processing to S11 ends.

Next, details of the frame synchronization interrupt processing executed by the CPU 8 in the through display of the frame-dropped monitor image will be described with reference to the flowchart shown in FIG.

In the frame synchronization interrupt process shown in FIG. 6, the CPU 8 first sets 1
Is subtracted (step S21). This DMA drive interval is
This element determines the number of frames for through display of a monitor image. When smooth through display in which an image changes every frame is performed, the DMA drive interval is set to 1 and the number of display frames per unit time is reduced. When performing through display,
The set value of the DMA drive interval is set to 2 or more. Therefore,
In the present processing, the setting value of the DMA drive interval is set to 2 or more in order to perform the through display with the number of frames reduced.

Then, in a step S22, it is determined whether or not the set value of the DMA drive interval is 0. If the set value is not 0, the present frame synchronization interrupt processing is ended. If the set value is 0, the DMA transfer to the memory controller 5 is started. Signal (dmast
art) is output (step S). That is, DMA
Since the DMA transfer start signal (dma start) is output every time the set value of the drive interval becomes 0,
If the set value of the MA drive interval is set to 2, the DMA transfer start signal (dmas
start) is not output, and 1 is subtracted next from the set value 2 so that DM becomes 0 at the frame synchronization interrupt timing.
An A transfer start signal (dma start) is output to the memory controller 5.

Therefore, the YUV data is written into the image memory 6 for every two frames by the memory controller 5, so that a through display in which one frame is dropped out of two frames can be performed.

Next, in the process of step S23, the DM
After outputting the A transfer start signal (dma start),
In step S24, the set value of the DMA drive interval is reset to 2, and the frame synchronization interrupt process ends.

Next, the details of the DMA transfer end interrupt processing executed by the CPU 8 in the through display of the frame-dropped monitor image will be described with reference to the flowchart shown in FIG.

In the frame synchronization interrupt processing shown in FIG. 6, the CPU 8
When the A transfer end interrupt is input, the read area N
o. In the write area No. designated in the DMA transfer process. (Step S31), and the writing area N
o. To memory areas 0 to 0 set in the image memory 6
2 (step S32), and the frame synchronization interrupt process ends.

As described above, in the digital camera 1 according to the first embodiment, the YUV data generated for each frame in the YUV processor 4 from the image pickup signal captured from the CCD 2 for each frame is transferred to the image memory 6. Since the transfer write timing is DMA-transferred and written at a frame synchronization interrupt timing every predetermined number of frames in the memory controller 5, YUV data is read and transferred to the video encoder 11 at every frame synchronization interrupt timing every several frames. The liquid crystal module 12 can display a monitor image with a reduced number of frames. As a result, the digital camera 1 can reduce power consumption during through display.

In the first embodiment, the case where the DMA transfer processing of the YUV data is performed once every two frames has been described. However, the DMA transfer rate of the YUV data is three frames or four frames. The number of display frames per unit time can be reduced as the DMA transfer interval increases, and the power consumption during through display can be further reduced.

(Second Embodiment) In the first embodiment, the YUV data output from the YUV processor 4 for each frame is selected by the memory controller 5 every predetermined number of frames and intermittently transferred. As a result, the through display of the monitor image with the reduced number of frames was performed.
In the embodiment, a case will be described in which the YUV data itself output from the YUV processor 4 is transferred intermittently.

FIGS. 8 and 9 are diagrams for explaining the operation of the through display in the digital camera according to the second embodiment to which the present invention is applied. Note that the circuit configuration in the digital camera 1 of the second embodiment is the same as the circuit configuration shown in FIG. 1 of the first embodiment, and thus illustration and description of the configuration are omitted. .

FIG. 8 is a diagram showing a timing chart of signals of various parts for explaining the operation in the case of displaying a frame-dropped monitor image in the digital camera 1.

In FIG. 8, (a), (d) to (i)
Are the same as the signals shown in FIGS. 3A and 3C to 3H. In FIG. 8, (b) shows YUV data for each frame outputted from the YUV processor 4 every several frames shown in the figure, and (c) shows Y set in the YUV processor 4.
This is a YUV enable signal for determining whether to output UV data.

In the digital camera 1 shown in FIG.
In 2, the drive signal supplied from the CCD control unit 3 and the imaging signal for one frame sequentially captured in accordance with the set frame synchronization signal in FIG. 8A are sequentially output to the CCD control unit 3. The CCD controller 3 sequentially converts an image signal for one frame sequentially input from the CCD 2 from an analog signal to a digital signal, and sequentially outputs the digital image signal to the YUV processor 4 for each frame. You.

In the YUV processor 4, the CCD
For one frame of the imaging signal (digital signal) sequentially input from the control unit 3, the color calculation processing is performed within the frame synchronization period in which the YUV enable signal in FIG. Luminance data (Y data) and color data (Cb data, Cr data) are generated from the image data, and the luminance data (Y data) and the color data (C data) are generated.
8 composed of b data or Cr data)
(B) is output to the memory controller 5 as YUV data for each frame.

In the memory controller 5, the DMA input from the CPU 8 at the frame synchronous interrupt timing
In response to the transfer start signal (dma start in FIG. 8), the memory write signal in FIG. 8D and the write area No. in FIG. Is output, the YUV data input from the YUV processor 4 every other frame is DMA-transferred to the image memory 6 and the write area No. The writing process to the memory area designated by is performed. This DMA transfer processing is completed for each frame, and is not performed until the next DMA transfer start signal is output.

That is, in FIG. 8, when the first YUV enable signal is set to 1 and the first DMA transfer start signal is output, the memory controller 5 writes the write area No. in FIG. Is output as “mem area 0”, and the first YUV data 1 in FIG. 2B is DMA-transferred and written into the memory area 0 in the image memory 6. When this first DMA transfer process is completed,
The write area No. And reading area No. in FIG.
Is updated, and the read area No. for the image memory 6 is updated.
Is changed to the memory area 0 where the DMA transfer processing of the first YUV data has been completed.

Then, the memory area 0 in the image memory 6
The YUV data 1 written in the read area No. is read first at the timing based on the vertical synchronization signal in the video encoder 11 in FIG. "Mem specified as
area0 ", the memory area 0 in the image memory 6
And transferred to the video encoder 11.
In the video encoder 11, based on the YUV data 1 transferred from the memory controller 5, the video signal (1-1) of the first field and the video signal (1-2) of the second field shown in FIG. They are sequentially generated and output to the liquid crystal module 12.

Subsequently, at the frame synchronization interrupt timing of the next second frame synchronization signal shown in FIG. 8A, the YUV processor 4 does not set the YUV enable signal of FIG. The start signal is not output, and therefore the YUV processor 4 sends the start signal to the memory controller 5 at the timing of the next frame synchronization signal.
No YUV data is transferred, and no DMA transfer to the image memory 6 is performed. Therefore, at the second frame synchronization timing, the YUV data 1 written to the image memory 6 at the previous first frame synchronization timing is set.
Is read out by the memory controller 5 and transferred to the video encoder 11, and as shown in FIG. 8 (j), the video signal (1-1) of the same first field as the previous frame is output from the video encoder 11. , The video signal (1-2) of the second field is output to the liquid crystal module 12. At this time, the writing area No. And read area No. Is not updated, and the writing area No. And read area No. Remains “mem area 0”.

Next, at the frame synchronization interrupt timing of the next third frame synchronization signal shown in FIG.
, A DMA transfer start signal is output, and the second YUV data 2 in FIG. In the memory controller 5,
Write area No. in FIG. Is "mem area
1 ", and the second YUV data 2 is DMA-transferred and written into the memory area 1 in the image memory 6. When the second DMA transfer process is completed, the write area No. And reading area N in FIG.
o. Is updated, and the read area N for the image memory 6 is
o. Is changed to the memory area 1 in which the DMA transfer processing of the second YUV data 2 has been completed.

Then, the memory area 1 in the image memory 6
The YUV data 2 written in the read area No. is read first at the timing based on the vertical synchronization signal in the video encoder 11 in FIG. "Mem specified as
area1 in the image memory 6
And transferred to the video encoder 11.
In the video encoder 11, based on the YUV data 2 transferred from the memory controller 5,
The video signal (2-1) of the field and the video signal (2-2) of the second field are generated in this order and output to the liquid crystal module 12.

Thereafter, similarly, every time the YUV enable signal is set to 1 in the YUV processor 4 at the frame synchronization interrupt timing of every two frames of the frame synchronization signal, a DMA transfer start signal is output from the CPU 8 to the memory controller 5. YUV data is intermittently transferred from the YUV processor 4 to the memory controller 5, and the YUV data is transferred every two frames by the memory controller 5.
Data transfer write processing and read transfer processing;
The video signal generation processing by the video encoder 11 is repeatedly executed, so that the video signal is generated by the video encoder 11 based on the YUV data written for each two frames in the image memory 6 based on the imaging signal captured every two frames from the CCD 2. Is updated, the number of frames is reduced on the liquid crystal module 12, and a through display of the monitor image is performed.

Next, the details of the frame synchronization interrupt processing executed by the CPU 8 in the through display of the frame-dropped monitor image will be described with reference to the flowchart shown in FIG.

In the frame synchronization interrupt processing shown in FIG. 9, the CPU 8
It is checked whether the UV enable signal has been set to 1 (step S41). If it is checked that the YUV enable signal has been set to 1, a DMA transfer start signal (dma start) is output to the memory controller 5. Then (step S42), the frame synchronization interrupt processing ends.

The DMA of the YUV data executed by the memory controller 5 in the second embodiment
The flowcharts for explaining the details of the transfer processing and the transfer processing to the video encoder 11 are the same as the flowcharts shown in FIG. 4 and FIG. And description is omitted.

As described above, in the digital camera 1 of the second embodiment, the YUV data to be transferred to the memory controller 5 every predetermined number of frames is intermittently transferred by the YUV enable signal set in the YUV processor 4. , The YUV processor 4 in the memory controller 5
Since the YUV data is DMA-transferred and written to the image memory 6 at the transfer timing from, the YUV data is read out and intermittently transferred to the video encoder 11 at the frame synchronization interrupt timing every several frames.
The liquid crystal module 12 can perform a through display of a monitor image without dropping frames, and the power consumption during the through display can be further suppressed.

In the second embodiment, the case where the intermittent transfer process of the YUV data itself is performed once every two frames has been described. However, the intermittent transfer ratio of the YUV data is three frames or four frames. The power consumption during through display can be reduced as the intermittent transfer interval increases.

In the digital camera 1 of each of the above embodiments, a memory area in which the YUV data DMA-transferred from the YUV processor 4 for each frame is written into the image memory 6 and the written YUV data is read. Memory area 0 (mem)
area1), memory area 1 (mem area
1) Since three memory areas of a memory area 2 (mem area 2) are set and used, when the captured monitor image is displayed through, the YUV data for each frame is converted into a video signal by the video encoder 11. The conversion timing can be prevented from collapsing.

In the digital camera 1 of each of the above-described embodiments, the key operation of the mode switching key in the key processing unit 7 determines whether to use the conventional smooth through display or the frame skip through display according to the present invention. May be arbitrarily switchable. In this case, the user of the digital camera 1 can arbitrarily switch the display mode in which the captured image is displayed in a through manner according to the state of the subject, the shooting situation, and the like.

When the digital camera 1 according to each of the above-described embodiments has an autofocus function, the conventional smooth through display is performed when the camera is in focus, and the frame skipping of the present invention is performed when the camera is out of focus. You may make it a through display. In this case, each through display mode can be appropriately switched and controlled in accordance with the operation state of the autofocus function, and effective use of each through display mode can be achieved.

In the digital camera 1 of each of the above embodiments, when the shutter of the digital camera 1 is half-pressed, the conventional smooth through display is performed, and when the power is normally turned on without pressing the shutter, the present invention is applied. You may make it the through display of frame drop. In this case, each through display mode can be appropriately switched and controlled in accordance with the operation state of the digital camera 1, and each through display mode can be effectively used.

In each of the above embodiments, the image pickup means is a CCD in the digital camera 1.
It may be a MOS image sensor.

The present invention also relates to, for example, a PCMCIA (Personal Co-mputer Memory Card) equipped with a CCD camera.
The present invention can be applied to an electronic device such as a personal computer having an imaging function (image input function) when a PC camera card of International Association) standard is mounted.

In the digital camera 1 according to each of the above embodiments, various control programs are stored in the storage medium R.
Although the storage is performed in the OM, the storage medium is not limited to a semiconductor memory represented by a ROM, and may be a magnetic or optical recording medium. Further, the storage medium may be a medium that can be detachably attached to the digital camera.

[0106]

According to the image display device of the first aspect and the image transfer method of the fourth aspect, it is possible to perform a through display by dropping frames of image data generated from an input image. It is possible to reduce power consumption when displaying an input image through.

According to the image display device of the invention described in claim 2 and the image transfer method of the invention described in claim 5, through display can be performed without dropping frames of image data generated from an input image. It is possible to further reduce the power consumption when displaying the input image through.

According to the image display device of the present invention, the writing area and the reading area of the image data generated from the input image are set so that the display timing of the image data for each frame in the display means does not collapse. Can be set.

According to the storage medium of the invention described in claim 6,
By reading and executing a program stored in a storage medium by a computer, image data generated from an input image can be displayed in a frame-by-frame manner, thereby reducing power consumption when the input image is displayed through. can do.

According to the storage medium of the invention described in claim 7,
By reading and executing the program stored in the storage medium by the computer, it is possible to perform the through display without dropping the frame of the image data generated from the input image. The power can be further reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a main configuration of a digital camera 1 according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a timing chart of signals of respective parts for describing an operation when performing smooth through display in the digital camera 1 of FIG. 1;

FIG. 3 is a diagram showing a timing chart of signals of respective parts for describing an operation when performing frame-through display in the digital camera 1 of FIG. 1;

FIG. 4 is a flowchart showing a DMA transfer process of YUV data executed by the memory controller 5 of FIG. 1;

FIG. 5 is a flowchart showing a transfer process to a video encoder executed by a memory controller 5 of FIG. 1;

FIG. 6 is a flowchart showing a frame synchronization interrupt process executed by a CPU 8 of FIG. 1;

FIG. 7 is a flowchart showing a DMA transfer interrupt process executed by a CPU 8 of FIG. 1;

FIG. 8 is a diagram showing a timing chart of signals of respective units for explaining an operation when performing frame-drop-through display in the digital camera 1 of the second embodiment to which the present invention is applied.

FIG. 9 is a flowchart showing a frame synchronization interrupt process executed by a CPU 8 of FIG. 1;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Video camera 2 CCD 3 CCD control part 4 YUV processor 5 Memory controller 6 Image memory 7 Key processing part 8 CPU 9 ROM 10 Storage medium 11 Video encoder 12 Liquid crystal module

Claims (7)

[Claims] An image generating means for sequentially generating one screen of image data from an input image; an image storing means for storing one screen of image data generated by the image generating means; An image display control means for reading out the stored image data for one screen and displaying the image data on a display means, wherein a plurality of image data for one screen sequentially generated by the image generation means are provided. An image display apparatus comprising: an image transfer control unit that controls the image data to be transferred to and stored in the image storage unit once per frame. 2. An image generating means for sequentially generating one screen of image data from an input image; an image storing means for storing one screen of image data generated by the image generating means; An image display control means for reading out the stored image data for one screen and displaying the image data on a display means, wherein the image generating means performs one screen operation from the input image once per a plurality of frames. Image generation control means for controlling the generation of image data, and when the image generation means generates image data by the image generation control means, transfers the generated image data to the image storage means. An image display device comprising: an image transfer control unit that performs control as described above. 3. A plurality of image storage areas for storing the image data for a plurality of screens are set in the image storage means, and one image storage area of the plurality of image storage areas is stored in an image by the image transfer control means. Setting as a transfer image area for transferring data, setting one image storage area different from the transfer image area among the plurality of image storage areas as a display image area for displaying image data by the image display control means; When the transfer of the image data for one screen to the transfer image area is completed by the image transfer control unit, the transfer image is transferred to one of the plurality of image storage areas different from the transfer image area where the transfer is completed. Changing the area, and displaying the image data for one screen on the display means by the image display control means, displaying the transfer image area in which the transfer has been completed; 3. The image display device according to claim 1, wherein the image is changed to an image area. 4. An image data for one screen sequentially generated from an input image is transferred to and stored in an image storage means, and then the image data is read out from the image storage means and the image data for one screen is displayed on a display means. An image transfer method for controlling the transfer of the sequentially generated image data for one screen to the image storage means when displaying the image data. Controlling the image data to be transferred to and stored in the image storage means at a rate of times. 5. An image data for one screen sequentially generated from an input image is transferred to an image storage means and stored, and then the image data is read out from the image storage means and the image data for one screen is displayed on the display means. An image transfer method for controlling the transfer of the sequentially generated image data for one screen to the image storage unit when displaying the image data, wherein the image data for one screen is generated once every plural frames from the input image. Is generated, and when image data is generated by the image generation control,
An image transfer method, wherein the generated image data is controlled to be transferred to the image storage means. 6. A storage medium storing a computer readable program for storing and displaying image data generated from an input image in an image storage means, wherein one screen of image data is stored from the input image. A program code for sequentially generating the image data, a program code for transferring the image data to the image storage means once in a plurality of frames out of the sequentially generated image data for one screen, and storing the image data; And a program code for reading one screen of image data stored in the means and displaying the image data on the display means. 7. A storage medium storing a computer readable program for storing and displaying image data generated from an input image in an image storage means, comprising: A program code for generating image data for one screen at a rate; a program code for transferring the generated image data for one screen to an image storage means when the image data is generated; And a program code for reading one screen of image data stored in the storage means and displaying the image data on the display means.