JPH11275324A - Picture processing method and picture processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a buffer which has capacity for securely storing picture data required for one main scanning operation of an output system and can realize high speed access, corresponding to the processing speed of the output system. SOLUTION: For reading picture data for one main scanning operation, a pair of DRAM 204A and 204B are used, picture data for one main scanning operation is divided and they are sent to a pair of SRAM 208A and 208B. Picture data are alternately transferred from SRAM 208A and 208B to an output system. Then, next picture data which are divided are stored in SRAM 208A and 208B which become empty. Thus, a pair of SRAM 208A and 208B are alternately connected to the output system and divided picture data are transferred. Consequently, picture data can be accessed at appropriate processing speed without giving the stress of waiting time to the output system. Thus, correspondence to the sharp increase of picturure data quantity based on high resolution, coloring and multi-recording is realized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an output device for recording an image on a recording material using a scanning optical system,
The present invention relates to an image processing method and an image processing apparatus for transferring image data to the output device.

[0002]

2. Description of the Related Art When image data is obtained from an input source such as a scanner or a host computer and is printed out by a printer after various editing operations, for example, image data input from a host computer is temporarily stored in a buffer. In advance, the image data required for one main scan is transferred to the printer.

This buffer is constructed of, for example, an SRAM having a high access speed. Although the SRAM can be accessed at high speed and can sufficiently cope with the processing speed of the printer, the SRAM is expensive and has a small storage capacity.

[0004] In recent years, the amount of image data has increased drastically. In order to store the amount of image data for one line in the SRAM, a large number of SRAMs are required, and the number of parts and the cost increase. Connect.

The cause of the increase in the amount of image data is that high-resolution CT (Continuos Ton)
In the case of applying the method (e), one bit (white or black) of the normal bitmap data becomes eight bits (256 gradations), which is eight times the image data amount. In the case of a color image, the amount of image data is three times that of a monochrome image. Further, when a multi-channel method of simultaneously writing a plurality of lines at the time of scanning with a printer is employed, the amount of image data increases at a magnification corresponding to the number of channels (for example, in the case of simultaneous scanning of eight lines, the amount becomes eight times).

[0006] Such an increase in the amount of image data is referred to as SR
Dealing with an increase in AM leads to a significant increase in the number of parts, which is not preferable.

[0007]

In view of the above facts, the present invention has a capacity capable of reliably storing image data required for one main scan recording of an output system, and a high speed corresponding to the processing speed of the output system. It is an object of the present invention to provide an image processing method and an image processing apparatus capable of constructing an accessible buffer.

[0008]

According to the first aspect of the present invention, there is provided an image processing method for transferring image data to an output device for recording an image on a recording material. Image data of a capacity required for scanning and recording is stored, and it is possible to correspond to the processing speed of the output device, and
The data is stored again in at least two or more memories having a storage capacity smaller than the capacity of the image data necessary for the main scan recording, and the divided image data stored in one memory is transferred to the output device at the same time as the previous transfer. The storage of the next divided image data in another empty memory is sequentially repeated.

According to the first aspect of the present invention, it is necessary that image data having a capacity required for one main scan recording in the output device be stored in a buffer in advance.

However, a memory capable of supporting the processing speed of the output device has a small storage capacity, and thus does not have a function as a buffer by itself.

In view of this, image data of a capacity required for the one main scanning recording is stored regardless of the processing speed, and a part thereof is stored in two or more memories.

The memory mentioned here has an access speed that can correspond to the processing speed of the output device, and therefore does not hinder the transfer to the output device although it is part.

According to the first aspect of the present invention, image data is stored in another memory while the output device is being transferred from one memory. For example, if two memories are used, the input of image data is alternately performed. Output (transfer). Thus, image data can be transferred to the output device without interruption and at a predetermined processing speed.

Although the number of memories contributes to the access speed, two memories are theoretically sufficient if the input / output speed is the same. When a buffer is constructed with two memories, it is preferable that the input speed be slightly higher than the output speed (for loss time compensation such as switching between memories).

According to a second aspect of the present invention, there is provided an image processing device for transferring image data to an output device for recording an image on a recording material, wherein each of the image processing devices stores at least one main scan of image data. A pair of first memories having a storage capacity capable of storing, a first switch for selectively switching a transmission path for transmitting input image data to any one of the pair of first memories, A pair of second memories having a processing speed capable of coping with the continuous operation of the apparatus and capable of storing a part of the image data for the one main scanning recording; a pair of the first memories and a pair of the second memories; A second switch disposed between the first memory and the second memory for selectively switching a transmission path for transmitting image data from any one of the pair of first memories to any one of the pair of second memories. Image data stored in memory 2 A third switch for selectively switching a transmission path to be transferred to the output device; and controlling the first switch to input image data for each main scanning recording to the first memory. Controlling the second switch and the third switch to alternately execute image data input control means between the pair of first memories;
Dividing the image data for each main scanning recording stored in the memory of the second memory and sending the divided data to the second memory, and simultaneously transferring the divided image data stored in the second memory to the output device. , The pair of first memories and the pair of second memories.
And an image data output control means for executing alternately between the memories.

According to the second aspect of the present invention, as the initial setting, first, the image data input control means sets the first
Is controlled to input image data for each main scanning recording to each of the pair of first memories.

Next, the image data stored in one first memory is divided and stored in a pair of image memories. In this state, the image data remains in the first memory.

After such an initial state, steady control is performed. That is, in the image data output control means, the second
And controlling the third switch to divide the image data for each line stored in the first memory and send the divided image data to the second memory, and at the same time, the divided image data stored in the second memory To the output device.

That is, in the second memory, the transfer and the input of the image data are alternately performed. As a result, the image data for one main scan recording to the output device is stored in the access memory of the second memory. It will be output continuously at the speed.

Here, in the image data input means, when the image data is transmitted from one of the first memories, the other second data is transmitted.
, The image data for the next main scanning recording is input to the memory. Also in the first memory, the transmission to the second memory and the input are performed alternately, so that the first memory has a role of a buffer and can access image data at a processing speed corresponding to the output device. it can.

[0021]

FIG. 1 is a block diagram of a system for transferring image data to an image recording apparatus according to the present embodiment.

In the present system, the host computer 100, the host computer 1 as a source of image data
An image data input / output control unit 102 for controlling the transfer of image data from image data 00 and an image recording apparatus main body 104. (Host Computer 100) Host Computer 10
What is applied as 0 may be a so-called server or a personal computer. Further, the drive may be a drive in which a recording medium such as a floppy disk, a CD, a CD-R, or a DVD can be loaded, and may have a function of outputting image data from the recording medium.

Further, the image data may be transferred between the host computer 100 and the input / output control unit 102 via a communication line such as the Internet or Ethernet or a network such as a LAN. . (Input / output control unit 102) As shown in FIG. 1, an I / F 106 is provided at an input end of the input / output control unit 102, and an I / F 106 corresponding to an input form to be connected is set. .

The I / F 106 is a SCSI port or RS2
32C is a typical example, but if a plurality is provided in accordance with the image data input system to be connected, the versatility of the input / output control unit 102 is enhanced.

The I / F 106 is connected to the first buffer 108. The storage capacity of the first buffer 108 is 3 MB. This first buffer 108
Is connected to a hard disk (HDD) 112 via a SCSI port 110. That is, I / F
The image data input to 106 is stored in the first buffer 10
8 is temporarily stored in the hard disk 112 (see the dotted line A in FIG. 1).

The storage capacity of the hard disk 112 is 4 G
B and four blocks (1 GB × 4) 1
The image data is divided into 12A to 12D, and image data of one image (one frame) is recorded in one block. Therefore, this hard disk 112 has a maximum of 4
Image data for a frame can be recorded.

The hard disk 112 has the SC
A second buffer 114 as an output buffer is connected via the SI port 110. The storage capacity of the second buffer 114 is 3 MB. Second buffer 11
Reference numeral 4 is connected to the image recording apparatus main body 104, and has a function of reading image data from the hard disk 112 and transferring the image data to the image recording apparatus main body 104 (see a dotted line B in FIG. 1).

The first buffer 106 and the second buffer 114 are connected to a bus 118 of a controller 116 for controlling the input / output control unit 102, and the flow of image data is controlled according to an instruction from the controller 116. It is controlled.

The controller 116 includes a CPU 120, R
An AM 122 and a ROM 124 are provided, and these are connected by the bus 118 such as a control bus and a data bus.

Hard disk 1 applied in the present embodiment
In 12, while the image recording apparatus main body 104 is operating, the image data is transferred to the second buffer 114 in 2 MB units, and the image data in 2 MB units is transmitted from the second buffer 144 to the image recording apparatus main body 104. Data processing speed 5
Transferred at MB / sec. (Image Recording Apparatus Main Body 104) FIG. 2 is a schematic configuration diagram of the image recording apparatus main body 104 according to the present embodiment.

In the image recording device 104, the photosensitive material 1
The light beam emitted from the laser units 128, 130, 132 is scanned and exposed on the light source 26, and the photosensitive material 126 is wound around the drum 134 and positioned. The drum 134 is a motor 1
It rotates at a high speed by the driving force of 40, and this rotation direction is the main scanning direction.

A pair of guide shafts 135 parallel to the axis of the drum 134 are provided around the drum 134. The sub-scanning optical system 136 is supported by the guide shaft 135.

An external thread is formed on one of the guide shafts 135, and the guide shaft 135 on which the external thread is formed is rotated by the driving force of the driving means 138 to move along the guide shaft 135 (sub-scanning movement). A) The sub-scanning optical system 136 moves in the axial direction of the drum 134 (sub-scanning direction).

The sub-scanning optical system 136 includes the laser units 128, 130 and 132. The casing of the sub-scanning optical system 136 has an arc surface along the peripheral surface of the drum 134, and the laser units 128, 130, and 132 are evenly arranged along the arc surface. That is, when the laser unit 128 is in the initial position, it corresponds to the leading position of the photosensitive material 126 positioned on the drum 134, and the laser unit 130
Corresponds to a position about 1/3 from the top of the photosensitive material 126,
The laser unit 132 is located at about 2
/ 3, and when these start image recording at the same time, recording is performed simultaneously from three places on one photosensitive material 126.

The laser units 128, 130, 1
32, three lasers (C (cyan), M
(Magenta) and Y (yellow)) are arranged side by side in the main scanning direction, and a color image can be recorded.

Laser units 128, 130, 132
Are the drivers 148A-C, 150A-C, 1
52A-C, it is connected to the color separation signal units 154A-C. That is, the color separation signal units 154A to 154C
It has the function of separating the signals into the signals for each color based on the image data.

The color separation signal units 154A to 154C are connected to a frame memory 158 built in the controller 156 to obtain image data.

The controller 156 includes the color separation signal units 154A-C, drivers 148A-C, 150A-C,
In addition to controlling the motors 152A to 152C, the motor 140 for rotating the drum 134 and the driving means 138 for moving the sub-scanning optical system 142 are controlled.

The frame memory 158 receives image data for each main scanning recording from the second buffer 114 of the input / output control unit 102, and performs scanning exposure in synchronization with the input. ing.

Here, when the image recording apparatus main body 104 operates, that is, when a start switch or the like is operated, first, a preparation time for a mechanical operation such as feeding of the photosensitive material 126 and positioning of the device. Exists.

In this embodiment, the image data is transferred from the hard disk 112 to fill the second buffer 114 during the preparation time for the mechanical operation.

After waiting for the second buffer 114 to become full (if the preparation is completed before the preparation time, do not wait, but after the preparation time is completed), and then proceed to the actual image recording processing. I have. In this case, the second buffer 11
4 is a part of the image data for one frame, and the image data remains on the hard disk 112.

FIG. 3 shows a detailed block diagram of the second buffer 114. In the most upstream stage of the second buffer 114, following the FIFO 200, the first switch 20
2 are provided. This first switch 202 includes:
A pair of output terminals A and B are provided,
4A and 204B are connected to the input terminals.

Each of the DRAMs 204A and 204B has a storage capacity capable of storing the image data for one main scan. However, the access speed is lower than the image recording speed of the image recording apparatus main body 104.

The image data sent from the hard disk 112 is switched by the first switch 202
The image data for one main scan is sent to the DRAMs 204A and 204B via the FIFO 200.

Output terminals A and B of the DRAMs 204A and 204B are connected to a pair of input terminals A and B provided in the second switch 206, respectively.

The second switch 206 is provided with a pair of output terminals A and B, which can be switched alternately. The output terminals A and B of the second switch 206
Are connected to a pair of SRAMs 208A and 208B, respectively.

Therefore, the DRAM 204A or the DRAM 204A
The image data from 204B is sent to SRAMs 208A and 208B by switching the second switch 206.

The SRAMs 208A and 208B
Corresponds to the image recording speed of the connected image recording apparatus main body 104, and has an access speed higher than that of the DRAMs 202A and 202B. However, instead of a high access speed, the amount of image data that can be stored is small. For this reason,
Only a part of the image data amount for one main scan recording can be stored.

The output terminals of the SRAMs 208A and 208B are connected to the input terminals A and B of the third switch 210, respectively. The third switch 210 has a function of switching input terminals A and B and alternately transferring image data to the image recording apparatus main body 104.

The DRAMs 204A, 204B, SRA
M208A, 208B and first to third switches 2
02, 206, and 210 correspond to the CPU 120 shown in FIG.
Is controlled by This control is based on the following two controls.

The first control is a preparatory process control, in which image data for one main scan is recorded from the hard disk 112 in one.
As a unit, the first switch 202 is switched and stored in the DRAMs 202A and 202B, respectively. One D
When the storage processing to the RAM 202A (or 202B) is completed, the DRAM 202A (or 20
On the 2B) side, the input terminal A (or B) of the second switch 206
Is enabled, and the output terminals A and B are sequentially switched to SRA
A part of the image data for one main scan is stored in each of M208A and 208B.

The second control is a steady processing control.
Switch the input terminals A and B of the switch 210 of the SRAM
The image data stored in the 208A and 208B are sequentially transferred to the image recording apparatus main body 104, and the empty SRAM 208A (or 208B) is synchronized with this transfer.
In addition, a part of the remaining image data of the image data for one main scan is stored. That is,
While transferring image data from the SRAM 208A (or 208B) to the image recording apparatus main body 104, the SRAM 208
B (or 208A) to store new image data, and after the transfer is completed, switch the third switch 210 to
While transferring image data from the SRAM 208B (or 208A) to the image recording apparatus main body 104, the SRAM 208
By repeatedly storing new image data in A (or 208B), image data for one main scan can be continuously transferred to the image recording apparatus main body 104 at an appropriate access speed. .

The DRAM 204A (or 204B)
When the inside becomes empty, the output terminal of the first switch 202 and the input terminal of the second switch 206 are switched, and if the same control as described above is performed, the image data for one frame is sequentially and continuously. Transfer to the image recording apparatus main body 104.

The operation of the present embodiment will be described below. When performing image recording in the image recording apparatus main body 104 based on the image data stored in the host computer 100, first, the intention to transmit the corresponding image data is sent to the input / output device 102.

Here, the image data from the host computer 100 is transferred to the first buffer 10 via the I / F 106.
8, and thereafter, the image data is sent from the first buffer 108 to the hard disk 112. The hard disk 112 has a storage capacity of 4 GB, which is divided into four blocks in advance, and one frame of image data is recorded in one block regardless of the amount of image data of one frame. Therefore, in the hard disk 112 of the present embodiment, the image data for four frames becomes the maximum.

Here, when the image recording apparatus main body 104 operates, the image data is transferred from the hard disk 112 to the second buffer 114. At this time, the image data amount for one main scan is transferred as one unit. In this procedure, the preparation process control will be described first with reference to FIG. 4, but this diagram corresponds to FIG. DRAM and SRA
The storage amount in M is indicated by hatching.

The state shown in FIG. 4A is an initial state,
The image data is not stored in each of the AM and the SRAM. In this state, as shown in FIG. 4B, first, the output terminal of the first switch 202 is switched to the A side. Thereby, the image data for one main scan recorded on the hard disk 112 is stored in the DRAM 204A via the FIFO 200.

Next, as shown in FIG. 4C, the output end of the first switch 202 is switched to the B side, and the image data for the next one main scan is stored in the DRAM 204B. The data may be stored in the DRAM 204B first.

In this preparation processing control, a pair of DRs
The case where both the AM 204A and the AM 204B are empty has been described. However, in the case of the steady processing control described later, in order to store the image data for the next main scanning recording in the empty DRAM 204A (or 204B). , Basically a pair of D
The process of alternately storing image data for one main scan in the RAMs 204A and 204B is repeated.

When the capacity of one of the DRAMs 204A and 204B is full, that is, when image data for one main scan is stored (DRAM 204A in the above), the second data is read from the DRAM 204A in order to read out the image data.
Is switched to A (or B). As a result, the read image data is stored in the SRAM
The data is stored in 208A and 208B (see FIG. 4D).
The storage capacity of the SRAMs 208A and 208B is DRA
Although smaller than M204A and 204B, it is suitable for the recording speed of the image recording apparatus main body 104.

The above is the preparation process control. In this state, the DRAM 204A stores the insufficient image data sent to the SRAMs 208A and 208B for one frame of image data, and the DRAM 204B stores the image data for one frame. And a pair of SRAMs
Image data corresponding to the shortage is stored in 208A and 208.

Next, the steady processing control will be described with reference to FIG. First, as shown in FIG. 5A, the input terminal of the third switch 210 is switched to the A side,
8A is stored in the image recording apparatus main body 104.
Transfer to

Next, the input terminal 21 of the third switch 210
0 is switched to the B side, and the S
The image data is transferred from the RAM 208B. At the same time, the input terminal and the output terminal of the second switch are respectively switched to the A side, and the DRAM is transferred to the empty SRAM 208A.
The image data is read from the memory 204A and stored (see FIG. 5).
(B)).

When the transfer of the image data from the SRAM 208B is completed, new image data has already been stored in the SRAM 208A.
Is switched to the A side again, and the second switch 2
The output terminal of the switch 06 is switched to the B side, and the transfer of the image data from the SRAM 208A and the storage of the image in the SRAM 208B are simultaneously performed (see FIG. 5C).

By repeating this alternately, the DRA
All the image data of one frame stored in M204A can be transferred to the image recording apparatus main body 104. In addition, the access at the time of this transfer is performed by the SRAMs 208A and 2A.
Since the image can be sent at an access speed of 08B, no stress (such as a waiting time) is applied to the image recording apparatus main body 104.

When the image data stored in the DRAM 204A has been completed and the next image data is to be continuously sent to the image recording apparatus main body 104, the input end of the second switch 206 is switched to the B side, and the same as above. SRAM 208A, 20
8B and alternate transfer of image data from the SRAMs 208A and 208B (see FIG. 5D).

When the image data is read from the DRAM 204B, the output terminal of the first switch 202 is set to A.
Side, and the empty DRAM 204A is
If the next image data is fetched from the hard disk 112 via the FO 200, the image data of a plurality of frames (a plurality of pages) can be continuously transferred to the image recording apparatus main body 104 (see FIG. 5E). .

As described above, in this embodiment, a pair of DRAMs 204A and 204B are used to read image data for one main scan from the hard disk 112.
The image data for one main scan is divided into a pair of S
The data is sent to the RAMs 208A and 208B.
A and 208B alternately transfer image data to the image recording apparatus main body 104, and at the same time
Since the next divided image data is stored in 8A and 208B, the pair of SRAMs 208A and 208B are alternately connected to the image recording apparatus main body 104 (by switching the third switch 210) and the divided image data is transferred. By doing so, it is possible to access image data at an appropriate processing speed without giving stress such as waiting time to the image recording apparatus main body 104. For this reason, it is possible to cope with a drastic increase in the amount of image data based on higher resolution, colorization, multiple recording (simultaneous recording of a plurality of main scans), and the like.

That is, a pair of SRAMs 208A and 20A
By switching and using 8B, the storage capacity of a memory having a high processing speed but a small storage capacity like an SRAM can be reliably increased for one main scan recording without increasing the storage capacity of the memory for one main scan recording. Image data can be handled at a processing speed conforming to the SRAM. In addition, since the image data can be read from the hard disk 112 by using the DRAMs 204A and 204B as one unit by one main scanning recording as in the conventional case, the processing on the hard disk 112 side is not changed, and the conventional apparatus is directly followed. can do.

In this embodiment, the storage system in the second buffer 114 is a pair of DRAMs 204A,
Although the configuration is made up of the SRAM 04B and the pair of SRAMs 208A and 208B, three or more SRAMs may be provided.

[0072]

As described above, the image processing method and the image processing apparatus according to the present invention have a capacity capable of reliably storing image data required for one-scanning recording of the output system, and the processing speed of the output system. Has an excellent effect that it is possible to construct a buffer capable of high-speed access corresponding to.

[Brief description of the drawings]

FIG. 1 is a block diagram of an image data transfer control system according to the present embodiment.

FIG. 2 is a perspective view illustrating a schematic configuration of an image recording apparatus main body applied in the present embodiment.

FIG. 3 is a block diagram showing an internal configuration of a second buffer.

FIG. 4 is a control block diagram showing a processing procedure of image data in a second buffer (preparation processing control).

FIG. 5 is a control block diagram showing a procedure for processing image data in a second buffer (regular processing control).

[Explanation of symbols]

 REFERENCE SIGNS LIST 100 host computer 102 input / output control unit 104 image recording apparatus main body (output system) 107 data conversion / editing unit 108 first buffer 112 hard disk 114 second buffer 116 controller 120 CPU (image data input control unit) 202 first Switch 204A, B DRAM 206 Second switch 208A, B SRAM 210 Third switch

Claims (2)

[Claims] 1. An image processing method for transferring image data to an output device for recording an image on a recording material, the image processing method comprising: storing image data of a capacity required for one main scan recording of the output device. And re-store the data in at least two or more memories having a storage capacity that is compatible with the processing speed of the output device and is smaller than the image data capacity required for the one main scan recording, and the divided images stored in one memory An image processing method, characterized in that, simultaneously with the transfer of data to an output device, the storage of the next divided image data in another memory that has been emptied by the previous transfer is sequentially repeated. 2. An image processing apparatus for transferring image data to an output device for recording an image on a recording material, each having a storage capacity capable of storing at least one main scan recording of image data. A pair of first memories, a first switch for selectively switching a transmission path for transmitting input image data to any of the pair of first memories, and capable of coping with a continuous operation of the output device Processing speed,
A pair of second memories capable of storing a part of the image data for one main scan recording, and a pair of second memories disposed between the pair of first memories and the pair of second memories. A second switch for selectively switching a transmission path for transmitting image data from any one of the first memories to any one of the pair of second memories; and selectively switching the image data stored in the second memory. A third switch for switching a transmission path to be transferred to the output device; and controlling the first switch to store the data in the first memory.
Image data input control means for alternately executing inputting of image data for each main scan between the pair of first memories; and controlling the second switch and the third switch, Dividing the image data for each main scan recording stored in one memory and sending the divided image data to the second memory, and simultaneously transferring the divided image data stored in the second memory to the output device Image data output control means for alternately executing the processing between the pair of first memories and the pair of second memories.