JPH11274964A - High frequency module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To form a PLL loop having no power loss by using a reference oscillator, a PLL selecting IC and a VCO(voltage-controlled oscillation circuit) having a frequency multiplication circuit and transmitting an input signal to the PLL selecting IC via a low-pass filter(LPF), a high-pass filter(HPF) and/or a band limiting filter(BLF). SOLUTION: A reference oscillator 11 is added to a PLL selecting IC 12. Meanwhile, a loop is formed so as to input the oscillation signal output of a VCO 14 to the IC 12 after the power distribution, so as to return the oscillation signal output to the VCO 14 via a loop filter 13. A filter circuit 17 consists of an LPF, an HPF and a BLF. The signal which is equivalent to a multiplied signal is fed back to connect the circuit 17. Alternatively, the output of the oscillator 11 is added to the VCO 14 via the filter 13 and its output is distributed. This distributed output is added in part to a double frequency multiplication circuit 18 and then partly added to the circuit 17 via a direct route by means of a leak signal existing at a high frequency set point.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency module, and more particularly to a high-frequency module applied to a mobile communication module or a broadcast receiving module (tuner) such as a TV or VTR.

[0002]

2. Description of the Related Art A PLL loop (or PL) of a conventional high-frequency module (or also called a tuner) is known.
The L phase locked loop is shown in FIG. 7 and will be described. In general, a PLL frequency synthesizer system is generally used in a heterodyne type device such as a transceiver or a communication device in order to generate a local oscillation signal frequency corresponding to each channel. In FIG. 7, a PLL phase locked loop 50 using a conventional PLL frequency synthesizer system adds a reference oscillator 51 to an IC 52 for PLL tuning, and on the other hand,
After the oscillation signal output of VOC 54 is
The output is directly input to the L channel selection IC 52, and the output forms a loop returning to the VOC 54 via the loop filter 53. The reference oscillator 51 is an oscillator that outputs a signal frequency serving as a clock for digitally operating the PLL,
VCO54 is Voltage Controlled
Oscillator is an abbreviation for voltage controlled oscillator.
The loop filter 53 is a low-pass filter (LPF: Low PassF) that plays a role of removing a noise component of the output signal of the phase comparator inside the PLL tuning IC 52.
ilter).

[0003]

However, the conventional method has the following problems. For example, as shown in FIG.
If the CO signal is 950 MHz and the response frequency of the PLL tuning IC 56 is 500 MHz or less, the response frequency band does not match.
There is a problem that it cannot be combined and does not operate. Also,
Such a loop circuit is called a PLL phase locked loop.

In order to solve the above problem, for example, as shown in FIG.
Assuming that the O signal is 950 MHz and the response frequency of the PLL tuning IC 57 is 1000 MHz,
Although the VCO signal can be directly coupled to the PLL tuning IC 58, the operation characteristics (phase noise characteristics, C / N characteristics, S / N characteristics) may be caused by interference with the VCO and the PLL loop itself due to load fluctuation on the VCO output side. ) Is deteriorated or reduced.

As another method, there is a method of adding a frequency multiplying circuit 60 as shown in FIG. For example, if the required VCO frequency is 950 MHz, half of 475 MHz is oscillated by the VCO 61 and PL
A PLL phase-locked loop is formed as an input to the L tuning IC 62, and a circuit for doubling the frequency, that is, a frequency multiplication circuit 60 is provided to obtain an output of 950 MHz. Will use the one of 500 MHz. However, in this case, there is no problem with the above-mentioned load fluctuation, but as described later, a slightly complicated problem may occur in some cases.

FIG. 1 illustrates the problem of this conventional example.
11 and FIG. 11. FIG. 11 is a diagram illustrating the flow of frequencies, including the internal circuit of the PLL tuning IC 62, and FIG. 10 is an overall block diagram thereof. In FIG. 11, reference numeral 66 denotes a prescaler (Prescaler,
Frequency divider), 70 is a 1/2 prescaler, 72 is a power divider, and 73 is a frequency multiplier (× 2). The required VCO frequency f _TX is 930.125 MHZ, which is the frequency applied to the RF module for European cordless telephones. At this time, “/ N” 69 is usually called a programmable divider, and “/ R” 67 is usually called a reference divider, and the signal f _{VCO of the VCO} 61 is respectively used.
And the reference oscillator 51 (21.25 MHz) are frequency-divided to have the same comparison frequency (here, 3.125 KHz).
At 74, the phase is detected by the phase comparator 68. Expressing these frequencies by the formula, relative to _{1ch, f TX = 930.0125MH Z f} VCO = 465.00625MH Z 465.00625 × 10 6 = (3.125 × 10 3) ×
2 × N ₁ with respect to _{N 1 = 74401 2ch, f TX} = 930.0375MH Z f VCO = 465.01875MH Z 465.01875 × 10 6 = (3.125 × 10 3) ×
2 × N ₂ N ₂ = 74403 Thus, “N” and “R” are integers (in this conventional example, N ₁ = 74401 or N ₂ = 74403, R = 34
00), the comparison frequency f is f ₁ =
3.125 kHz or less f ₂ = 1.562
5KHz or, f ₃ = 0.78125KHz, is limited to a specific frequency and the like. However, in a voice communication device, for example, all of these frequencies fall within the voice band, so that interference occurs, which causes some problems in voice quality.

In FIG. 10, reference numeral 62 denotes a PLL tuning I
C and 51 are reference oscillators, 61 is a VCO, 63 is a power divider, 60 is a frequency multiplier (× 2), and 53 is a loop filter.

In the case of FIG. 11, the comparison frequency is set to 3.1.
Although the frequency was set to 25 KHz, the comparison frequency was doubled to 3.KHz.
FIG. 1 shows a case where 125 kHz × 2 = 6.250 kHz.
3 and FIG. 12, and FIG. 13 is a PLL tuning IC 76.
And FIG. 12 is a block diagram of the entire circuit, including the internal circuit of FIG.

In FIG. 13, reference numeral 76 denotes a PLL tuning I
C and 65 are reference oscillators, 66 is a prescaler, 77 is “/ R” (reference divider), 68 is a phase comparator, 69 is “/ N” (programmable divider), and 70 is a prescaler. Also, VOC7
1 of frequency f _VCO is 465.01875MH _Z, it is multiplied twice by the frequency multiplier circuit 73, the required VC
930.0125MH _Z next to O frequency f _TX, together with the output of the prescaler 70, via the power divider 72, is output. When these frequencies are represented by the formula, 1ch
_{Respect, f TX = 930.0125MH Z 930.0125 ×} 10 6 = (6.250 × 10 3) × 2
Respect _{× N 1 N 1 = 74401 2ch} , f TX = 930.0375MH Z 930.0375 × 10 6 = (6.250 × 10 3) × 2
× N ₂ N ₂ = 74403 By increasing the comparison frequency to 6.250 KHz,
Since it can be set near the limit of the voice band, the problem of voice quality due to interference can be reduced.

In FIG. 12, reference numeral 64 denotes a PLL tuning I
C and 65 are reference oscillators, 71 is a VCO, 72 is a power divider, 73 is a frequency multiplier (× 2), and 75 is a loop filter.

The problems to be solved by the invention can be summarized as follows: (1) It is necessary to arrange a circuit including a loss such as a power divider in a feedback loop to a PLL tuning IC. Is 5 dB, the signal is lost by that amount. (2) If a circuit (buffer circuit) such as a power divider is arranged in the feedback loop to the PLL tuning IC after the frequency multiplier, V
The solution is to solve the characteristic deterioration due to the interference with the OC,
The interference to the PLL tuning IC circuit is improved only by 5 dB, for example, if the power divider has a loss of 5 dB.

[0012]

A high-frequency module according to a first aspect of the present invention includes a reference oscillator, a PLL tuning IC, and a voltage controlled oscillator (VCO) having a frequency multiplier circuit. The input signal to the IC is obtained through a filter circuit having a low-pass filter (LPF) or a high-pass filter (HPF) or a band-limited filter (BPF). Is what you do.

Further, the high-frequency module according to a second aspect of the present invention is characterized in that the output of the VCO is distributed by a power distributor, and the output is input to the filter circuit.

According to a third aspect of the present invention, in the high frequency module, an output of a VCO is directly input to the filter circuit.

In the high-frequency module according to the fourth aspect of the present invention, the high-frequency module uses the leakage signal of the pattern layout to generate a VC signal.
The output of O is input to the filter circuit.

In the high-frequency module according to the fifth aspect of the present invention, the comparison frequency inside the PLL tuning IC may be 5 or more.
The frequency is set to a high frequency of KHz or more.

Further, in the high frequency module according to the present invention, the output of a PLL loop circuit composed of the reference oscillator, the PLL tuning IC, the voltage controlled oscillator circuit VCO, and the filter circuit is frequency multiplied. It is characterized by outputting to the outside via a circuit.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS [First Embodiment] FIG. 1 is a block diagram showing the configuration of a high-frequency module according to one embodiment of the present invention. In FIG. 1, the present invention is a high-frequency module (also called a tuner) having a PLL phase-locked loop (PLL loop) based on a PLL frequency synthesizer system. A high-frequency module 10 includes a reference oscillator 11 added to a PLL tuning IC 12. On the other hand, the output of the oscillation signal of the VOC 14 is input to the PLL tuning IC 12 after power distribution, and the output forms a loop returning to the VOC 14 via the loop filter 13. The filter circuit 17 is an LPF (Low)
Pass Filter, low-pass filter) and / or
HPF (High Pass Filter, high pass filter) and / or BPF (Band Pass Fi)
ter, band-limited filter). V
The CO signal is 950 MHz, and the PLL tuning IC 12
Is 1000 MHz and 19 is VCO1
4 shows a high-frequency grounding point (GND point). The reference oscillator 11 is an oscillator that outputs a signal frequency serving as a clock for digitally operating the PLL.
old Controlled Oscilla
tor, which stands for voltage controlled oscillator.

The loop filter 13 is a noise elimination filter on the VOC control voltage line, and the filter circuit 17 is a high frequency filter for removing the high frequency and pre-assembly of the VOC and inputting it to the PLL tuning IC. , Loop filter 13 and filter circuit 17
Are completely different in function and configuration.

In the configuration of the first embodiment of the high-frequency module according to the embodiment of the present invention, the signal after frequency multiplication is fed back to the PLL tuning IC 64 as shown in FIG. Instead, the signal of the original oscillation of the VCO is taken out (route 16 in FIG. 1), and the output is taken as a low-pass filter (LPF) and / or a high-pass filter (HPF) and / or a band-limited filter ( BPF) or other filter circuit 17 and PLL tuning IC 12
(Combined). Finally, the PLL tuning IC 12
For example, when the signal passes through a filter circuit 17 such as a high-pass filter (HPF) and / or a band-pass filter (BPF), the same operation (using the same N, The same R, the same comparison frequency, for example, VCO frequency f _TX is 930.125 MHZ, N ₁ = 74401, N ₂
= 74403, R = 3400 or R = 1700, comparison frequency f 6.25 KHz, etc.). That is, PLL
By using the filter circuit 17 as an input to the tuning IC 12, a signal equivalent to the signal after the multiplication is actually fed back, despite the fact that the signal is picked up from the original oscillation circuit (VCO 14). Are to be combined.

The low-pass filter (LP) of the filter circuit 17
F), high-pass filter (HPF), band-limited filter (BP
F) is usually used for removing a high frequency or the like and operating the PLL tuning IC with a regular frequency signal.
The low-pass filter (LPF) is a filter that passes low-frequency components below a predetermined frequency and attenuates high-frequency components above a predetermined frequency. On the other hand, a high-pass filter (HPF) is a filter that attenuates low-frequency components below a predetermined frequency and passes high-frequency components above a predetermined frequency. The band-limited filter (BPF) is a filter that passes only a predetermined frequency band and attenuates both a frequency component lower than the predetermined band and a frequency component higher than the predetermined band. The bandpass filter (BPF) is a low-pass filter (L
Since the circuit scale becomes large and expensive compared to the PF) or the high-pass filter (HPF), the high-pass filter (HPF) is used when the high-frequency (harmonic) component is sufficiently suppressed. This achieves its purpose. For example, 46
930 without inputting 5MHz signal to PLL tuning IC
In order to input a signal of MHZ, a high-pass filter (HPF) or a band-pass filter (BPF) is used to remove the signal of 465 MHz, and the signal of 930 MHz is hollowed out by these filters. .

[Second Embodiment] FIG. 2 is a block diagram showing a configuration of a high-frequency module according to another embodiment of the present invention. The main difference between FIG. 2 and FIG.
(1) The output of the VCO 14 is directly input (coupled) to the filter circuit 17 without passing through the power divider, and (2) The output of the VCO 14 is input (coupled) to the filter circuit 17 with the high-frequency ground point 21. It is provided on the route 22.

In FIG. 2, the high-frequency module 20 comprises:
The reference oscillator 11 is added to the PLL tuning IC 12, while the VOC 14 oscillation signal output is
The output is directly input to the LL tuning IC 12, and the output forms a loop returning to the VOC 14 via the loop filter 13. The output is passed through a loop filter 13 to V
The output of the VCO 14 is distributed to the CO 14, the output of the VCO 14 is distributed, and a part of the output is supplied to the frequency doubler circuit 18. Is added to The filter circuit 17 is an LPF (Low Pass Filter).
r, low-pass filter) and / or HPF (High P
as Filter, high-pass filter) and / or B
PF (Band Pass Filter). VCO signal is 950MHZ
and the response frequency of the PLL tuning IC 12 is 100
0 MHz, and 21 indicates a high-frequency ground point (GND point) of the VCO oscillation circuit 14.

FIG. 3 is an example of an actual circuit diagram of the first embodiment, and is an excerpt of a circuit diagram of a high-frequency module for a cordless telephone of European specifications. Transistor Tr
Reference numeral 1 denotes an oscillation transistor of the VCO oscillation circuit 14, and a transistor Tr2 is a circuit transistor of the frequency multiplier 18. 11 is a reference oscillator. Further, the loop filter 13, the VCO circuit 14, the filter circuit 17, the power distributor 15, and the frequency multiplier circuit 18 are indicated by dotted lines.

The terminal 30 of the PLL tuning IC 12 is connected to VO
C is a feedback loop connecting the filter circuit 17 (LPF, BPF, or HPF) to the PLL tuning IC 12, and the terminal 3 of the PLL tuning IC 12
Reference numeral 1 denotes a loop 33 connecting the phase comparator of the PLL tuning IC, the loop filter 13 and the VOC.

FIG. 4 is an example of an actual circuit diagram of the second embodiment. The signal after the frequency multiplying circuit is filtered by a filter circuit 17 (LPF, BPF, or HPF), and then a PLL is applied. It is an example of a circuit diagram of a tuner (high-frequency module) of a type that feeds back to a tuning IC. The transistor Tr1 is an oscillation transistor of the VCO oscillation circuit 14, and the transistor T1
r2 is a circuit transistor of the frequency multiplier 18. 11 is a reference oscillator. Further, the loop filter 13, the VCO circuit 14, the power distributor 15, the filter circuit 17, and the frequency multiplying circuit 18 are shown by dotted lines.

The terminal 34 of the PLL tuning IC 12 is a PLL.
Phase comparator of tuning IC, loop filter 13 and VO
A loop 36 connecting C14 and the PLL tuning IC 1
2 terminal 35 is a frequency multiplying circuit 18 and a PLL tuning IC.
A feedback loop 37 connects the filter 12 and the filter circuit 17 (LPF, BPF, or HPF), and is connected to the power distributor 15.

FIG. 5 is an example of an actual circuit diagram of the second embodiment. The filter circuit 17 is an example of an HPF (high-pass filter). The transistor Tr1 is an oscillation transistor of the VCO oscillation circuit 14, and the transistor Tr2 is a circuit transistor of the frequency multiplication circuit 18. 11 is a reference oscillator. Further, the loop filter 13, the VCO circuit 14, the filter circuit 17, and the frequency multiplying circuit 18 are shown by dotted lines.

The terminal 23 of the PLL tuning IC 12 is a PLL.
Phase comparator of tuning IC, loop filter 13 and VO
A terminal 24 of the PLL tuning IC 12 is a feedback loop 22 connecting the VOC 14, the filter circuit 17 (LPF, BPF, or HPF) and the PLL tuning IC 12.

The capacitor 28 is a high-frequency grounding capacitance component of the VCO 14, and a point 27 where there is no signal.
Of the Colpitts-type oscillator, and picks up a leakage signal of an oscillating component from the collector pattern of the transistor Tr1. The L-type HPF 17 cuts through the signal twice as much as the original oscillation and inputs the signal to the PLL tuning IC 12. I have.

FIG. 6 shows an example of the printed circuit board pattern layout diagram of FIG. 5, FIG. 6 (a) is an overall printed circuit board pattern layout diagram, and FIG.
FIG. 3A is a partially enlarged view of FIG.
FIG. 3 is a partially enlarged view centering on r2, PLL tuning IC 12, capacitor 28, and point 27 where there is no signal originally. The capacitor 28 is a high-frequency grounding capacitance component of the VCO 14, picks up a leak signal from the collector pattern of the transistor Tr1 of the Colpitts oscillator at the point 27 where there is no signal, and selects the PLL through the filter circuit 17. The input is made to the IC 12 for use.

The examples of the high-frequency module according to the embodiment shown in FIGS. 3 to 6 are all examples applied to the RF block (high-frequency module) for a cordless telephone of European specification. For example,
Naturally, the present invention can be applied to a high-frequency module for mobile communication, a high-frequency module for broadcast reception such as a TV or VTR, and a high-frequency module such as a high-frequency module for satellite broadcast in the same manner.

[0033]

As described above, according to the high frequency module according to the first aspect of the present invention, the voltage controlled oscillator (VC) having the reference oscillator, the PLL tuning IC, and the frequency multiplier is provided.
O) and the input signal to the PLL tuning IC is a low-pass filter (LPF) or a high-pass filter (HP
F) or through a filter circuit having a band-limited filter (BPF). Therefore, originally, the present invention is based on the signal of the original oscillation (for example, 4
65 MHz) is fed back to the PLL tuning IC. By using the T-type HPF, a harmonic (for example, 930 MHz) is fed back to the PLL tuning IC as if it were a frequency-multiplied signal. , PLL
A loop can be formed.

Further, according to the high frequency module of the present invention, the output of the VCO is distributed by the power distributor, and the output is input to the filter circuit. Therefore, for example, by using a T-type LPF for the filter circuit 17 in FIG. 4, a harmonic (for example, 1395 MHz (to 1395 MHz)) of the output signal of the frequency multiplier 18 is used.
465 × 3) and 1860 MHz (〜465 × 4) signals can be attenuated to form a PLL loop that feeds back a required 930 MHz signal to the PLL tuning IC.

According to a third aspect of the present invention, the output of the VCO is directly input to the filter circuit. Therefore, for example, as shown in FIG. 5, since a power divider does not need to be used, there is no power loss, PLL feedback can be performed, and a PLL loop can be formed with a required 930 MHz signal.

Further, according to the high frequency module of the present invention, the output of the VCO is input to the filter circuit using the leakage signal of the pattern layout. Therefore, since a power divider does not need to be used, there is no power loss, PLL feedback can be performed, and a PLL loop can be formed with a required 930 MHz signal.

Further, according to the high frequency module of the present invention, the comparison frequency inside the PLL tuning IC is set to a high frequency of 5 KHz or more. Therefore, the influence on the audio frequency band is eliminated, and the comparison frequency can be set higher, so that the design of the low phase noise oscillator becomes easy, and the design of the oscillator having good vibration proof characteristics becomes easy.

Further, according to the high frequency module of the present invention, the output of the PLL loop circuit composed of the reference oscillator, the PLL tuning IC, the voltage controlled oscillator circuit VCO and the filter circuit is provided. It is characterized in that it is output to the outside via a frequency multiplying circuit. Therefore, there is no need to use a power divider, and the current consumption (power consumption) of the power amplifier, buffer amplifier, etc., in order to recover the loss as a total system
Can be minimized.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a high-frequency module according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a high-frequency module according to another embodiment of the present invention.

FIG. 3 is an example of an actual circuit diagram of a high-frequency module according to another embodiment of the present invention.

FIG. 4 is another example of an actual circuit diagram of the high-frequency module according to the first embodiment of the present invention.

FIG. 5 is an example of an actual circuit diagram of a high-frequency module according to a second embodiment of the present invention.

6A and 6B are actual printed circuit board pattern layout diagrams of the high-frequency module according to the second embodiment of the present invention, wherein FIG. 6A is an overall printed circuit board pattern layout diagram, and FIG. Transistors Tr1, Tr
FIG. 2 is a partially enlarged view centering on a PLL tuning IC 12, a capacitor 28, and a point 27 where there is no signal originally.

FIG. 7 is a block diagram of a conventional high-frequency module.

FIG. 8 is a block diagram of another conventional high-frequency module.

FIG. 9 is a block diagram of another conventional high-frequency module.

FIG. 10 is a block diagram of another conventional high-frequency module.

FIG. 11 shows a PLL tuning channel I of a conventional high-frequency module.
It is a figure explaining the flow of the frequency described including the internal circuit of C64 (comparison frequency: 3.125 KHz).

FIG. 12 is an overall block diagram of a conventional high-frequency module, which is related to FIG. 10;

FIG. 13 shows a PLL tuning channel I of a conventional high-frequency module.
FIG. 3 is a diagram (comparison frequency: 6.250 KHz) for explaining the flow of frequencies described including the internal circuit of C64.
Related to 2.

[Explanation of symbols]

Reference Signs List 10 high-frequency module 11 reference oscillator 12 PLL tuning IC 13 loop filter 14 VCO (voltage controlled oscillator) 15 power distributor 16 route 17 filter circuit (low-pass filter (LPF) or high-pass filter (HPF), Or a band-limited filter (BPF) 18) Frequency multiplier 19 High-frequency grounding point (GND point) of VCO 14 20 High-frequency module 21 High-frequency grounding point (GND point) of VCO oscillation circuit 14 22 VOC 14 and PLL tuning IC 12 23 A terminal of the PLL tuning IC 12 24 A terminal of the PLL tuning IC 12 25 A loop connecting the phase comparator of the PLL tuning IC, the loop filter 13 and the VOC 14 27 Indicates a point where there is no signal originally. , Colpitts oscillator transistor Tr1 Point for picking up a leak signal from a rectifier pattern 28 Capacitor 30 Terminal of PLL tuning IC 12 31 Terminal of PLL tuning IC 12 32 Feedback loop connecting VOC and PLL tuning IC 12 33 Phase comparison of PLL tuning IC The loop connecting the filter, the loop filter 13 and the VOC 14 34 The terminal of the PLL tuning IC 12 36 The phase comparator of the PLL tuning IC 12 and the feed loop connecting the loop filter 13 and the VOC 14 37 The terminal 35 of the PLL tuning IC 12 Feedback loop connecting VOC 14 and PLL tuning IC 12 Transistor Tr1 Oscillation transistor of VCO oscillation circuit 14 Transistor Tr2 Circuit transistor of frequency multiplication circuit 18

Claims (6)

[Claims] 1. A high-frequency module for mobile communication, a high-frequency module for broadcast reception such as a TV or a VTR, a high-frequency module for a satellite broadcast, and the like, a voltage control having a reference oscillator, a PLL tuning IC, and a frequency multiplication circuit. An input signal to the PLL tuning IC including an oscillation circuit (VCO) is supplied to a low-pass filter (LPF) or a high-pass filter (HPF) or a band-limited filter (B
PF) through a filter circuit having a high frequency module. 2. The high-frequency module according to claim 1, wherein the output of the VCO is distributed by a power divider, and the output is input to the filter circuit. 3. The high-frequency module according to claim 1, wherein an output of a VCO is input to said filter circuit. 4. The high-frequency module according to claim 3, wherein an output of a VCO is input to the filter circuit using a leak signal of a pattern layout. 5. The high-frequency module according to claim 1, wherein the comparison frequency inside the PLL tuning IC is 5 kHz.
A high-frequency module characterized by setting the above high frequency. 6. The high-frequency module according to claim 1, wherein an output of a PLL loop circuit including the reference oscillator, the PLL tuning IC, the voltage-controlled oscillation circuit VCO, and the filter circuit is passed through a frequency multiplication circuit. A high frequency module characterized by outputting to the outside.