JPH1126689A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make it possible to densely mount a plurality of semiconductor chips in lamination in one package without making it thick, by exposing the reverse side of an island to the surface of a resin. SOLUTION: A first semiconductor chip 50 is stuck on an island 53, and a second semiconductor chip 51 is further stuck on the first semiconductor chip 50. Each of bonding pads 52 of the semiconductor chips 50, 51, respectively, is wire-bonded to the tip of a lead terminal 57 by using a wire 56. Further, the island 53 is lowered so that the reverse side of the island 53 is exposed to the surface of a resin 58, followed by molding a main portion thereof including the semiconductor chips, with the use of a resin. Furthermore, a filler 61 is mingled to an insulative bonding material 54 between the island 53 and the semiconductor chip 50.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having an island smaller in size than a semiconductor chip and capable of thinning external dimensions.

[0002]

2. Description of the Related Art A transfer molding method for sealing a semiconductor chip 1 with a thermosetting epoxy resin 2 as shown in FIG. Technology. A seed frame is used as a support material for the semiconductor chip 1. The semiconductor chip 1 is die-bonded to the island 3 of the lead frame, and the bonding pads and the leads 4 of the semiconductor chip 1 are connected to the wires 5.
It is manufactured by setting a lead frame in a mold having a desired outer shape, injecting an epoxy resin into the mold, and curing the lead frame.

On the other hand, the wave of miniaturization and weight reduction of various electronic devices is unavoidable, and semiconductor devices incorporated therein are desired to have higher capacity, higher function, and higher integration. Therefore, a technique for sealing a plurality of semiconductor chips in a single package, which has existed as an idea (for example, Japanese Patent Application Laid-Open No. 55-1111517), has been attracting attention, and a move toward realization has emerged. That is, FIG.
As shown in FIG. 1, the first semiconductor chip 1
a, the second semiconductor chip 1b is fixed on the first semiconductor chip 1a, the corresponding bonding pad and the lead 4 are connected with the bonding wire 5, and sealed with the resin 2.

[0004] Although this structure increases the cost, it is possible to reduce the size and weight by integrating a plurality of chips. Therefore, there is a strong desire to store the package in a surface-mounted and thin package rather than a DIP-type package having a sufficient external dimension, and this has a greater merit as a whole. However, the semiconductor chip 1 has
Since it is necessary to have a certain level of mechanical strength as a support substrate for circuit elements formed on the surface, at least about 200
The resin 2 has a thickness of about 200 μm above the semiconductor chip 1 in terms of the moisture resistance of the semiconductor device and the loop height of the bonding wires 5.
I want to secure a certain thickness. Taking in all the thicknesses required from the manufacturing and superimposing two or more chips results in the outer dimensions of the resin 2, especially the thickness (FIG. 3).
There is a drawback that the size of X) shown in (B) is increased, so that it does not fit in the external dimensions of a conventionally prepared package. Further, most of the manufacturing devices used in the post-process, such as a mold and a test and measurement device, have to be designed separately, and there is a disadvantage that the cost is greatly increased by capital investment.

For this reason, as shown in FIG. 5 of Japanese Patent Application No. 9-55174 (filed on Mar. 10, 1997), the back surface of the island 22 on which the semiconductor chips 20 and 21 are mounted is made of resin 23.
The leads and islands were stepped so as to be exposed on the surface of the substrate, and a plurality of semiconductor chips were stacked on the islands to reduce the height of the resin. In addition, since the package is warped due to a difference in thermal expansion coefficient between the island 22 and the resin 23, the island size is reduced.

That is, FIG. 4 is a plan view of the first chip 20 on the island 22 and the second chip 20 on the island 22.
Of the first and second chips 2 are provided.
0 and 21 are lead terminals 24 extended around the chip.
.. Are electrically connected to each other via thin metal wires 25. Also, from each corner of the island 22, tie bars 26
By extending a, 26b, 27a and 27b and integrating them with the lead frame, the support of the island and the twisting during molding are prevented.

[0007]

Here, the island 22
When the first semiconductor chip 20 is fixed with the insulating adhesive 28, the adhesive is applied to the island 22, and the semiconductor chip is placed and pressed to fix. However, tie bars 26a-
27b is smaller in width than the island,
Although the adhesive 28 spreads like the hatched portion shown in FIG. 4, there was a problem that it did not spread between the tie bars 26a to 27b and the first semiconductor chip 20 (the area marked with x).

FIG. 5 shows this cross-sectional view. The semiconductor chip 20 is fixed but slightly obliquely fixed. Although there is an adhesive in the island ID, the tie bar TB does not have an adhesive, so that the tie bar and the semiconductor chip are likely to be arranged so as to be close to or in contact with each other. Therefore, there is a problem that a high voltage is applied to an island or a tie bar exposed from the resin 23 due to an accident or the like and the semiconductor chip is broken.

[0009]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems. First, an adhesive insulating material is provided between an island and a semiconductor chip, and an insulating filler having substantially the same particle size is provided therein. This is solved by dispersing. This insulating filler serves as a spacer, which can prevent the semiconductor chip from being obliquely fixed.

Second, in the holding tie bar, a wide portion is provided from one side parallel to the side of the semiconductor chip, and an adhesive insulating material is provided between the island including the wide portion and the semiconductor chip. This problem is solved by providing the adhesive insulating material also between the semiconductor chip and the holding tie bar extending from the wide portion. If the resin is applied to the wide part, when pressing and fixing the chip from above, the resin is also extruded to the narrow tie bar,
The insulation between the tie bar and the semiconductor chip is further improved.

Third, by extending the holding tie bars from the four corners of the island, the rotation of the island can be suppressed, and the island and the semiconductor chip can be arranged in parallel. Fourth, by setting the wide portion to have a width to which the adhesive insulating material can be applied, the resin can be arranged near the tie bar.

Fifth, the problem is solved by mounting another semiconductor chip on the semiconductor chip.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below in detail with reference to FIG. In the figure, reference numerals 50 and 51 denote first and second semiconductor chips, respectively. On the silicon surfaces of the first and second semiconductor chips 50 and 51, various active and passive circuit elements are formed in a previous step, and further, bonding pads 52 for external connection are formed on peripheral portions of the chips. . A passivation film such as a silicon nitride film, a silicon oxide film, or a polyimide-based insulating film is formed so as to cover the bonding pad 52, and an upper portion of the bonding pad 52 is opened for electrical connection.

The first semiconductor chip 50 is die-bonded on the island 53 of the lead frame with an adhesive insulating material 54, and the second semiconductor chip 51 is further provided with an insulating epoxy on the passivation film of the first semiconductor chip 50. It is fixed by a system adhesive. Semiconductor chip 5
One end of a bonding wire 56 such as a gold wire is wire-bonded to the bonding pads 52 on the surfaces 0 and 51, and the other end of the bonding wire 56 is wire-bonded to the tip 57a of a lead terminal 57 for external lead-out. I have.
Thus, each bonding pad 52 and each lead 57
And are electrically connected.

The main parts including the semiconductor chips 50 and 51, the tip 57a of the lead terminal, and the wire 56 are molded around with an epoxy-based thermosetting resin 58 and packaged. The lead terminal 57 is led out from a position on the side wall of the package, which is about half the thickness of the resin 58, as in the conventional drawing shown in FIG. The lead terminal 57 led out of the resin 58 is bent downward at one end, bent again, and formed into a Z-shape. This forming shape is a shape for surface mounting use in which the fixed portion on the back side of the lead terminal 57 is opposed to the conductive pattern formed on the printed circuit board.

As described with reference to FIG. 5, the back surface of the island 53 on which the semiconductor chips 50 and 51 are mounted
The leads 57 and the islands 53 are stepped so as to be exposed on the surface of the semiconductor device, and a plurality of semiconductor chips 50 and 51 are stacked on the islands 53 to reduce the height of the resin. In addition, since the package warps due to the difference in thermal expansion coefficient between the island 53 and the resin 58, the island size is reduced.

That is, as shown in FIG. 1, the holding tie bars 59a to 60b extend from each corner of the island 53 and are integrated with the lead frame, thereby supporting the island and preventing twisting during molding. ing.
Here, if the twist of the island is not a problem, the holding tie bars 59a and 59b are reduced to one, and
0a and 60b may be one.

A feature of the present invention resides in the adhesive insulating material 54. The insulating material 54 includes an insulating filler 61 having a substantially uniform particle size dispersed therein, and the island 53 and the semiconductor chip 50.
Are arranged in parallel to each other.
In other words, even if a viscous adhesive insulating material is applied on the island 53 and the insulating material is spread as shown in FIG.
Are dispersed, the island 53 and the semiconductor chip 50 can be maintained at a constant distance, and the oblique arrangement as shown in FIG. 5 can be prevented.

The manufacturing method will be briefly described. First, the holding tie bars 59a to 60b provided at the four corners of the island 53 are stepped in the state of a lead frame, so that the height of the island 53 and the lead terminal tip 57a are reduced. The first and second semiconductor chips 10 and 11 are die-bonded to the island 53 with an adhesive insulating material, and the bonding pad 52 and the tip 57 of the lead terminal are formed.
a is wire-bonded.

Next, the frame of the lead frame and the lead terminal 57 are sandwiched and fixed between the upper and lower molds so that the island 53 is located in the cavity provided in the upper and lower molds, and the resin is injected and cured in such a state. Can be obtained. The lead frame is formed by etching or punching a copper-based or iron-based plate-like material having a thickness of 150 to 200 μ to form an island 53 and a lead terminal 5.
Each part such as 7 is molded, and each part is held by the lead frame until it is cut after the molding step. While being held, the tip 57 of the lead terminal
a and the frame have the same height, and the island 53
Only the steps are stepped and the heights are different. Therefore, in the completed device, the tie bars 59a to 59a-6
0b is bent upward inside the resin 58,
At a position corresponding to the height of the resin 58, and the cut surface is exposed and terminated at the surface of the resin 58.

Each of the semiconductor chips 50 and 51 is polished on the back surface by a back grinding process immediately before the assembly process to obtain
The thickness is about 300 μm. The thickness of the lead terminal 57 is about 130 μm. Since the islands 53 are formed simultaneously from the plate-like material, the plate thickness of the island 53 is also the same value, which is almost the limit value for maintaining the mechanical strength of each part. In the present invention,
Lower the height of the island 53 to the limit, and
Is molded so that the back surface of the resin is exposed to the surface of the resin 58, so that the resin has a sufficient thickness. The back surface of the island constitutes a flat surface with the surface of the resin 58, which is installed so that the back surface of the island comes into contact with the surface of the cavity of the lower mold when setting the lead frame in the cavity,
It can be obtained by resin sealing. Since the position of the island 53 has been lowered, the plate thickness of the island 53, the thicknesses of the first and second semiconductor chips 50 and 51, and the adhesive 5
Even if the thicknesses of 4 and 55 (each having a thickness of 30 to 40 μm) are subtracted, 240 to 55
It is possible to leave a thickness of the resin 18 of 300 μm.
This value is a value that can solve the problem of the loop height of the wire 56 in the wire bonding step.

As described above, by arranging the position so that the back surface of the island 53 is exposed to the lower surface of the resin 58, a margin can be given to the thickness of the resin 58 and the external dimensions of the resin can be reduced. You can do it. This allows
It is possible to provide a semiconductor device that does not increase the thickness of the external dimensions even when a plurality of semiconductor chips 50 and 51 are stacked in one package.

Therefore, the conventional equipment such as a mold and a test and measurement device can be used as it is only by changing the lead frame, and new equipment investment is not required, so that the cost of the product can be reduced. In addition, since the thickness of the semiconductor chips 50 and 51 does not need to be reduced more than necessary, and the mechanical strength of the silicon wafer can be maintained, the handleability of the wafer after the back grinding process is excellent.

Next, a second embodiment will be briefly described with reference to FIG. Since most of them have the same configuration, only different portions will be described. The first part is an island 53. A wide portion HB is provided near the intersection of the main side SD parallel to the side of the semiconductor chip 50 and the holding tie bars 59a to 60b, so that the adhesive insulating material 54 can be applied thereto. The insulating material 54 can be applied to the island and the wide portion of the holding bar by using a dispenser, and if the semiconductor chip 50 is placed on this and pressed, the insulating material extends from the wide portion HB onto the tie bar. Be present. Therefore, since the insulating material is disposed between the holding tie bar and the semiconductor chip, the oblique arrangement is suppressed. Further, even if the holding tie bar is disposed obliquely, since the insulating material is applied to the holding tie bar, the withstand voltage between the island and the semiconductor chip is improved.

Further, as in the first embodiment, if a filler having a substantially uniform particle size is dispersed, the insulating property is further improved.

[0026]

As described above, according to the present invention,
By laminating a plurality of semiconductor chips in one package, there is an advantage that a high-density packaged product can be provided in accordance with a demand for reduction in the size and weight of electronic devices. Furthermore, by providing an adhesive insulating material between the island and the semiconductor chip and dispersing an insulating filler having substantially the same particle size therein, the island and the semiconductor chip can be arranged in parallel, and the withstand voltage due to the oblique arrangement as in the related art can be achieved. The decrease can be suppressed.

The pressure resistance can be improved by providing an adhesive insulating material flowing out of the wide portion also between the holding tie bar extending from the wide portion and the semiconductor chip. By extending the holding tie bars from the four corners of the island, the island can be firmly held horizontally, and the island and the semiconductor chip can be further arranged in parallel.

By setting the wide portion to a width that allows the adhesive insulating material to be applied, the resin can be placed near the tie bar by a device such as a dispenser, and the insulating material can be placed on the tie bar by the flow of the chip pressing. .

[Brief description of the drawings]

FIG. 1 is a plan view of a semiconductor device for describing the present invention.

FIG. 2 is a plan view of a semiconductor device for describing the present invention.

FIG. 3 is a cross-sectional view for explaining a conventional example.

FIG. 4 is a plan view for explaining a conventional example.

FIG. 5 is a sectional view for explaining a conventional example.

Claims (5)

[Claims] 1. A holding tie bar extending outward from one of a pair of opposite sides of an island, and a semiconductor having a size larger than the island size and mounted on a part of the holding tie bar. A chip, a lead terminal extending to at least the vicinity of the semiconductor chip located on the other side pair facing each other, a connecting means for electrically connecting the lead terminal and the semiconductor chip, and the semiconductor chip And a resin for sealing up to the periphery of the semiconductor chip, wherein an adhesive insulating material is provided between the island and the semiconductor chip, and an insulating filler having substantially the same particle size is dispersed therein. Semiconductor device. 2. A holding tie bar extending outward from one of a pair of opposite sides of an island, and a semiconductor having a size larger than the island size and mounted on a part of the holding tie bar. A chip, a lead terminal extending to at least the vicinity of the semiconductor chip located on the other side pair facing each other, a connecting means for electrically connecting the lead terminal and the semiconductor chip, and the semiconductor chip The holding tie bar extends from the one side parallel to the side of the semiconductor chip with a wide portion provided, and the island including the wide portion and the semiconductor An adhesive insulating material is provided between the chip and the semiconductor chip, and the adhesive insulating material is also provided between the holding tie bar extending from the wide portion and the semiconductor chip. Semiconductor device with the features. 3. The holding tie bar is provided on an island 4
The semiconductor device according to claim 1, wherein the semiconductor device extends from the corner. 4. The semiconductor device according to claim 2, wherein the wide portion has a width to which the adhesive insulating material can be applied. 5. The semiconductor device according to claim 1, wherein another semiconductor chip is mounted on said semiconductor chip.