JPH11261505A - Single carrier stereo transmission/reception system and transmitter/receiver used in the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To transmit/receive a stereo signal of high quality with a simple circuit constitution without difference in the S/N for the quality of a modulation system by alternately transmitting a pulse width modulation signal whose leading edge is not modulated but whose trailing edge is position-modulated and a pulse width modulation signal whose leading edge is position-modulated but whose trailing edge is not modulated. SOLUTION: The output signal of the AND gate circuit AG3 of a first pulse width modulation circuit PW1 and the output signal of the AND gate circuit AG4 of a second pulse width modulation circuit PW2 are added by an OR gate circuit OR. Carrier signals where a pulse width signal whose leading edge part is phase-modulated and whose trailing edge is not modulated and a pulse width modulation signal whose leading edge is not modulated and whose trailing edge is phase-modulated are alternately transmitted are obtained. The frequency of the signal is outputted and transmitted form the output terminal COUT of the modulated carrier signal. At that time, the frequency of the modulated carrier signal transmitted from the output terminal is similar to that of a signal added to the input terminal CIN of the carrier signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a single-carrier stereo transmission / reception system in which a stereo signal is transmitted on a single carrier wave and reproduced on the reception side as a stereo signal. Transmitter and receiver. According to the single carrier stereo transmission / reception method of the present invention, a pulse width modulation signal in which the leading edge is unmodulated and the trailing edge is position-modulated, and a pulse width modulated signal in which the leading edge is position-modulated and the trailing edge is unmodulated are alternately transmitted. By doing so, a stereo signal is put on a single carrier wave and transmitted, and this is reproduced as a stereo signal on the receiving side.

[0002]

At present, there is known a so-called AM stereo broadcast system in which stereo signals are transmitted and received on a single carrier using a carrier obtained by phase-modulating an amplitude-modulated wave. In such a single-carrier stereo transmission / reception system, since the quality of the two modulation systems of the amplitude modulation and the phase modulation has a difference such as the SN ratio, the sum (R + L) of the right signal R and the left signal L is obtained. Various methods have been proposed in which a signal of the difference (RL) between the right signal R and the left signal L is transmitted to separate the right signal R and the left signal L from these signals output from the receiving side. .

The mainstream of such a single carrier stereo transmission / reception system is the Motorola system. However, it is necessary to use an IC which operates at a relatively high voltage with a high operating margin. The SN ratio is also about 30 db, and it is hard to say that it is qualitatively sufficient.
Also, in the Motorola system, in the process of signal transmission on the receiving side,
Distortion occurs in the amplitude modulated wave or so-called "carrier break"
In such a case, it is difficult to restore the signal quality. It is an object of the present invention to propose a new single carrier stereo transmission / reception scheme that solves the problems of the conventional single carrier stereo transmission / reception scheme.

[0004]

SUMMARY OF THE INVENTION A single carrier stereo transmission / reception system of the present invention and a transmitter and a receiver used in the transmission / reception system include a pulse width modulation signal in which a leading edge is unmodulated and a trailing edge is position-modulated. The position of the leading edge is modulated and the trailing edge is alternately transmitted with an unmodulated pulse width modulation signal, so that a stereo signal is placed on a single carrier and transmitted. In order to play back and demodulate the stereo signal on the receiving side, a flip-flop circuit driven directly by the received signal, and a flip-flop circuit driven by a signal obtained by inverting the phase of the received signal,
By extracting the pulse width signals of the right signal R and the left signal L, and integrating these two signals respectively, an audio output of a set of stereo signals of the right signal R and the left signal L is obtained. It was made. In the single carrier stereo transmission / reception system of the present invention, since only pulse width modulation is used to modulate the carrier, there is no difference in the quality of the modulation system such as the S / N ratio. Transmission and reception can be performed with a relatively simple circuit configuration.

[0005]

BEST MODE FOR CARRYING OUT THE INVENTION

FIG. 1 is a connection diagram showing a configuration of a transmission circuit section of a single carrier stereo transmission / reception system of the present invention. In FIG. 1, CIN is an input terminal of a carrier signal, and COUT is an output terminal of a modulated carrier signal. RIN is an input terminal for a stereo right signal, and LIN is an input terminal for a stereo left signal. CG is a two-phase square wave forming circuit, PM1 is a first phase modulation circuit, and PM2 is a second phase modulation circuit. PW1 is a first pulse width modulation circuit, and PW2 is a second pulse width modulation circuit.

In the two-phase square wave forming circuit CG, FF is a flip-flop circuit, and AG1 and AG2 are AND gate circuits. The clock signal input terminal cl of the flip-flop circuit FF is connected to the signal input terminals of the AND gate circuits AG1 and AG2. The output terminals q1 and q2 of the flip-flop circuit FF are connected to the AND gate circuit AG.
1 and AG2. The input terminal CIN of the carrier signal is connected to the clock signal input terminal cl of the flip-flop circuit FF. In the first phase modulation circuit PM1, CN1 is a carrier signal input terminal, SN1 is a modulation signal input terminal, and OT1 is a modulation signal output terminal. CV11 and CV12 are variable capacitance diodes, G11 and G12 are gate circuits, and + is a power supply terminal. A first CR delay circuit is configured by the gate circuit G11, the capacitor, the variable capacitance diode CV11, and the resistor, and a second CR delay circuit is configured by the gate circuit G12, the capacitor, the variable capacitance diode CV12, and the resistance.

[0007] The input terminal CN1 of the carrier signal is connected to the input of the first CR delay circuit via a resistor. The output of the first CR delay circuit is connected to the input of the second CR delay circuit via a resistor, and the output of the second CR delay circuit is connected to the output terminal OT1 of the modulation signal. The modulation signal input terminal SN1 is connected to the variable capacitance diodes CV11 and CV12 of the first and second CR delay circuits via a capacitor and a resistor.
It is connected to the. In the second phase modulation circuit PM2, CN2 is a carrier signal input terminal, SN2 is a modulation signal input terminal, and OT2 is a modulation signal output terminal. CV
21, CV22 is a variable capacitance diode, G21, G22
Is a gate circuit, and + is a power supply terminal.

The first CR delay circuit is constituted by the gate circuit G21, the capacitor, the variable capacitance diode CV21, and the resistor, and the second CR delay circuit is constituted by the gate circuit G22, the capacitor, the variable capacitance diode CV22, and the resistor. . The carrier signal input terminal CN2 is connected to the input of the first CR delay circuit via a resistor.
The output of the first CR delay circuit is connected to the input of the second CR delay circuit via a resistor, and the output of the second CR delay circuit is connected to the output terminal OT1 of the modulation signal. The modulation signal input terminal SN2 is connected to the variable capacitance diode C of the first and second CR delay circuits via an amplifier A, a capacitor and a resistor.
V1 and CV2.

The signal output terminal of the gate circuit AG1 of the two-phase square wave forming circuit CG is connected to the carrier input terminal CN1 of the first phase modulation circuit PM1 and the first pulse width modulation circuit PW1.
Is connected to the input terminal of the AND gate circuit AG3. The signal output terminal of the gate circuit AG2 of the two-phase square wave forming circuit CG is connected to the carrier signal input terminal CN2 of the second phase modulation circuit PM2 and the input terminal of the AND gate circuit AG4 of the second pulse width modulation circuit PW2. ing. AND gate circuit AG3 of first pulse width modulation circuit PW1
And the output terminal of the AND gate circuit AG4 of the second pulse width modulation circuit PW2 are connected to the output terminal COUT of the modulated carrier signal via the OR gate circuit OR. The stereo right signal input terminal RIN is connected to the modulation signal input terminal SN2 of the second phase modulation circuit PM2, and the stereo left signal input terminal LIN is the modulation signal input terminal SN1 of the first phase modulation circuit PM1. It is connected to the.

The operation of the transmission circuit unit using the single carrier stereo transmission / reception system of the present invention thus configured is described below.
This will be described with reference to the waveform diagram of FIG. FIG. 3 is a waveform diagram for explaining the operation of the transmission circuit unit using the single carrier stereo transmission / reception system of the present invention. To the input terminal CIN of the carrier signal, a clock signal of a square wave of a fixed period for producing the carrier signal as shown in FIG. Flip-flop circuit F of two-phase square wave forming circuit CG
F operates according to the clock signal shown in FIG. 3A, and its output terminals q1 and q2 reduce the frequency of the clock signal as shown in FIGS. 3B and 3C by half. 180
° Signals with different phases are output.

The output signals of the output terminals q1 and q2 of the flip-flop circuit FF and the clock signal of the input terminal CIN of the carrier signal are applied to the input terminals of the AND gate circuits AG1 and AG2 of the two-phase square wave forming circuit CG. A
From the output terminals of G1 and AG2, (d) of FIG.
As shown in (e), a carrier signal of a square wave having a 180 ° phase difference, in which the frequency of the clock signal at the input terminal CIN of the carrier signal is reduced to １ ／, is outputted. A carrier signal of a square wave shown in FIG. 3D is applied to an input terminal CN1 of the carrier signal of the first phase modulation circuit PM1. The carrier signal of FIG. 3D is charged in the variable capacitance diodes CV11 and CV12 in the first and second CR delay circuits, and the gate circuit G12 of the second CR delay circuit is charged.
Is an integrated waveform as shown in FIG.
The two stages of the first and second CR delay circuits are used to deepen the degree of modulation.

Gate circuit G of first and second CR delay circuits
Normally, MOS transistors 11, 12 use H level MOS transistors at 0.7 VDD, so that the output level of G.
Since the level changes to L level at 3VDD, the output of the gate circuit G12 of the second CR delay circuit is converted into a square wave signal as shown in FIG. 3 (g) and sent to the output terminal OT1 of the modulation signal. The output terminal O of the modulation signal shown in FIG.
The signal of T1 has a phase which is delayed by the first and second CR delay circuits compared to the square wave signal shown in FIG. 3 (d) applied to the carrier signal input terminal CN1. , On the average, and this delay is the same for one of the rise and fall of the square wave. The amount of this delay is determined by changing the capacitance of the variable capacitance diodes CV11 and CV12 of the first and second CR delay circuits by the input terminal SI of the modulation signal.
Since it can be changed by changing the modulation signal applied to N, phase modulation can be performed.

A square wave carrier signal shown in FIG. 3E is applied to the carrier signal input terminal CN2 of the second phase modulation circuit PM2. The carrier wave signal shown in FIG. 3E is charged to the variable capacitance diodes CV21 and CV22 in the first and second CR delay circuits, and the second CR delay circuit is used.
The input of the gate circuit G22 of the delay circuit has an integral waveform as shown in FIG. The reason why the first and second CR delay circuits are used in two stages is to increase the degree of modulation similarly to the first phase modulation circuit PM1.

Gate circuit G of first and second CR delay circuits
Normally, MOS transistors 21 and G22 jump to H level at 0.7 VDD because MOS transistors are used.
Since the level changes to L level at 3VDD, the output of the gate circuit G22 of the second CR delay circuit is converted into a square wave signal as shown in FIG. 3 (j) and sent to the output terminal OT2 of the modulation signal. The output terminal O of the modulation signal shown in FIG.
The signal of T2 is the same as that of the square wave signal shown in FIG. 3E applied to the input terminal CN2 of the carrier signal, the phase of which is delayed by the first and second CR delay circuits. , On the average, and this delay is the same for one of the rise and fall of the square wave. Since the amount of this delay can be changed by changing the capacitance of the variable capacitance diodes CV1 and CV2 of the first and second CR delay circuits by the modulation signal applied to the input terminal SIN of the modulation signal, phase modulation is performed. Can be done.

The square wave signal shown in FIG. 3D and the first phase modulation circuit P shown in FIG. 3G are applied to the carrier signal input terminal CN1 of the first phase modulation circuit PW1.
The signal shown in FIG. 3H in which the square wave signal of the output terminal OT1 of the modulation signal of M1 is inverted by the inverter circuit IV of the first pulse width modulation circuit PW1 is the first pulse width modulation circuit PW1. To the input terminal of the AND gate circuit AG3. The AND gate circuit AG3 has its output terminal at H level when all signals applied to its input terminal are at H level, and its output terminal at L level in other cases.

For this reason, the output signal of the AND gate circuit AG3 changes to H level when the rear edge of the signal in FIG. 3H changes from L level to H level.
(D) changes to the L level when the leading edge of the square wave signal changes from the H level to the L level, and becomes a square wave signal as shown in (k) of FIG. The output signal of the AND gate circuit AG3 shown in FIG. 3 (k) is a pulse width modulated wave whose rear edge is phase-modulated and whose front edge is unmodulated. The input terminal CN2 of the carrier signal of the second phase modulation circuit PW2
3 (e) of FIG. 3 and the square wave signal of the output terminal OT2 of the modulation signal of the second phase modulation circuit PM2 shown in FIG. Is applied to the input terminal of the pulse width modulation circuit PW2 and the gate circuit AG4.

The output terminal of the AND gate circuit AG4 is at an H level when all the signals applied to its input terminals are at an H level, and its output terminal is at an L level otherwise. For this reason, the output signal of the AND gate circuit AG4 is such that the leading edge of the signal of FIG.
When it changes from level to H level, it changes to H level,
When the rear edge of the square wave signal of FIG. 3E changes from H level to L level, the signal changes to L level, as shown in FIG. 3L. The output signal of the AND gate circuit AG4 shown in (l) of FIG. 3 is a pulse width modulated wave whose front edge is phase-modulated and whose rear edge is unmodulated.

The output signal of the AND gate circuit AG3 of the first pulse width modulation circuit PW1 and the output signal of the second pulse width modulation circuit PW2 and the gate circuit AG4 are added by the OR gate circuit OR, and are shown in FIG. As shown in (m), the pulse width modulation signal in which the leading edge is phase-modulated and the rear edge is unmodulated, and the pulse width modulation signal in which the leading edge is unmodulated and the rear edge is phase-modulated are alternately transmitted. Signal. The frequency of this signal is output from the output terminal COUT of the modulated carrier signal and transmitted. At this time, the frequency of the signal transmitted from the output terminal COUT of the modulated carrier signal is the same as the frequency of the signal applied to the input terminal CIN of the carrier signal.

FIG. 2 is a connection diagram showing the configuration of a receiving / demodulating circuit section of the single carrier stereo transmission / reception system of the present invention. In FIG. 2, FMIN is an input terminal of a modulation signal, and CC is a positive electrode capturing circuit. The positive electrode capturing circuit CC includes an AND gate circuit AG5, a capacitor, and a diode. F1 and FF2 are flip-flop circuits, IV2
Is an inverter circuit, and FL1 and FL2 are filter circuits. LOUT is an output terminal for a stereo left reproduction signal (left audio signal) and an output terminal for a ROUT stereo right reproduction signal (right audio signal).

The input terminal MIN of the modulation signal is connected to the flip-flop circuit FF1 via the positive electrode capturing circuit CC and to the flip-flop circuit FF via the inverter circuit IV2.
2 signal input terminals. The signal output terminal of the flip-flop circuit FF1 is connected to the stereo left reproduction signal output terminal LOUT via the filter circuit FL1. A signal output terminal of the flip-flop circuit FF2 is connected to a stereo right reproduction signal output terminal ROUT via a filter circuit FL2.

The operation of the receiving / demodulating circuit of the single carrier stereo transmission / reception system of the present invention having the above-described structure will be described with reference to FIG.
This will be described with reference to the waveform diagram of FIG. FIG. 4 is a waveform diagram for explaining the operation of the single-carrier stereo transmission / reception reception / demodulation circuit section of the present invention. As shown in FIG. 4A, a signal that has received a modulated carrier is applied to the input terminal MIN of the modulated signal. This signal is the same as the transmission signal of FIG. 3 (m), and is a pulse width modulation signal in which the front edge is phase-modulated and the rear edge is unmodulated, and a pulse width modulation in which the front edge is non-modulated and the rear edge is phase-modulated. It is a signal where the signals alternate. FIG. 4 (a) added to the input terminal MIN
Is captured by the positive electrode capturing circuit CC at the rising portion in the positive direction, and is applied to the input terminal of the flip-flop circuit FF1.
As shown in FIG. 4B, the phase is inverted by 2 and applied to the signal input terminal of the flip-flop circuit FF2.

As a result, from each output terminal of the flip-flop circuit FF1, a pulse width modulation signal whose front edge is unmodulated and whose rear edge portion is phase-modulated as shown in FIGS. 4 (c) and 4 (d) is output. Is done. The output signal of the flip-flop circuit FF1 corresponds to the left signal of the stereo signal. From each output terminal of the flip-flop circuit FF2, a pulse width modulation signal whose front edge is phase-modulated and whose rear edge is unmodulated as shown in FIGS. 4 (e) and 4 (f) is output. This flip-flop circuit FF2
Output signal corresponds to the right signal of the stereo signal.

The output signal of the flip-flop circuit FF1 is smoothed by the filter circuit FL1 to become an audio signal, and a stereo left reproduction signal output terminal LOUT
Is output to Further, the signal output signal of the flip-flop circuit FF2 is smoothed by the filter circuit FL2 to become an audio signal, and the right reproduction signal output terminal RO of the television is output.
Output to UT. In this manner, a stereo signal is reproduced from the output of the flip-flop circuits FF1 and FF2 from the received signal of a single carrier,
Transmission and reception of stereo signals using a single carrier can be realized. Since the quality of the transmission and reception of the stereo signal of the single carrier stereo transmission / reception system of the present invention largely depends on the characteristics of the phase modulation circuit of the transmission circuit, the waveform of the phase modulation gate input / output terminal of the transmission circuit of FIG. FIG. 5 shows the measured data. As is clear from FIG. 5, the waveform of the phase modulation gate input / output terminal is of good quality, indicating that high-quality stereo signals can be transmitted and received.

FIG. 6 shows the maximum audible frequency of an audio signal of 20 KHz in the single carrier stereo transmission / reception system of the present invention.
It shows the position and level of the sideband occurrence in modulation.
As shown in FIG. 6, only 20 kHz above and below the carrier wave,
At the time of THD level input, it is -10 db (the level is proportional to the modulation input) compared to the carrier, and it is possible to transmit and receive high-quality stereo signals in a narrow band of only twice the occupied bandwidth of the modulation frequency. FIG. 7 shows measurement data of modulation-reproduction characteristics in a receiving circuit using the single carrier stereo transmission / reception system of the present invention. The modulation-reproduction characteristic shown in FIG. 7 shows that the carrier frequency is 2.1 MHz and the modulation frequency is 0 to 100 KHz.
The modulation of the stereo output signal at
/ N = 75 dB and the average modulation S / N = 54 dB lower by about 20 dB than this, the stereo signal level, the total distortion (THD), the noise level, and the maximum modulation This shows the state of crosstalk (crosstalk when one of the stereo signals is cut).

In the graph of FIG. 7, a circle indicates data of one stereo signal, and an asterisk indicates data of the other stereo signal. As is clear from the measurement data of the modulation-reproduction characteristics shown in FIG. 7, the modulation-reproduction characteristics of the single carrier stereo transmission / reception system of the present invention show that the left and right signals of the stereo can be obtained even at the time of maximum modulation and average modulation. Indicates that the reproduction characteristics are almost the same and that the stable reproduction characteristics are maintained even when the modulation frequency changes. In the single-carrier stereo transmission / reception system of the present invention, it is possible to restore even if the square-wave pulse width modulation wave of the modulation signal is changed to a sinusoidal wave during the transmission process.
Also, when either the left or right signal is modulated in the opposite phase and transmitted,
By directly integrating the received signal, monaural reproduction becomes possible. Therefore, it is possible to construct a stereo compatible system with the AM monaural receiving system.

[0026]

As is apparent from the above description, the single carrier stereo transmission / reception system of the present invention alternately transmits a pulse width modulation signal in which the leading edge is unmodulated and the trailing edge position is unmodulated. By transmitting a stereo signal on a single carrier, the receiver reproduces the stereo signal on the receiving side, and on the receiving side, a flip-flop directly driven by the received signal to demodulate the stereo signal By extracting the pulse width signals of the right signal R and the left signal L by a flip-flop circuit and a flip-flop circuit driven by a signal obtained by inverting the phase of the received signal, the two signals are integrated. , An audio output of a set of stereo signals of the right signal R and the left signal L can be obtained.

In the single-carrier stereo transmission / reception system of the present invention, a stereo signal is placed on a single carrier and transmitted, and is reproduced as a stereo signal on the receiving side. Since only pulse width modulation is used, there is no difference in the quality of the modulation system such as the SN ratio, and transmission and reception of high quality stereo signals can be realized with a relatively simple circuit structure. For this purpose, the amplitude modulation is performed by a so-called AM stereo broadcast system in which a single carrier is used to transmit and receive a stereo signal using a carrier obtained by performing phase modulation on a conventional amplitude modulated wave. Various countermeasures for correcting the difference between the two modulation schemes and the phase modulation are also unnecessary. Also, there is no need to use a relatively high-voltage operation IC with a high operation margin, and the amplitude modulation wave becomes distorted or the so-called "carrier break" occurs during the signal transmission process on the receiving side. Does not cause problems such as difficulty in restoring signal quality.

[Brief description of the drawings]

FIG. 1 is a connection diagram showing a configuration of a transmission circuit unit of a single carrier stereo transmission / reception system of the present invention.

FIG. 2 is a connection diagram showing a configuration of a reception / demodulation circuit unit of the single carrier stereo transmission / reception system of the present invention.

FIG. 3 is a waveform diagram for explaining an operation of a transmission circuit unit using the negative feedback phase modulation system of the present invention.

FIG. 4 is a waveform diagram for explaining the operation of the reception / demodulation circuit unit of the single carrier stereo transmission / reception system of the present invention.

5 shows measured data of a waveform of a phase modulation gate input / output terminal of the transmission circuit of FIG. 1 for showing the quality of transmission / reception of a stereo signal of a single carrier stereo transmission / reception system.

FIG. 6 is a diagram showing positions and levels of generation of sidebands in a single carrier stereo transmission / reception system according to the present invention in which the audio signal is modulated at an audible upper limit frequency of 20 KHz.

FIG. 7 shows measured data of modulation-reproduction characteristics in a receiving circuit using the single carrier stereo transmission / reception system of the present invention.

[Explanation of symbols]

CIN: Carrier signal input terminal, COUT
..Output terminal of modulated carrier signal, RIN
..Stereo right signal input terminal, LIN ...
Stereo left signal input terminal, CG: two-phase square wave forming circuit, PM1: first phase modulation circuit,
PM2 ... second phase modulation circuit, PW1 ...
・ First pulse width modulation circuit, PW2: second pulse width modulation circuit, FF: flip-flop circuit, AG1, AG2, AG3, AG4, AG5
... AND gate circuit, OR ... OR gate circuit,
CN1 ... Carrier signal input terminal, SN
1 ... modulation signal input terminal, OT1 ... modulation signal output terminal, CV11, CV12, CV2
1, CV22 ... variable capacitance diode, G1
1, G12, G21, G22 ... gate circuit, A.
..Amplifier, + ... power supply terminal, CN2 ... carrier signal input terminal, SN2 ... modulation signal input terminal, OT2 ... modulation signal output terminal
MIN ... is a modulation signal input terminal, CC ...
· Positive electrode capture circuit, FF1, FF2 ··· flip-flop circuit, IV2 ··· inverter circuit,
FL1, FL2, etc. are filter circuits,
LOUT: output terminal of stereo left reproduction signal (left audio signal); ROUT: output terminal of stereo right reproduction signal (right audio signal)

Claims (8)

[Claims] 1. A pulse width modulation signal in which the leading edge of a rectangular carrier is unmodulated and the trailing edge is position-modulated by one of the stereo signals, and the leading edge of the rectangular carrier is position-modulated by the other signal of the stereo signal. The trailing edge is such that a stereo signal is placed on a single carrier by transmitting an unmodulated pulse width modulation signal alternately and transmitted, and a flip-flop directly driven by the signal receiving the single carrier A pulse width signal corresponding to one of the stereo signals is extracted by the flip-flop circuit, and a pulse corresponding to the other signal of the stereo signal is driven by a flip-flop circuit driven by a signal obtained by inverting the phase of the received signal of the single carrier. By extracting the width signal and integrating each of these two signals,
Single carrier stereo transmission / reception system that reproduces a set of stereo signals. 2. The position of the trailing edge of a rectangular carrier is modulated by one of the stereo signals, and the leading edge is position-modulated by an unmodulated pulse width modulation signal and the leading edge of the rectangular carrier is the other of the stereo signals. The trailing edge corresponds to one of the stereo signals by a flip-flop circuit which is directly driven by a reception signal which receives a signal transmitted from the transmission means alternately transmitting an unmodulated pulse width modulation signal. A pulse width signal corresponding to the other signal of the stereo signal is extracted by a flip-flop circuit driven by a signal obtained by extracting a pulse width signal and a signal obtained by inverting a phase of a reception signal transmitted from the transmission means. A single carrier stereo transmission / reception system comprising a receiving means for reproducing a set of stereo signals by integrating each signal. 3. A first phase modulation circuit for phase-modulating the trailing edge of the carrier signal with one stereo signal, a second phase modulation circuit for phase-modulating the leading edge of the carrier signal with the other stereo signal, A first pulse width modulation circuit that converts a phase modulation signal output from the first phase modulation circuit into a pulse width signal; and a second pulse width conversion circuit that converts the phase modulation signal output from the second phase modulation circuit into a pulse width signal. A single carrier stereo transmission comprising a pulse width modulation circuit, an OR gate circuit for adding an output of the first pulse width modulation circuit and an output of the second pulse width modulation circuit and transmitting the modulated signal to an output terminal of the carrier signal. Circuit and a pulse width corresponding to one of the stereo signals by a flip-flop circuit directly driven by a signal received from the single carrier stereo transmission / reception circuit A pulse width signal corresponding to the other signal of the stereo signal by a flip-flop circuit driven by a signal obtained by inverting the phase of the received signal, and integrating these two signals respectively. By
A single carrier stereo transmission / reception system comprising a receiver circuit for reproducing a set of stereo signals. 4. A first phase modulation circuit for phase-modulating the trailing edge of a carrier signal by using a two-stage connection circuit of a variable capacitance diode and a gate circuit whose capacitance can be changed by one of the stereo signals. A second phase modulation circuit for phase-modulating the leading edge using a two-stage connection circuit of a variable capacitance diode and a gate circuit whose capacitance is changed by the other signal of the stereo;
A first pulse width modulation circuit that converts a phase modulation signal output from the first phase modulation circuit to a pulse width signal; a second pulse width signal that converts the phase modulation signal output from the second phase modulation circuit to a pulse width signal A single carrier stereo comprising an OR gate circuit for adding an output of the first pulse width modulation circuit and an output of the second pulse width modulation circuit and transmitting the modulated signal to an output terminal of the carrier signal; A pulse width signal corresponding to one of the stereo signals is extracted by a flip-flop circuit which is directly driven by a transmitter and a reception signal which receives a signal transmitted from the single carrier stereo transmitter, and the reception signal is phase inverted. The pulse width signal corresponding to the other signal of the stereo signal is extracted by the flip-flop circuit driven by the extracted signal, and these two signals are integrated respectively. By processing
A single carrier stereo transmission / reception system comprising a receiver for reproducing a set of stereo signals. 5. A first phase modulation circuit for phase-modulating the trailing edge of the carrier signal with one stereo signal, a second phase modulation circuit for phase-modulating the leading edge of the carrier signal with the other stereo signal, A first pulse width modulation circuit that converts a phase modulation signal output from the first phase modulation circuit into a pulse width signal; and a second pulse width conversion circuit that converts the phase modulation signal output from the second phase modulation circuit into a pulse width signal. A single carrier stereo transmission comprising an OR gate circuit for adding a pulse width modulation circuit, an output of the first pulse width modulation circuit and an output of the second pulse width modulation circuit, and outputting the modulated signal to an output terminal. Machine. 6. A first phase modulation circuit for phase-modulating the trailing edge of a carrier signal using a two-stage connection circuit of a variable capacitance diode and a gate circuit whose capacitance can be changed by one of the stereo signals, A second phase modulation circuit for phase-modulating the leading edge using a two-stage connection circuit of a variable capacitance diode and a gate circuit whose capacitance is changed by the other signal of the stereo;
A first pulse width modulation circuit that converts a phase modulation signal output from the first phase modulation circuit to a pulse width signal; a second pulse width signal that converts the phase modulation signal output from the second phase modulation circuit to a pulse width signal A single carrier stereo comprising an OR gate circuit for adding an output of the first pulse width modulation circuit and an output of the second pulse width modulation circuit and transmitting the modulated signal to an output terminal of the carrier signal; Transmitter. 7. The position of the trailing edge of the rectangular carrier wave is modulated by one of the stereo signals, the leading edge is position-modulated by an unmodulated pulse width modulation signal, and the leading edge is modulated by the other signal of the stereo signal. Receiving means for receiving a single carrier stereo transmission signal in which an unmodulated pulse width modulation signal is transmitted alternately, one of the stereo signals by a flip-flop circuit directly driven by the reception signal received by the receiving means A stereo signal extracting means for extracting a pulse width signal corresponding to the other signal of the stereo signal by a flip-flop circuit driven by a signal obtained by inverting the phase of the received signal; Stereo signal reproducing means for reproducing a set of stereo signals by integrating each of the two stereo signals of the signal extracting means. , A single carrier stereo receiver. 8. The position of the trailing edge of the rectangular carrier is modulated by one of the stereo signals, the leading edge is modulated by an unmodulated pulse width modulation signal, and the leading edge is modulated by the other signal of the stereo signal. A receiving circuit for receiving a single-carrier stereo transmission signal that transmits an unmodulated pulse width modulation signal alternately; a first flip-flop circuit directly driven by a reception signal of the reception circuit; reception of the reception circuit An inverter circuit for inverting a phase of a signal; a second flip-flop circuit driven by an output signal of the inverter circuit; extracting one of stereo signals by integrating an output signal of the first flip-flop circuit; A second filter circuit extracting the other signal of the stereo signal by integrating the output signal of the second flip-flop circuit. One carrier stereo receiver.