JPH11243385A - Clock change-over function monitoring system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a clock change-over function monitoring system by which a monitor range in clock change-over is extended to a selector operation and a clock change-over operation is monitored by a selector operation result. SOLUTION: Selectors 113 and 116 of a package PKG-A104 and PKG-G105 select one of a zero-system clock from clock zero-system distribution PKG 102 and the one-system clock of clock one-system distribution PKG 103. Disconnection detecting circuits 111 and 114 detect the disconnection of the zero-system clock from the clock zero-system distribution PKG 102. Disconnection detecting circuits 112 and 115 detect the disconnection of the one-system clock from clock one-system distribution PKG 103. Change-over monitoring circuits 152 and 154 detect the failure of the clock change-over based on selecting clocks selected by the selectors 113 and 116 and the respective detection results of disconnection detecting circuits 111, 112, 114 and 115.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a clock switching function monitoring system, and more particularly to a method for monitoring a clock switching function in a transmission communication apparatus or a multiplexing terminal repeater.

[0002]

2. Description of the Related Art Conventionally, in a transmission communication device or a multiplexing terminal repeater, an SDH (Sy
nchronous Digital Hierarc
hy: synchronous digital hierarchy) Converts an optical signal into an electrical signal and extracts a clock based on the signal.

[0003] After that, the transmission communication device and the multiplexing terminal repeater separate the overhead part of the received data into only payload information and switch to a synchronous clock inside the device. The transmission communication device or the multiplexing terminal repeater separates the time-division multiplexed information to a required speed on the intra-station transmission line and newly adds overhead information, and
It performs optical conversion and sends it out to a number of intra-station transmission lines.

[0004] A transmission communication apparatus or a multiplexing terminal repeater optically / electrically converts an SDH optical signal from an intra-station transmission line to extract a clock, demultiplexes the overhead, and replaces it with a synchronous clock inside the apparatus. The transmission communication device or multiplexing terminal repeater performs time division multiplexing of payload information after securing synchronization with other intra-station transmission lines, performs electrical / optical conversion after adding overhead information, and performs inter-station conversion. Send to the transmission path.

As shown in FIG. 6, the clock switching function monitoring system in the transmission communication apparatus and the multiplexing terminal repeater apparatus includes a redundant system 0 and 1 system clock distribution package (hereinafter referred to as a clock distribution PKG). Clock 0 distribution package PKG201 and clock 1
A system distribution PKG 202 is provided.

A package-A (hereinafter, referred to as PKG-A) 204 and a package-B (hereinafter, referred to as PKG-B) 205 are clock-distributed PKGs that operate on the received clock. Clock selection control package (hereafter,
A clock selection control PKG 203 selectively controls the selection system of the distribution clock. In the conventional clock switching function monitoring system, clock distribution and selection control are configured from the above PKG. Here, the number of clock distribution PKGs is one or more.

PKG-A2 which is a clock distribution PKG
04 and PKG-B205 are selectors 210 and 214 for selecting a clock system, and disconnection detection circuits 208, 209 and 21 for detecting disconnection of an input clock for each clock system.
2,213. Disconnection detection circuits 208 and 212
Detects a disconnection of the 0-system side clock, and outputs a disconnection detection circuit
Reference numeral 13 detects disconnection of the first system clock.

The clock selection control PKG 203 includes a selection control circuit 206 and a switching monitoring circuit 207. The selection control circuit 206 creates system selection information based on the disconnection detection information from the PKG-A 204 and the PKG-B 205, and
Selector 21 of each of G-A 204 and PKG-B 205
0, 214, and at the same time, distributes the system selection information to the switching monitoring circuit 207.

In the PKG-A 204, the distributed system selection information is transmitted through a buffer 211 to a clock selection control PKG2.
Return to the switching monitoring circuit 207 of 03. In the switching supervisory circuit 207, the system selection information from the selection control circuit 206 and the PKG-A
The system selection information returned from 204 is compared, and the transmission state of the system selection information is monitored.

Next, the operation when the 0-system side input clock of the PKG-A 204 is cut off will be described.
If the disconnection is detected by the disconnection detection circuit 208 of the PKG-A 204 when the 0-system side is selected, the detection result is sent to the selection control circuit 206 of the clock selection control PKG 203.

The selection control circuit 206 determines that the 0-system side clock is cut off, and sends selection instruction information to the PKG-A 204 and the PKG-B 205 to switch to the 1-system side clock.
The selectors 210 and 214 of each of the PKG-A 204 and the PKG-B 205 are switched to the first system clock selection.

The selection instruction information from the selection control circuit 206 is passed through a buffer 211 to a clock selection control PKG 203.
, And is compared with the selection instruction information sent from the selection control circuit 206. If the comparison result in the switching monitoring circuit 207 indicates the same system, it is determined that the clock switching is successful.

Here, a case where the clock switching has failed will be described. The selection control circuit 206 transmits the selection instruction information to the PKG-A 204 so as to switch to the primary system clock.
To the PKG-B 205. If the input unit of the selection instruction information is broken in the PKG-A 204, the buffer 211
Indicates that the system 0 is being selected as the selection instruction information.
, The switching monitoring circuit 207 detects a mismatch in the switching state.

[0014]

In the conventional clock switching monitoring method described above, the range that can be monitored is limited from the output point of the control circuit to the selection control information input point of the clocked distribution PKG. Can not be monitored.

A clock switching circuit is disclosed in Japanese Unexamined Patent Application Publication No.
There is a technique disclosed in JP-A-9712. However, this clock switching circuit aims at avoiding transmission of an unnecessary selection control signal when the switching control PKG is inserted and removed, and cannot be used for confirming the clock switching operation as described above.

As another clock switching method, there is a technique disclosed in Japanese Patent Application Laid-Open No. Hei 6-120855. In the technique disclosed in this publication, the same PK as the clock switching point is used.
By giving switching control to G, automatic signal switching is performed. However, since the redundant clock distribution PKGs exchange input and output states with each other, each of them creates switching instruction information and sends it to the supplied PKG, and on the supplied PKG side based on the instruction information coming from both systems. Judgment is made, and the transmitted clock is automatically switched. Since the clock is switched based on the failure on the transmission side, the clock cannot be switched even if a failure occurs on the reception side.

Accordingly, an object of the present invention is to solve the above-mentioned problems, to extend a monitoring range in clock switching to a selector operation, and to monitor a clock switching operation based on a selector operation result. A function monitoring system is provided.

[0018]

According to the present invention, there is provided a clock switching function monitoring system according to the present invention, wherein a clock signal is supplied from a first and a second clock source having a redundant system, and the clock signal is supplied to an apparatus comprising a plurality of packages. A clock switching function monitoring system for monitoring switching of a clock signal provided in each of the first and second clock sources and immediately after performing selection control when a frequency of a self-system clock signal is not selected in each of the plurality of packages. First and second changing means for temporarily changing the clock signal, and a plurality of determining means provided in each of the plurality of packages and determining the normality of the clock signal switched at the time of switching the clock signal. I have.

Another clock switching function monitoring system according to the present invention comprises a plurality of packages operated by receiving clock signals from first and second clock sources having a redundant system, and the first and second clock sources. A clock switching function monitoring system for monitoring the selection control of the clock signal in a device including a selection control package for performing the selection control of the clock signal from the first and the second.
First and second changing means provided in each of the clock sources and temporarily changing the frequency of the clock signal of the own system immediately after the selection control is performed by the selection control package when the plurality of packages are not selected. And a plurality of determination means provided in each of the plurality of packages and for determining the normality of the clock signal selected when the selection control package performs the selection control of the clock signal.

That is, in order to solve the above-mentioned problem, the clock switching function monitoring system of the present invention monitors the clock after selecting the clock and makes a determination, and the clock distribution PKG is not selected. A circuit that stops the clock for a certain period of time is added.

A circuit for detecting the stop of the clock after the clock is selected is added to the clock distribution PKG, and the normality of the selector operation is determined based on the normality of the clock after the clock is selected.

More specifically, in a device having a configuration composed of a plurality of PKGs which operate by being supplied with a clock signal from a clock source having a redundant system, the selection control of the clock source is performed from the selection control PKG.

In the conventional example, as the operation confirmation when the above-described clock selection control is executed, in the conventional example, the operation is confirmed by sending back the set value received by each PKG to the control PKG and comparing it with the set value.

In this case, it is not possible to determine whether the correct system clock is selected when the clock selection control is executed, since the clocks have the same frequency in both systems. Therefore, in the present invention, as an operation confirmation method, the frequency of the clock of the non-selected system is temporarily changed immediately after the selection control is performed, thereby determining whether the newly selected system is correct. I have.

According to this method, it is possible to confirm not only the control signal transmission state but also the operation state of the selector. Further, by providing the determination circuit in the distribution side PKG, a signal sent back to the control PKG becomes unnecessary.

[0026]

Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a system configuration of a clock switching function monitoring system according to one embodiment of the present invention. In the figure, a clock selection control package (hereinafter, referred to as a clock selection control PKG) 101
Is responsible for selecting the redundant system clock.

Clock 0 system distribution package (hereinafter referred to as clock 0 system distribution PKG) 102 and clock 1 system distribution package (hereinafter referred to as clock 1 system distribution PKG)
Each of the blocks 103 has a redundant configuration having the same internal configuration as the clock distribution PKG. Package-A (hereinafter, PKG-
A) 104 and package-B (hereinafter, PKG-
B) 105 is a representative of a plurality of clock distribution PKGs.

The clock 0 system distribution PKG 102 is a clock distribution PKG (PKG-A104 and PKG-B10).
Clock source 123 for distributing the clock to 5), and buffer 15 with enable for stopping the clock for a certain period of time
0, a differentiating circuit 149 for detecting a change in the selection instruction information in the non-selection direction of the own package, and a stretching circuit 14 for performing a disabling operation for stopping the output of the clock for a predetermined time
And 2.

The clock 1 system distribution PKG 103 is, similarly to the clock 0 system distribution PKG 102, a clock source 125.
Buffer 148 with enable, differentiating circuit 147
And a stretch circuit 144.

PKG-A104 is a clock 0 system distribution PK
0 system clock and clock 1 system distribution PKG from G102
A selector 113 for selecting one of the first system clocks from the first system 103, a disconnection detection circuit 111 for detecting disconnection of the zero system clock, and a disconnection detection circuit 1 for detecting disconnection of the first system clock.
12 and a switching monitoring circuit 152 that detects whether the selected clock is disconnected or has a disconnected portion and detects a failure in switching the clock. P
The KG-B 105, like the PKG-A 104, includes a selector 116, disconnection detection circuits 114 and 115, and a switching monitoring circuit 154.

The clock selection control PKG 101 is
-A104 and disconnection detection circuit 111 of PKG-B105,
It comprises a selection control circuit 145 that performs automatic switching based on the interruption of the clock from 112, 114, and 115.

FIG. 2 is a block diagram of the clock 0 system distribution PKG10 of FIG.
3 is a block diagram showing a detailed configuration of FIG. In the figure,
The differentiation circuit 149 of the clock 0-system distribution PKG 103 performs edge detection by passing the selection control signal 311 from the selection control circuit 145 of the clock selection control PKG 101 through the differentiation circuit 149, and performs a fixed time immediately after the self-package becomes non-selected. It is a trigger to extend.

The system information 310 is a clock distribution PKG 103
Is an input signal connected to the ground (GND) outside the package only on the 0-system side so that it can be determined whether the system is the 0-system or the 1-system depending on the mounting position where the is inserted. This system information 31
0 is input to the control signal of the selector 305 of the differentiating circuit 149, and either the selection control signal 311 or the signal passed through the inverter circuit 306 is selected.

AND circuit 30 constituting differentiating circuit 149
3 and the inverter circuit 302 can detect only the edge when the own package is not selected by the same logic in both the 0 system and the 1 system. In the configuration example, it is assumed that the selection control signal 311 selects “0” system clock at “L”.

The stretch circuit 304 is constituted by a mono-multi vibrator 304 or the like, and outputs a pulse for a predetermined time in response to a trigger from the differentiating circuit 149. The buffer with enable 150 inputs the output from the stretch circuit 142 to the enable terminal, and stops the output of the clock from the clock source 123 for a certain time. Although not shown, the configuration of the clock 1-system distribution PKG 103 is the same as that of the above-described clock 0-system distribution PKG 102, and its operation is the same as that of the clock 0-system distribution PKG 102.

FIG. 3 is a block diagram showing a detailed configuration of the PKG-A 104 of FIG. In the figure, a disconnection detection circuit 1
11, 112 and the disconnection detection circuit 40 of the switching monitoring circuit 152
Numerals 1 and 406 each comprise a mono-multi vibrator (not shown) or the like, and output "H" when the clock is cut off. The switching monitoring circuit 152 is a disconnection detecting circuit 401, 4 for monitoring the disconnection of the clock signal after passing through the selector 113.
06, and outputs "H" when the clock signal is cut off.

The switching monitoring circuit 152 is connected to the disconnection detection circuit 4 described above.
01, 406, a delay circuit 409 for delaying the input timing of the output of the disconnection detection circuit 401 to the mask circuit 402, and an OR circuit 403 for detecting disconnection of either the 0-system or 1-system input clock. And a mask circuit 402 for masking the output from the disconnection detection circuit 401 if either the 0 or 1 input clock is disconnected, and an AND circuit 405 for detecting when both clocks are disconnected. A mask circuit 404 for masking the output from the disconnection detection circuit 406 if the clock is disconnected from both systems;
And an OR circuit 407 for ORing each output.
In the above configuration, when the output of the OR circuit 407, which is the final result, is “H”, clock switching fails.

Here, the four disconnection detection circuits 111 and 11
The relationship between disconnection detection times 2, 401, and 406 is represented by disconnection detection circuit 406> disconnection detection circuit 111 = disconnection detection circuit 112> disconnection detection circuit 401.

Further, a clock distribution P for stopping the clock is provided.
The time relationship between the clock stop time and the clock disconnection detection by the stretch circuit 142 of the KG 102 is determined by the disconnection detection circuit 40
6> disconnection detection circuit 111> clock suspension time> disconnection detection circuit 401. Although not shown,
The configuration of PKG-B 105 is also the same as the configuration of PKG-A 104 described above, and its operation is also the same as the operation of PKG-A 104.

FIGS. 4 and 5 are time charts showing the operation of the clock switching function monitoring system according to one embodiment of the present invention. The operation of the clock switching function monitoring system according to one embodiment of the present invention will be described with reference to FIGS. Here, a description will be given of an operation in a case where clock switching is performed normally, a disconnection is detected by the disconnection detection circuit 114 of the PKG-B 105 at a certain time, and the clock is switched from the 0 system to the 1 system. I do.

Upon detection of the disconnection from the disconnection detection circuit 114, the selection control circuit 145 of the clock selection control PKG 101 outputs a selection control signal 311 so as to switch the clock to the 1-system selection. The selectors 113 and 116 of each of the PKG-A 104 and the PKG-B 105 switch the clock to the 1-system selection by the selection control signal 311 from the selection control circuit 145.

In the clock 0-system distribution PKG 102, a change in the selection control signal 311 from the 0-system to the 1-system is used as a trigger,
Edge detection in differentiating circuit 149, stretch circuit 142
From the 3-state buffer 1
50 is disabled, and the clock transmission is stopped. On the distribution PKG side, in the case of the PKG-A 104, the clock disconnection is not detected because the disconnection detection circuit 111 has a disconnection detection time longer than the clock stop time. Downstream from the selector 113, since the first system side clock is selected, disconnection is not detected.

Next, a case where the clock switching is abnormal will be described. As in normal times, PKG-B10
A case where the disconnection is detected by the disconnection detection circuit 114 of No. 5 and the clock is switched from the system 0 to the system 1 will be described as an example. Clock selection control P based on disconnection detection by disconnection detection circuit 114
The selection control circuit 145 of the KG 101 outputs a selection control signal 311 so as to switch the clock to the 1-system selection.

Here, it is assumed that the selection control signal 311 is not transmitted and the selector 113 is kept in the 0-system selection. An operation example at this time is shown in a time chart of FIG. In the clock 0 system distribution PKG101, the selection control signal 311 for the 1 system
Is triggered, the edge detection in the differentiating circuit 149, and the sending of the pulse from the stretching circuit 142 for a certain period of time disables the buffer 150 with enable and stops the clock sending.

In the PKG-A 104 on the PKG side to be distributed,
Since the disconnection detection circuit 111 has a disconnection detection time longer than the clock stop time, no clock disconnection is detected. Selector 113
Since the 0-system side is selected, the disconnection detection circuit 401 that has a shorter detection time than the clock stop time detects the clock disconnection. The disconnection detection circuit 406 does not detect a clock disconnection.

The output from the disconnection detection circuit 401 enters the mask circuit 402. The mask condition is that the disconnection detection circuit 111 or 112 detects a clock disconnection.
If the output from the disconnection detection circuit 401 is not masked and is set to “H” indicating an alarm (ALM), the OR circuit 407
Also becomes "H", and it is determined that the switching has failed.

Next, an example in which the PKG-A 104 is a PKG that has issued a switching trigger will be described. An operation example at this time is shown in a time chart of FIG. At a certain time PKG-
The case where the disconnection is detected by the disconnection detection circuit 111 in A104 and the clock is switched from the 0 system to the 1 system will be described as an example.

In PKG-A104, disconnection detection circuit 1
11 is already in the disconnection detection state. Since the selector 113 selects the clock 0 system 410 first, the disconnection detection circuit 1
The clock disconnection is also detected by the disconnection detection circuit 401 whose detection time is shorter than 11. Therefore, in order to mask the output of the disconnection detection circuit 401 having a short disconnection detection time with the results of the disconnection detection circuits 111 and 112, the output timing of the output of the disconnection detection circuit 401 is determined by the delay circuit 409. Need to be delayed than time.

The output from the disconnection detection circuit 401 enters the mask circuit 402, but the mask condition is that the disconnection detection circuit 111 or the disconnection detection circuit 112 has detected disconnection, so the output from the disconnection detection circuit 401 is masked.

When the clock is switched normally,
Disconnection detection circuit 4 whose disconnection detection time is later than disconnection detection circuit 111
Before 06 detects the disconnection, the selector 113 switches to the 1 system and a normal clock flows, so that the disconnection detection circuit 406 does not detect the disconnection.

Next, as a case of a clock switching abnormality, the selector 113 does not transmit the selection control signal 311 and
Assume that the clock 0 system signal 410 remains selected.
When the disconnection is detected from the disconnection detection circuit 111, the clock selection control P
The selection control circuit 145 of the KG 101 outputs a selection control signal 311 so as to select the clock 1 system signal 411.

In the clock 0-system distribution PKG 102, the change in the selection control signal 311 is used as a trigger to detect an edge in the differentiating circuit 149 and to send a pulse from the stretching circuit 142 for a certain period of time, thereby disabling the buffer 150 with enable. Stop sending the clock. PKG-A
At 104, since the disconnection detection circuit 111 is already in the disconnection detection state, the output of the disconnection detection circuit 401 is masked by the mask circuit 402.

If the selector 113 keeps selecting the 0 system, the disconnection detection circuit 406 having a disconnection detection time later than the disconnection detection circuit 111 detects the disconnection, and outputs the result to the mask circuit 404. The mask condition of the mask circuit 404 is that the clock is cut off for both systems, so that the mask condition is sent to the OR circuit 408 without being masked, and it is determined that the switching has failed (ALM).

When the clocks of both systems are cut off, the masking circuit 402 masks the cutoff detection result of the cutoff detection circuit 401, and the masking circuit 404 masks the cutoff detection result of the cutoff detection circuit 406. Is not determined.

As described above, in the clock distribution system having the redundant system, the operation of the switching function of the distribution clock is monitored to detect the failure of the switching control. That is, clock 0
System distribution PKG102 and clock 1 system distribution PKG103
Has a function of stopping clock transmission to the PKG-A 104 and the PKG-B 105 for a certain period of time immediately after the clock switching, and the PKG-A 104 and the PKG-B 105
The switching operation is confirmed by the switching monitoring circuits 152 and 154 provided respectively to determine whether or not a normal clock has been transmitted after selection, thereby monitoring the actual selector state and checking the clock switching operation. Normal and abnormal can be determined.

Since each of the PKG-A 104 and the PKG-B 105 monitors and determines the clock switching operation,
-Selective control PK from each of A104 and PKG-B105
It is not necessary to return a signal to G101, and power consumption can be reduced by reducing the number of buffers. Therefore, the monitoring range in clock switching can be extended to the selector operation, and the clock switching operation can be monitored based on the operation results of the selectors 113 and 116.

[0057]

As described above, according to the present invention, the switching of the clock signal in a device comprising a plurality of packages operated by supplying the clock signal from the first and second clock sources having the redundant system is monitored. In the clock switching function monitoring system, when the first and second clock sources are not selected in each of the plurality of packages, the frequency of the own system clock signal is temporarily changed immediately after the selection control is performed, and the clock signal is switched. By judging the normality of the clock signal switched at each of the plurality of packages, the monitoring range in the clock switching can be extended to the selector operation, and the clock switching operation can be monitored based on the operation result of the selector. This has the effect.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a system configuration of a clock switching function monitoring system according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a detailed configuration of a clock 0 system distribution PKG of FIG. 1;

FIG. 3 is a block diagram showing a detailed configuration of PKG-A in FIG.

FIG. 4 is a time chart showing the operation of the clock switching function monitoring system according to one embodiment of the present invention.

FIG. 5 is a time chart showing an operation of the clock switching function monitoring system according to one embodiment of the present invention.

FIG. 6 is a block diagram showing a system configuration of a clock switching function monitoring system according to a conventional example.

[Explanation of symbols]

 101 Clock Selection Control Package 102 Clock 0 System Distribution Package 103 Clock 1 System Distribution Package 104 Package-A 105 Package-B 111, 112, 114, 115 Disconnection Detection Circuit 113, 116 Selector 123, 125 Clock Source 142, 144 Stretch Circuit 145 Selection control circuit 147,149 Differentiator circuit 148,150 Buffer with enable 152,154 Switching monitoring circuit

Claims (6)

[Claims] 1. A clock switching function monitoring system that monitors switching of a clock signal in a device including a plurality of packages that operate by being supplied with a clock signal from first and second clock sources having a redundant system, First and second changing means provided in each of the first and second clock sources and for temporarily changing the frequency of the clock signal of the own system immediately after performing the selection control when the plurality of packages are not selected. And a plurality of judging means provided in each of the plurality of packages and judging the normality of the clock signal switched at the time of switching the clock signal. 2. The apparatus according to claim 1, wherein each of the first and second changing units is configured to stop a clock signal supplied to each of the plurality of packages for a predetermined time when the plurality of packages are not selected. Clock switching function monitoring system. 3. The clock switching function monitoring system according to claim 2, wherein each of the plurality of determination units is configured to detect a stop of the clock signal switched after the switching of the clock signal. 4. A plurality of packages which are supplied with clock signals from first and second clock sources having a redundancy system and operate, and select control of the clock signals from the first and second clock sources. A clock switching function monitoring system that monitors selection control of the clock signal in an apparatus including a selection control package, wherein the clock switching function monitoring system is provided in each of the first and second clock sources and automatically operates when the plurality of packages are not selected. First and second changing means for temporarily changing the frequency of a system clock signal immediately after performing the selection control by the selection control package; and the clock signal provided in each of the plurality of packages and provided by the selection control package. And a plurality of determination means for determining the normality of the clock signal selected when the selection control is performed. Clock switching function monitoring system. 5. The apparatus according to claim 1, wherein each of the first and second changing units is configured to stop a clock signal supplied to each of the plurality of packages for a predetermined time when the selection control by the selection control package is deselected. The clock switching function monitoring system according to claim 4, wherein: 6. The clock according to claim 5, wherein each of the plurality of determination units is configured to detect a stop of the clock signal selected at the time of performing the selection control of the clock signal by the selection control package. Switching function monitoring system.