JPH11239180A - Priority controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a priority controller which can reduce cancellation of other exchange units than those of high-quality classes and the occurrence of abnormal states due to abnormal traffic from a terminal device even when the exchange units of high-quality classes are continuously inputted from the terminal device in a bursting state. SOLUTION: A storing section 30 is provided with a second storing amount monitoring means 50 which monitors the storing amount of exchange units of the quality class having a second priority order, a first transfer rate monitoring means 60 which monitors the transfer rate of exchange units of the quality class having a first priority order, and a read-out means 40 which reads out the exchange units from the storing means 30 and outputs the units. The read-out means 40 reads out the exchange units of the quality class having the first priority order from the storing means 30 and outputs the units, but, when the transfer rate monitored by means of the monitoring means 60 exceeds a prescribed transfer rate and the storing amount of the exchange units monitored by means of the monitoring means 50 exceeds a prescribed value, the means 40 reads out the exchange units of the quality class having the second priority order and processes the units.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an exchange or a frame relay for handling packets, cells, etc., which treats input packets, cells, frames, etc. as exchange units, and converts the exchange units for each quality class into first-in, first-out. (Hereinafter referred to as FIFO.) The present invention relates to a priority control device that accumulates data so that it can be processed, and reads out and outputs the quality class with higher priority.

[0002] In the field of data communication in recent years, quality classes are variously classified according to diversification of services handling voice, still images, moving images, graphics, documents, data, and the like. In particular, the transmission bit rate of audio and moving images is constant, and there is a strict requirement for delay and discarding of exchange units. On the other hand, in data communication between computers, there is little strict requirement for a constant transmission bit rate or a delay. It is required that priority control be performed for each quality class in order to provide a service satisfying such mixed quality of communication.

However, since a plurality of switching units of different quality classes are mixedly provided in the same apparatus for communication service, even if control is performed to prioritize switching units of a higher priority quality class, a lower priority quality class may be controlled. Although it is inevitable that switching units are discarded, it is desired to provide a priority control device that suppresses switching unit discarding due to temporary bursty traffic.

[0004]

2. Description of the Related Art In a conventional priority control device, input exchange units are sorted and stored for each quality class, and exchange units of a first priority quality class (hereinafter, referred to as first priority exchange units). ) Is read with priority, and when there are no more exchange units to be read, an exchange unit of the second priority quality class (hereinafter referred to as a second-priority exchange unit) is read. As described above, when there are no more exchange units to be read, the exchange units of the next priority quality class are sequentially read.

[0005]

However, for example, when a first-priority exchange unit is stored in the storage means, reading is performed with priority given to the exchange unit. Therefore, the first
If the priority exchange unit is temporarily input in bursts that greatly exceeds the requested transfer rate, or the first priority exchange unit is transmitted in bursts from the terminal device due to an abnormality of the accommodated terminal device. If input continues, the first
Reading is continued until there is no more priority exchange unit. As a result, the reading of the exchange unit of the quality class of the second or later priority (hereinafter referred to as the second or later priority exchange unit) is not performed, and the second or later priority exchange unit becomes congested and exchanged. In some cases, units were discarded.

[0006] That is, although the storage means has enough room to store the first-priority exchange unit,
Since the switching unit is read out with priority, there is a case where the accumulation of the second and subsequent priority switching units becomes congested and the switching unit is discarded.

[0007]

According to the present invention, packets, frames, cells, and the like in exchanges such as packet exchanges, frame relays, and ATM exchanges are regarded as exchange units. In order to achieve the above-mentioned task, accumulation in which first-in first-out processing is performed for each of the exchange units allocated by the quality-class-based distribution unit according to the quality class set for each of the input exchange units, for each of the corresponding quality classes Means, each quality class is given a priority of reading the exchange unit from the storage means, and the exchange unit is read out with priority from the quality class of the first priority, and when there is no exchange unit to be read out, the next priority is given. A priority unit for sequentially reading out the exchange units of the quality classes of the first to the lowest priorities, wherein the accumulation unit stores the exchange units of the second priority in the storage unit. A second priority storage amount monitoring means for monitoring the transfer amount, a first transfer rate monitoring means for monitoring the transfer rate of the first priority exchange unit, Reading means for reading and outputting the exchange unit from the means, and the read means reads and outputs the first-priority exchange unit from the storage means, and the transfer rate in the first transfer rate monitoring means is equal to the read rate. When the transfer rate exceeds a predetermined transfer rate and the storage amount of the exchange unit in the storage amount monitoring means of the second priority exceeds a predetermined value, the second priority exchange unit is read and processed, and the exchange unit of the second priority is processed. Reduce destruction.

However, while the second-priority switching unit is being read, the first-priority switching unit may accumulate and become congested, and the switching unit may be discarded.
Therefore, when the transfer rate of the first-priority exchange unit is smaller than a predetermined value, the exchange unit of the quality class is preferentially read from the storage unit and output to prevent the first-priority exchange unit from being discarded. . Similarly, while the second-priority exchange unit is being read, the first-priority exchange unit may become congested and discarded.
Therefore, the storage means has a first priority accumulation amount monitoring means for monitoring the accumulation amount of the exchange units of the first quality class, and the exchange unit of the first priority accumulation amount monitoring means is monitored. If the storage amount exceeds a predetermined value, the storage means may output the first
The priority exchange units of the quality class having the priority order are read and processed with priority to prevent the first exchange unit from being discarded.

[0009] Further, there is provided a quality class lowering means for lowering the quality class of the exchange unit, and a quality class accumulation amount monitoring means for counting the accumulation amount of the exchange unit for each quality class in the accumulation means. Either one of the transfer rates of the exchange units for each address exceeds a predetermined value set for each transfer destination address, and the storage and exchange of the quality class set for the exchange unit to the transfer destination address exceeding the predetermined value When the unit storage amount exceeds a predetermined value, the quality class set in the exchange unit is changed to a lower priority quality class, or in the case of a lower priority quality class, the exchange unit is discarded and an abnormal state is set. Control so as not to fall into.

[0010] By the above method, the above-mentioned problem is solved.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a diagram for explaining the configuration of the first embodiment of the present invention. As an example of the first embodiment of the present invention, a quality class distribution unit 10 for allocating exchange units based on a quality class set for an input exchange unit, and an exchange unit distributed by the quality class distribution unit 10 are used. FI
A storage unit 30 for performing FO processing, a reading unit 40 for reading the exchange unit from the storage unit 30 according to the priority order,
The first priority storage amount monitoring means 60 that monitors the storage amount of the first priority exchange unit, the second priority storage amount monitoring means 50, and the transfer rate of the first priority exchange unit is a predetermined value. And a first transfer rate monitoring means 80 for monitoring whether or not the transmission rate has been exceeded.

FIG. 2 is a diagram for explaining a first embodiment of the present invention. In order to briefly explain the gist of the present invention, in the first and second embodiments of the present invention, the first priority quality class is defined as a high quality class, and the second priority quality class is defined as a low quality class. A description will be given by limiting the quality classes to two types. For example, even if there are three types of high quality class, medium quality class and low quality class, the high quality class and medium quality class are classified into the high quality class and low quality class, and the medium quality class and low quality class are classified into the high quality class. The present embodiment can be considered as a form in which two embodiments are combined in correspondence with the quality class and the low quality class, respectively. Handling of four or more quality classes can be similarly considered.
In addition, for the sake of simplicity, the quality class distribution means 10
Is limited to two, the output of the reading means is limited to one, and the quality class is limited to two, a high quality class and a low quality class.

Hereinafter, a first embodiment of the present invention will be described mainly with reference to FIG. The quality class distribution means 10 of FIG. 1 is composed of quality class distribution units 10a and 10b.
The quality class distribution units 10a and 10b include quality class extraction circuits 11a and 11b, selector circuits 12a and 12b, and write control circuits 13a and 13b. The quality class information is extracted by the quality class extraction circuits 11a and 11b from the exchange units input to the quality class distribution units 10a and 10b, respectively, and the information is drawn into the selector circuits 12a and 12b. The selector circuits 12a and 12b sort the input exchange units into a high-quality class or a low-quality class based on the information and output. At this time, when the high quality class exchange unit is output, the quality class extraction circuit 11a, 1
1b outputs to the write control circuits 13a and 13b either the high quality class or the low quality class which is the output destination of the exchange unit. The write control circuits 13a and 13b add 1 to the value of the reception counter 32a for the high quality class, and add 1 to the value of the reception counter 32b for the low quality class.

The storage means 30 shown in FIG. 1 comprises storage units 30a and 30b for storing exchange units. Storage unit 30
a and 30b have essentially the same configuration except that the storage unit 30a stores exchange units of a high quality class, and the storage unit 30b stores exchange units of a low quality class. Storage unit 30
a is FIFO 31a1, 31a2, reception counter 32
a, a multiplexing circuit 33a and a buffer 34a.

In the storage section 30a, FIFOs 31a1,
The IFO 31a2 receives the high quality class exchange unit from the selector circuits 12a and 12b, and
Output to 3a. The multiplexing circuit 33a multiplexes and outputs the multiplexed data for each switching unit. The buffer 34a is a multiplexing circuit 3
The exchange unit from 3a is accumulated, and the accumulated amount of the exchange unit at that time is output. Further, the storage unit 30b performs essentially the same operation as the storage unit 30a, targeting the exchange units of the low quality class. The output of the accumulation amount from the buffer 34a is drawn into the accumulation amount monitoring means 60 of the first priority, and the congestion state of the high quality class buffer is determined there.

The first priority accumulation amount monitoring means 60 shown in FIG. 1 is constituted by an accumulation amount threshold setting register 61, a high quality class buffer accumulation amount receiving circuit 62, and a comparison circuit 63. The output of the accumulation amount is drawn into a high-quality class buffer accumulation amount receiving circuit 62, and the accumulation amount is compared with a value of an accumulation amount threshold setting register 61 by a comparison circuit 63. If the value of the storage amount is larger than the value of 61, a signal indicating that the buffer of the high quality class is in a congestion state is output.

The output of the storage amount from the buffer 34b is fed to the storage amount monitoring means 50 of the second priority, and the congestion state of the low-quality class buffer is determined.
The storage amount monitoring means 50 of the second priority includes a storage amount threshold setting register 51, a low quality class buffer storage amount receiving circuit 52 that receives an output from the buffer 34b, and a comparison circuit 53. When the output from the buffer 34b is larger than the value of the accumulation amount threshold setting register 51, the comparison circuit 53 outputs a signal indicating that the buffer of the low quality class is in the congestion state.

The first transfer rate monitoring means 80 shown in FIG.
Is a transfer rate threshold setting register 81, a transmission byte counter 82, a timer circuit 83, a comparison circuit 84, a latch circuit 85, a transfer rate monitoring signal reception circuit 86,
Low quality class congestion signal receiving circuit 87 and read determination circuit 8
And 8. The transmission byte counter 82 receives a transfer signal of a high-quality class exchange unit and counts the number of bytes transferred by the timer circuit 83 within a predetermined time. The counting result is drawn into the comparison circuit 84, and the comparison circuit 84 outputs a transfer rate monitoring signal when the transfer byte number is smaller than the value of the transfer rate threshold setting register 81. The transfer rate monitoring signal is held by the latch circuit 85 and is drawn into the transfer rate monitoring signal receiving circuit 86.

A signal from the latch circuit 85 and a signal from the comparison circuit 53 via the low-quality class congestion signal receiving circuit 87 are input to the read determination circuit 88, and a signal when the low-quality class buffer is congested is input. In addition, when the transfer rate monitoring signal is input, a signal of an instruction to read a transfer unit of a low quality class from the buffer 34b is drawn into the read order signal receiving circuit 41.

The reading means 40 shown in FIG. 1 comprises a reading order signal receiving circuit 41, a priority reading instruction circuit 42, a high quality class reading circuit 44, a low quality class reading circuit 45, and a multiplexing circuit 46. Is done. Read order signal receiving circuit 41
And the signal of the high quality class buffer from the comparison circuit 63 in a congested state are both drawn into the priority reading instruction circuit 42. The priority read instructing circuit 42 instructs the multiplexing circuit 46 to read a low quality class exchange unit when there is an output from the read order signal receiving circuit 41 and there is no signal in a high quality class buffer in a congested state. The input of other signals instructs the reading of the exchange unit of the high quality class. If the reading of the exchange unit is of a high quality class, the high quality class reading circuit 44 outputs 1 from the reception counter 32a.
In the case of a low quality class exchange unit, the low quality class reading circuit 45 subtracts 1 from the reception counter 32b.

Other than this embodiment, the first transfer rate monitoring means 80 uses the thresholds of the transfer rate threshold setting register 81 and the accumulation amount threshold setting registers 51, 61 as the configuration of the priority control device (type of quality class, buffer amount). ,
It is also conceivable to determine data optimally by experiment or on a desk for an optimum threshold value based on a combination of the maximum transfer rate or the like and the type of quality class used by the user, and to change each threshold value according to the data. It is also conceivable to change the time interval when determining the order of reading the exchange units from the buffer.

FIG. 3 is a diagram for explaining the configuration of the second embodiment of the present invention. FIG. 4 is a diagram for explaining a second embodiment of the present invention. Hereinafter, a second embodiment of the present invention will be described mainly with reference to FIG. The exchange units are sorted based on the quality class set in the input exchange unit, and are further sorted by the quality class-based distribution lowering means 20 for lowering the quality class of a specific exchange unit, and the quality class-based distribution lowering means 20. Storage means 30 for performing FIFO processing on exchanged units
Reading means 40 for reading and outputting the exchange units from the accumulation means 30 in accordance with the priority order; and quality class accumulation amount monitoring means 90 for monitoring the accumulation amount of the exchange units for each quality class stored in the accumulation means. And an example of a second transfer rate monitoring means 100 for monitoring whether the transfer rate exceeds a seventh threshold value for each transfer destination address.

The quality class-based distribution lowering means 20 of FIG. 3 performs the distribution according to the quality class set for the input exchange unit, lowers the priority of the quality class of the specific exchange unit by one, and lowers the priority order. In the case of the priority quality class, the exchange unit is discarded. The quality class distribution lowering means 20 includes a quality class distribution lowering unit 20a,
20b and an exchange unit-specific transmission status circuit 20c, and the quality class distribution lowering units 20a and 20b are essentially the same.

The quality-class-based distribution lowering units 20a and 20b allocate and output the high-quality class or the low-quality class according to the quality class set for the input exchange unit.
At this time, the second transfer rate monitoring means 100 monitors whether or not the transfer rate is higher than a predetermined value for each transfer destination address. If the buffer of the quality class set in the exchange unit is in a congestion state, the transfer destination address is set to the designated exchange unit operation status receiving circuit from the transmission state circuit 20c for each exchange unit (detailed description will be given later). 20a1. The transfer destination address and the exchange unit are both designated exchange unit identification circuit 20a.
When the transfer destination address of the exchange unit matches the transfer destination address, a quality class decrease instruction signal for setting a lower quality class of the exchange unit is sent to the quality class lowering circuit 20a4. Quality class extraction circuit 20a3
Extracts the information of the quality class set in the exchange unit and pulls the information to the quality class lowering circuit 20a4. The quality class lowering circuit 20a4 is a designated replacement unit identification circuit 20a2.
The high-quality class is a low-quality class, and the low-quality class information is a signal instructing discarding (for example, bit string 00 is discarded, bit string 0
1 is output to FIFO 31a1, bit string 11 is FIFO
31a21) is drawn into the 1-3 selector circuit 20a5 and the write control circuit 20a6. Write control circuit 20
In a6, 1 is added to the reception counter 32a when the 1-3 selector 20a5 selects / outputs the exchange unit of the high quality class, and 1 is added to the reception counter 32b when the exchange unit of the low quality class is selected / output. 1-3 selector circuit 2
0a5 pulls in the output from the quality class lowering circuit 20a4, and replaces the exchange unit with the high quality class or low quality class F.
Output to IFO.

The reading means 40 shown in FIG. 3 comprises a priority reading instruction circuit 42, a high quality class reading circuit 44, a low quality class reading circuit 45, and a multiplexing circuit 46. A signal indicating whether or not the exchange unit is stored in the high-quality class buffer is drawn into the priority reading instruction circuit 42. When there is no exchange unit in the high quality class buffer, the priority read instruction circuit 42 reads the exchange unit of the low quality class from the storage unit 30b, and when the exchange unit is accumulated in the high quality class, preferentially reads the exchange unit. If the reading of the exchange unit is of the high quality class, the high quality class reading circuit 44 subtracts 1 from the reception counter 32a. If the reading of the exchange unit is the exchange unit of the low quality class, the low quality class reading circuit 45 subtracts 1 from the reception counter 32b. Subtract. In addition, the quality class-based distribution lowering unit 20
b and the storage units 30a and 30b are the same as those in FIGS.

The high quality class exchange unit output from the storage unit 30a is drawn into the transmission byte counter 102 and the comparison circuit 104 of the second transfer rate monitoring means 100. The transmission byte counter 102 receives a signal of the exchange unit being transferred, and the timer circuit 101 counts the number of transfer bytes within a predetermined time. The counting result is supplied to the comparing circuit 104. When the number of transferred bytes is larger than the value of the transfer rate threshold setting register 103, the comparing circuit 104 calculates the transfer destination address and the quality class from the exchange unit drawn into the comparing circuit 104. Information is extracted, and the transfer destination address and the quality class information are output as a transfer rate monitoring signal. The transfer rate monitoring signal is supplied to the latch circuit 10.
5 and is input to the quality class lowering circuit 20c4 via the low quality class exchange unit state signal receiving circuit 20c1.

The output of the buffer amount of the high-quality class buffer from the buffer 34a is input to the comparison circuit 90a3 via the high-quality class buffer storage amount receiving circuit 90a2, and is compared with the storage amount threshold setting register 90a1. You. At this time, when the accumulated amount of the high quality class buffer exceeds the value of the accumulated amount threshold setting register 90a1, the comparison circuit 90a3 outputs the buffer congestion signal to the quality class via the high quality class exchange unit state signal receiving circuit 20c2. The signal is input to the lowering circuit 20c4.

The output of the storage amount of the low-quality class buffer from the buffer 34b is input to the comparison circuit 90b3 via the low-quality class buffer storage amount receiving circuit 90b2, and is compared with the storage amount threshold setting register 90b1. You. At this time, if the accumulated amount of the low-quality class buffer exceeds the value of the accumulated amount threshold setting register 90b1, the comparison circuit 90b3 outputs the low-quality class buffer congestion signal via the switching unit-based transmission state receiving circuit 20c3. It is input to the class lowering circuit 20c4.

If the quality class indicated by the quality class information from the transfer rate monitoring signal is congested with the high quality class buffer congestion signal or the low quality class buffer congestion signal, the quality switching unit 20c4 receives the designated switching unit operation status receiving circuit. The transfer destination address is output to 20a1. In the embodiments other than this embodiment, the second transfer rate monitoring means 100 sets the thresholds of the transfer rate threshold setting register 103 and the accumulation amount threshold setting registers 90a1 and 90b1 to the configuration of the priority control device (type of quality class, buffer amount,
It is also conceivable to determine the optimum threshold value by experiment or by obtaining data on a desk according to the bias of the quality class used by the user or the like and to change the data according to the data. Further, if the transfer rate to the transfer destination address is equal to or greater than a predetermined value after a certain period of time after the change from the high quality class to the low quality class, the exchange unit may be changed from the low quality class to discard. Conceivable.

[0030]

According to the present invention, when the exchange units of the high quality class are burst-inputted and the storage means for accumulating the exchange units of the high quality class has room, the exchange units of the low quality class are read out, and the low quality class is read. To prevent the exchange unit from being destroyed.
Further, a transfer address that inputs abnormal traffic is identified, and the quality class of the exchange unit transferred to the transfer address is reduced, or the transfer quality of another exchange unit is reduced by discarding the exchange unit. Can be prevented.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a configuration of a first exemplary embodiment of the present invention.

FIG. 2 is a diagram for explaining a first embodiment of the present invention.

FIG. 3 is a diagram illustrating a configuration of a second exemplary embodiment of the present invention.

FIG. 4 is a diagram illustrating a second embodiment of the present invention.

[Explanation of symbols]

 10 quality class distribution means 10a, 10b quality class distribution section 11a, 11b quality class extraction circuit 12a, 12b selector circuit 13a, 13b write control circuit 20 quality class distribution reduction means 20a, b quality class distribution Minute drop unit 20a1 Designated exchange unit operation status receiving circuit 20a2 Designated exchange unit identification circuit 20a3 Quality class extraction circuit 20a4 Quality class reduction circuit 20a5 1-3 selector circuit 20a6 Write control circuit 20c Transmission unit circuit for each exchange unit 20c1 Low quality class exchange Unit status signal receiving circuit 20c2 High quality class switching unit status signal receiving circuit 20c3 Transmission status receiving circuit for each switching unit 20c4 Quality class lowering circuit 30 Storage means 30a, 30b Storage units 31a1, 31a2 FIFO 32a, 32b Reception counters 33a, 33b Duplicating circuits 34a, 34b Buffer 40 Reading means 41 Reading order signal receiving circuit 42 Priority reading instruction circuit 44 High quality class reading circuit 45 Low quality class reading circuit 46 Multiplexing circuit 50 Second priority storage amount monitoring means 51 Storage Amount threshold setting register 52 Low quality class buffer accumulation amount receiving circuit 53 Comparison circuit 60 First priority accumulation amount monitoring means 61 Accumulation amount threshold setting register 62 High quality class buffer accumulation amount receiving circuit 63 Comparison circuit 80 First transfer Rate monitoring means 81 Transfer rate threshold setting register 82 Transmission byte counter 83 Timer circuit 84 Comparison circuit 85 Latch circuit 86 Transfer rate monitoring signal receiving circuit 87 Low quality class congestion signal receiving circuit 88 Read determination circuit 90 Each quality class accumulation amount monitoring means 90a1 Storage amount threshold setting register 90 a2 High quality class buffer accumulation amount receiving circuit 90a3 Comparison circuit 90b1 Accumulation amount threshold setting register 90b2 Low quality class buffer accumulation amount receiving circuit 90b3 Comparison circuit 100 Second transfer rate monitoring means 101 Timer circuit 102 Transmission byte counter 103 Transfer rate threshold setting Register 104 Comparison circuit 105 Latch circuit

Claims (4)

[Claims] 1. A quality class distribution means for performing distribution according to a quality class set for each input exchange unit, and a quality class corresponding to each of the exchange units distributed by the quality class distribution means. Storage means for performing a first-in first-out processing for each of the quality classes, wherein a priority is given to each of the quality classes for reading the exchange units from the storage means, and the exchange units are preferentially read from the first priority quality class. A priority control device which reads out the exchange units of the next priority quality class when the exchange units to be read are exhausted, wherein the priority control device sequentially reads the exchange units of the quality classes of the first to lowest priority levels; A second priority storage quantity monitoring means for monitoring the storage quantity of the replacement units of the second priority quality class in the storage means, and a first priority product First transfer rate monitoring means for monitoring a transfer rate of a class; and read means for reading and outputting an exchange unit from the storage means, wherein the read means reads the first priority quality class from the storage means. Is read and output, and the transfer rate in the first transfer rate monitoring means exceeds a predetermined transfer rate, and the storage of the exchange units in the second priority storage amount monitoring means is performed. A priority control device characterized in that when the quantity exceeds a predetermined value, the exchange unit of the second priority quality class is read and output. 2. The method according to claim 1, wherein, when the transfer rate is lower than the predetermined transfer rate, priority is given to reading out an exchange unit of the quality class of the first priority from the storage means and outputting it. Priority control device characterized. 3. The storage device according to claim 1, further comprising a first priority storage amount monitoring unit that monitors the storage amount of the exchange unit of the first quality class in the storage unit. A priority control device characterized in that when the accumulated amount of the exchange unit in the accumulated amount monitoring means of the order exceeds a predetermined value, the exchange unit of the quality class of the first priority is preferentially read from the accumulation means and outputted. . 4. A priority control device, wherein a priority of reading is given to each quality class set for each input switching unit, and wherein priority is given to reading of each switching unit of the first priority quality class. A quality class distribution reducing means for performing distribution according to each quality class set for each exchange unit, and changing or reducing the quality class of the exchange unit for which a specific transfer destination address is set or discarding the exchange unit. Storage means for performing first-in first-out processing for the exchange units allocated by the quality class-based distribution reducing means for each quality class; and monitoring the storage amount of the exchange units for each quality class in the storage means. Quality class storage amount monitoring means, second transfer rate monitoring means for monitoring the transfer rate of the exchange unit for each transfer destination address, priority of the exchange unit from the accumulation means Reading means for reading in accordance with the rank, reading the replacement unit of the quality class of the first priority with priority, and reading out the replacement unit of the quality class of the next priority when there is no more replacement unit to read, and from the first to the lowest. When sequentially reading the exchange units of the quality classes of priorities up to the above, the transfer rate of the exchange unit for each transfer destination address exceeds a predetermined value set for each transfer destination address, and the exchange rate exceeds the predetermined value. A priority control device characterized in that when the accumulated amount of the quality class of a unit exceeds a predetermined value, the quality class set in the exchange unit is changed to a lower priority quality class or the exchange unit is discarded.