JPH11238690A - Dummy wafer and manufacture thereof - Google Patents
Dummy wafer and manufacture thereofInfo
- Publication number
- JPH11238690A JPH11238690A JP10299416A JP29941698A JPH11238690A JP H11238690 A JPH11238690 A JP H11238690A JP 10299416 A JP10299416 A JP 10299416A JP 29941698 A JP29941698 A JP 29941698A JP H11238690 A JPH11238690 A JP H11238690A
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- dummy wafer
- sic
- substrate
- wafer according
- surface roughness
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Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体製造工程で
の低圧ＣＶＤ装置に用いられるダミーウエハ及びその製
造法に関する。[0001] 1. Field of the Invention [0002] The present invention relates to a dummy wafer used in a low-pressure CVD apparatus in a semiconductor manufacturing process and a method of manufacturing the same.
【０００２】[0002]
【従来の技術】半導体ウエハの表面に、例えば窒化シリ
コン等の膜を形成する際には、低圧ＣＶＤ装置が用いら
れている。この低圧ＣＶＤ装置は、例えば図２に示すよ
うに、アウターチューブ１１とインナーチューブ１２と
で構成された二重管１３を有している。アウターチュー
ブ１１及びインナーチューブ１２の下部には、基台１４
が配置され、これらのチューブ１１、１２を支持してい
る。基台１４には、インナーチューブ１２の内側の空間
に連通するガス導入管１５と、インナーチューブ１２と
アウターチューブ１１との間の空間に連通する排気管１
６とが取付けられている。2. Description of the Related Art When a film such as silicon nitride is formed on the surface of a semiconductor wafer, a low-pressure CVD apparatus is used. This low-pressure CVD apparatus has a double tube 13 composed of an outer tube 11 and an inner tube 12, as shown in FIG. 2, for example. A base 14 is provided below the outer tube 11 and the inner tube 12.
Are arranged and support these tubes 11 and 12. The base 14 has a gas introduction pipe 15 communicating with a space inside the inner tube 12 and an exhaust pipe 1 communicating with a space between the inner tube 12 and the outer tube 11.
6 are attached.
【０００３】基台１４の下面には開口があり、リフト１
８によって昇降動作する蓋体１７が開閉可能に取付けら
れている。蓋体１７上には、台座１９を介してウエハボ
ート２０が設置され、ウエハボート２０には、多数の半
導体ウエハＷが上下に配列されて支持されている。した
がって、リフト１８により蓋体１７が上昇すると、蓋体
１７上に台座１９を介して設置されたウエハボート２０
及びウエハＷが二重管１３内に導入され、蓋体１７が基
台１４の開口を封止する。また、リフト１８により蓋体
１７が下降すると、基台１４の開口が開いて、蓋体１７
上に台座１９を介して設置されたウエハボート２０及び
ウエハＷが取り出されるようになっている。また、二重
管１３の外周には、ヒータを有する円筒状の炉体２１が
配置されている。There is an opening on the lower surface of the base 14, and the lift 1
A lid 17 that moves up and down by 8 is mounted to be openable and closable. A wafer boat 20 is installed on the lid 17 via a pedestal 19, and a large number of semiconductor wafers W are vertically supported by the wafer boat 20. Therefore, when the lid 17 is lifted by the lift 18, the wafer boat 20 installed on the lid 17 via the pedestal 19
Then, the wafer W is introduced into the double tube 13, and the lid 17 seals the opening of the base 14. When the lid 17 is lowered by the lift 18, the opening of the base 14 is opened and the lid 17 is opened.
The wafer boat 20 and the wafer W installed on the upper side via the pedestal 19 are taken out. A cylindrical furnace body 21 having a heater is arranged on the outer periphery of the double pipe 13.
【０００４】このＣＶＤ装置においては、半導体ウエハ
Ｗが支持された部分が一定の温度になるようにすること
が重要であるが、実際にはウエハボート２０の上下端部
近傍に支持されたウエハＷの温度は、中間部に支持され
たウエハＷの温度に比べて変動し、不良品を発生しやす
い傾向がある。このため、ウエハボート２０の上下端部
近傍には、ダミーウエハＷａを置くことにより、中間部
に配置された本当のウエハＷの温度条件が一定になるよ
うにしている。In this CVD apparatus, it is important that the temperature of the portion where the semiconductor wafer W is supported is kept constant, but in practice, the wafer W supported near the upper and lower ends of the wafer boat 20 is important. Temperature fluctuates as compared with the temperature of the wafer W supported in the intermediate portion, and tends to cause defective products. For this reason, by placing dummy wafers Wa near the upper and lower ends of the wafer boat 20, the temperature condition of the true wafers W arranged in the middle is made constant.
【０００５】従来、このようなダミーウエハＷａとして
は、シリコンウエハの不良品や、むだ材を使っていた。
しかしながら、シリコンウエハ自体も不足する傾向があ
るため、カーボン基板の表面にＳｉＣ膜をコーティング
した基板や、全体がＳｉＣでできた基板からなるダミー
ウエハが用いられるようになってきた。特に、全体がＳ
ｉＣからなるダミーウエハは、窒化シリコン等のＣＶＤ
膜と熱膨張率が近いため、表面に形成されたＣＶＤ膜が
剥れにくく、ＣＶＤ膜がある程度厚くなるまで繰り返し
使用しても、ＣＶＤ膜の剥れによるパーティクル汚染が
起こりにくいという利点があった。Conventionally, defective silicon wafers and waste materials have been used as such dummy wafers Wa.
However, since silicon wafers themselves tend to be insufficient, a dummy wafer composed of a substrate in which the surface of a carbon substrate is coated with a SiC film or a substrate entirely made of SiC has been used. In particular, the whole S
The dummy wafer made of iC is made of CVD such as silicon nitride.
Since the thermal expansion coefficient is close to that of the film, there is an advantage that the CVD film formed on the surface is hardly peeled off and particle contamination due to the peeling of the CVD film hardly occurs even when the CVD film is repeatedly used until the CVD film becomes thick to some extent. .
【０００６】[0006]
【発明が解決しようとする課題】しかしながら、全体が
ＳｉＣからなるダミーウエハにおいても、数回使用する
と、ＣＶＤ膜の剥れによるパーティクル汚染を生じる虞
れがあるため、比較的頻繁にＣＶＤ膜の洗浄、除去作業
を行う必要があった。However, even if a dummy wafer made entirely of SiC is used several times, particle contamination due to peeling of the CVD film may occur. Removal work had to be performed.
【０００７】したがって、本発明の目的は、ＣＶＤ膜が
かなり厚くなっても剥れにくく、それによってＣＶＤ膜
の洗浄、除去作業の回数を著しく少なくすることができ
るようにしたダミーウエハ及びその製造法を提供するこ
とにある。SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a dummy wafer and a method of manufacturing the same, which are hardly peeled off even when the CVD film becomes considerably thick, thereby significantly reducing the number of times of cleaning and removing the CVD film. To provide.
【０００８】[0008]
【課題を解決するための手段】上記目的を達成するた
め、本発明のダミーウエハは、半導体製造工程での低圧
ＣＶＤ装置に用いられるダミーウエハにおいて、全体が
ＳｉＣからなり、平均表面粗さＲａが１〜１０μｍであ
ることを特徴とする。In order to achieve the above object, a dummy wafer according to the present invention is a dummy wafer used for a low-pressure CVD apparatus in a semiconductor manufacturing process, which is entirely made of SiC and has an average surface roughness Ra of 1 to 1. The thickness is 10 μm.
【０００９】上記本発明のダミーウエハにおいては、最
大表面粗さＲｍａｘが６〜１００μｍであることが好ま
しい。また、厚さが０．３〜３．０ｍｍ、最大径が１０
０〜４００ｍｍであることが好ましい。更に、円形又は
円形の一部を切欠いた形状をなすことが好ましい。更
に、β型のＳｉＣからなることが好ましい。更にまた、
ＳｉＣ中の不純物濃度が０．５〜０．０１ｐｐｍである
ことが好ましい。In the dummy wafer of the present invention, it is preferable that the maximum surface roughness Rmax is 6 to 100 μm. The thickness is 0.3 to 3.0 mm and the maximum diameter is 10
It is preferably from 0 to 400 mm. Further, it is preferable to form a shape in which a circle or a part of a circle is cut. Further, it is preferable to be made of β-type SiC. Furthermore,
It is preferable that the impurity concentration in SiC is 0.5 to 0.01 ppm.
【００１０】また、本発明のダミーウエハの製造法は、
カーボン基板を製作する工程と、このカーボン基板表面
にＣＶＤコーティングによってＳｉＣ膜を形成する工程
と、前記カーボン基板を除去してＳｉＣ基板を作成する
工程と、このＳｉＣ基板を研削加工する工程と、前記Ｓ
ｉＣ基板を面取りする工程と、前記ＳｉＣ基板表面をサ
ンドブラストして、平均表面粗さＲａを１〜１０μｍと
する工程とを含むことを特徴とする。[0010] The method of manufacturing a dummy wafer according to the present invention comprises:
A step of manufacturing a carbon substrate, a step of forming a SiC film on the surface of the carbon substrate by CVD coating, a step of forming the SiC substrate by removing the carbon substrate, and a step of grinding the SiC substrate; S
The method includes a step of chamfering the iC substrate and a step of sandblasting the surface of the SiC substrate so that the average surface roughness Ra is 1 to 10 μm.
【００１１】上記本発明のダミーウエハの製造法におい
ては、ＳｉＣ又はＡｌ2 Ｏ3 からなる砥粒を用いてサン
ドブラストすることが好ましい。また、粒度２０〜３２
０メッシュの砥粒を用いてサンドブラストすることが好
ましい。更に、サンドブラストの圧力１．０〜９．０ｋ
ｇ／ｃｍ2 、時間２〜３０分の条件で処理することが好
ましい。In the method for manufacturing a dummy wafer of the present invention, it is preferable to sandblast using abrasive grains made of SiC or Al 2 O 3 . In addition, particle size 20-32
It is preferable to sandblast using 0-mesh abrasive grains. Further, the pressure of the sand blast is 1.0 to 9.0 k.
The treatment is preferably performed under the conditions of g / cm 2 and time of 2 to 30 minutes.
【００１２】本発明のダミーウエハによれば、全体がＳ
ｉＣからなるので、窒化シリコン、ポリシリコン等のＣ
ＶＤ膜と熱膨張係数が近く、ＣＶＤ装置からボートを出
し入れして、８００℃から２０℃までの激しい温度変化
を繰り返しても、ダミーウエハ表面に付着したＣＶＤ膜
が剥れにくくなる。また、平均表面粗さＲａを１〜１０
μｍとしたことにより、上記ＣＶＤ膜が物理的、機械的
に密着して、より一層剥れにくくなり、ＣＶＤ処理を繰
り返してダミーウエハの表面にＣＶＤ膜がかなり厚く形
成されても、ＣＶＤ膜の剥れを防止することができる。
このため、ダミーウエハ表面に付着したＣＶＤ膜を除去
するための洗浄作業の回数を著しく少なくすることが可
能となり、生産性の向上及び製造コスト低減を図ること
ができる。According to the dummy wafer of the present invention, the entirety is S
Since it is made of iC, C such as silicon nitride and polysilicon
Even if the thermal expansion coefficient is close to that of the VD film, the CVD film adhered to the surface of the dummy wafer is less likely to be peeled off even when a boat is taken in and out of the CVD apparatus and the temperature is repeatedly changed from 800 ° C. to 20 ° C. Further, the average surface roughness Ra is 1 to 10
When the thickness is set to μm, the CVD film is physically and mechanically adhered to the film, making the film more difficult to peel. Even if the CVD process is repeated and the CVD film is formed to be considerably thick on the surface of the dummy wafer, the CVD film is peeled. This can be prevented.
For this reason, the number of cleaning operations for removing the CVD film attached to the surface of the dummy wafer can be significantly reduced, and the productivity can be improved and the manufacturing cost can be reduced.
【００１３】本発明のダミーウエハの製造法によれば、
ＣＶＤコーティングによって形成したＳｉＣ膜からダミ
ーウエハを形成するので、ＳｉＣの純度を十分に高くす
ることができる。また、最後の工程のサンドブラストの
砥粒の材質や大きさを選択することにより、所望の表面
粗さＲａを得ることができる。その結果、ＣＶＤ処理に
より表面に形成されるＣＶＤ膜が剥れにくく、ＣＶＤ膜
を除去するための洗浄作業の回数を著しく少なくするこ
とができる上記ダミーウエハを製造することができる。According to the method of manufacturing a dummy wafer of the present invention,
Since the dummy wafer is formed from the SiC film formed by CVD coating, the purity of SiC can be sufficiently increased. In addition, a desired surface roughness Ra can be obtained by selecting the material and size of the abrasive grains of the sand blast in the last step. As a result, it is possible to manufacture the above-mentioned dummy wafer in which the CVD film formed on the surface by the CVD process is hardly peeled off and the number of cleaning operations for removing the CVD film can be significantly reduced.
【００１４】[0014]
【発明の実施の形態】図１には、本発明のダミーウエハ
の製造工程が示されている。まず、工程Ｓ１として、高
純度カーボン基板１を製作する。このカーボン基板１の
材質としては、ＪＩＳ Ｒ７２２１に定められた高純度
黒鉛を用いることができる。カーボン基板１の形状及び
大きさは、目的とするダミーウエハの形状にほぼ合わせ
た形状及び大きさとすることが好ましく、厚さは２〜３
０ｍｍが好ましい。FIG. 1 shows a process of manufacturing a dummy wafer according to the present invention. First, as step S1, a high-purity carbon substrate 1 is manufactured. As a material of the carbon substrate 1, high-purity graphite specified in JIS R7221 can be used. It is preferable that the shape and size of the carbon substrate 1 be substantially matched to the shape of the target dummy wafer, and the thickness be 2 to 3
0 mm is preferred.
【００１５】次に、工程Ｓ２として、カーボン基板１の
表面にＳｉＣ膜２ａを所定の厚さになるようにＣＶＤコ
ーティングする。ＳｉＣ膜２ａの厚さは、目的とするダ
ミーウエハの厚さよりやや厚い程度が好ましく、具体的
には０．７〜５．０ｍｍが好ましい。このＳｉＣ膜２ａ
は、ＣＶＤ膜であるためβ型である。また、不純物濃度
が０．５ｐｐｍ以下となるように形成されることが好ま
しいが、工業的に形成する場合は、０．０１ｐｐｍ以上
で十分である。Next, as a step S2, the surface of the carbon substrate 1 is CVD-coated with a SiC film 2a so as to have a predetermined thickness. The thickness of the SiC film 2a is preferably slightly thicker than the target thickness of the dummy wafer, and specifically, is preferably 0.7 to 5.0 mm. This SiC film 2a
Is a β type because it is a CVD film. In addition, it is preferable that the impurity concentration is 0.5 ppm or less, but in the case of industrial formation, 0.01 ppm or more is sufficient.
【００１６】次いで、工程Ｓ３として、カーボン基板１
を除去して、２枚のＳｉＣ基板２ｂを作成する。カーボ
ン基板１の除去は、例えばダイヤモンドカッタでカーボ
ン基板１の肉厚中心部を平面方向に沿ってスライスし、
残ったカーボン基板１を研削して除去する方法などが採
用される。Next, in step S3, the carbon substrate 1
Is removed to form two SiC substrates 2b. The removal of the carbon substrate 1 is performed by, for example, slicing the center of the thickness of the carbon substrate 1 along a plane direction with a diamond cutter,
A method of grinding and removing the remaining carbon substrate 1 is employed.
【００１７】続いて、工程Ｓ４として、上記ＳｉＣ基板
２ｂを研削加工して、所定の厚さ及び大きさのＳｉＣ基
板２ｃを作成する。このＳｉＣ基板２ｃの厚さは０．３
〜３．０ｍｍ、最大径は半導体ウエハに合わせて１００
〜４００ｍｍであることが好ましい。また、ＳｉＣ基板
２ｃの形状は、半導体ウエハの形状に合わせた形状とさ
れ、例えば円形、又は円形の外周の一部を直線的に切欠
いた形状などが好ましく採用される。Subsequently, in step S4, the SiC substrate 2b is ground to form a SiC substrate 2c having a predetermined thickness and size. The thickness of the SiC substrate 2c is 0.3
~ 3.0mm, maximum diameter is 100 in accordance with semiconductor wafer
It is preferable that it is 400 mm. The shape of the SiC substrate 2c is adapted to the shape of the semiconductor wafer. For example, a circular shape or a shape in which a part of the circular outer periphery is cut linearly is preferably employed.
【００１８】更に、工程Ｓ５として、上記ＳｉＣ基板２
ｃの外周を面取りして、外周が丸みを帯びた形状あるい
はテーパ状等をなすＳｉＣ基板２ｄを作成する。Further, in step S5, the SiC substrate 2
An SiC substrate 2d is formed by chamfering the outer periphery of c to form a rounded or tapered outer periphery.
【００１９】最後に、工程Ｓ６として、ＳｉＣ基板２ｄ
表面をサンドブラスト処理して、平均表面粗さＲａを１
〜１０μｍとすることにより、本発明のダミーウエハＷ
ａを得る。Finally, in step S6, the SiC substrate 2d
The surface is sandblasted to obtain an average surface roughness Ra of 1
By setting the thickness of the dummy wafer W of the present invention to
Obtain a.
【００２０】この場合、砥粒としては、ＳｉＣ、Ａｌ2
Ｏ3 等の硬質粒子からなり、粒度２０〜３２０メッシュ
のものを用いることが好ましい。砥粒の粒度が、上記範
囲よりも細かいと、平均表面粗さＲａを１μｍ以上にす
ることが難しくなり、上記範囲よりも粗いと、平均表面
粗さＲａが１０μｍを超える可能性があり、また、衝撃
によってＳｉＣ基板が破損する虞れがある。In this case, the abrasive grains are SiC, Al 2
It is preferable to use a hard particle such as O 3 having a particle size of 20 to 320 mesh. If the particle size of the abrasive grains is finer than the above range, it is difficult to make the average surface roughness Ra 1 μm or more, and if it is coarser than the above range, the average surface roughness Ra may exceed 10 μm, In addition, there is a possibility that the SiC substrate may be damaged by the impact.
【００２１】また、サンドブラストは、圧力１．０〜
９．０ｋｇ／ｃｍ2 、時間２〜３０分の条件で処理する
ことが好ましい。サンドブラストの圧力が上記よりも低
く、処理時間が上記よりも短いと、平均表面粗さＲａを
１μｍ以上にすることが難しくなり、サンドブラストの
圧力が上記よりも高く、処理時間が上記よりも長いと、
ＳｉＣ基板を破損したり、厚さ等が変化したりする虞れ
がある。In addition, the sand blast has a pressure of 1.0 to 1.0.
The treatment is preferably performed under the conditions of 9.0 kg / cm 2 and a time of 2 to 30 minutes. If the sandblast pressure is lower than the above and the processing time is shorter than the above, it is difficult to make the average surface roughness Ra 1 μm or more, and if the sandblast pressure is higher than the above and the processing time is longer than the above, ,
There is a possibility that the SiC substrate may be damaged or the thickness or the like may change.
【００２２】こうして得られた本発明のダミーウエハＷ
ａは、全体がＳｉＣからなり、平均表面粗さＲａが１〜
１０μｍである。上記表面粗さＲａが１μｍよりも小さ
いと、半導体製造時のＣＶＤ膜の剥れ防止効果が十分に
得られず、１０μｍを超えると、製造作業性が悪くなる
と共に、サンドブラストの際に砥粒の衝撃によって基板
が破損する虞れがある。平均表面粗さＲａは上記範囲中
１．３〜８μｍの範囲が好ましく、１．５〜７μｍの範
囲が特に好ましい。The dummy wafer W of the present invention thus obtained
a is composed entirely of SiC and has an average surface roughness Ra of 1 to 1.
10 μm. If the surface roughness Ra is less than 1 μm, the effect of preventing the peeling of the CVD film during semiconductor production cannot be sufficiently obtained. If the surface roughness Ra exceeds 10 μm, the production workability is deteriorated, and the abrasive grains are disadvantageously reduced during sandblasting. The substrate may be damaged by the impact. The average surface roughness Ra is preferably in the range of 1.3 to 8 μm, more preferably in the range of 1.5 to 7 μm.
【００２３】また、好ましくは、最大表面粗さＲｍａｘ
が６〜１００μｍとされている。最大表面粗さＲｍａｘ
が上記の範囲であることが好ましい理由は、上記平均表
面粗さＲａの限定理由とほぼ同じである。Preferably, the maximum surface roughness Rmax
Is 6 to 100 μm. Maximum surface roughness Rmax
Is preferably in the above range for substantially the same reason as the above-mentioned reason for limiting the average surface roughness Ra.
【００２４】更に、好ましくは、厚さが０．３〜３．０
ｍｍ、最大径が１００〜４００ｍｍとされ、円形又は円
形の一部を切欠いた形状をなしている。これは、半導体
ウエハに準じた厚さ、大きさ、及び形状とすることが、
ＣＶＤ装置の温度調節上及び取扱い上好ましいからであ
る。Further, preferably, the thickness is 0.3 to 3.0.
mm, the maximum diameter is 100 to 400 mm, and the shape is a circle or a part of a circle cut out. This is the thickness, size, and shape according to the semiconductor wafer,
This is because it is preferable in terms of temperature control and handling of the CVD apparatus.
【００２５】更にまた、好ましくは、β型のＳｉＣから
なり、ＳｉＣ中の不純物濃度が０．５〜０．０１％とさ
れている。β型のＳｉＣは、ＣＶＤ法によって形成でき
るので、高純度のものを作りやすいという特徴がある。
また、純度が上記範囲よりも低いと、半導体ウエハへの
汚染を十分に防止できず、純度が上記よりも高いと原料
等の製造が難しく、コスト高となる。Further, preferably, it is made of β-type SiC, and the impurity concentration in the SiC is set to 0.5 to 0.01%. Since β-type SiC can be formed by a CVD method, it has a feature that it is easy to produce a high-purity SiC.
If the purity is lower than the above range, contamination of the semiconductor wafer cannot be sufficiently prevented.
【００２６】[0026]
【実施例】図１に示した工程に従って、ダミーウエハを
製造した。ダミーウエハの厚さは０．７ｍｍ、最大径は
２００ｍｍ、形状は円形とした。ダミーウエハを構成す
るＳｉＣ中の不純物濃度は０．２７ｐｐｍであった。EXAMPLE A dummy wafer was manufactured according to the process shown in FIG. The dummy wafer had a thickness of 0.7 mm, a maximum diameter of 200 mm, and a circular shape. The impurity concentration in SiC constituting the dummy wafer was 0.27 ppm.
【００２７】最後のブラスト工程において、ブラスト処
理を行わないもの（比較例）、２４０メッシュのＳｉＣ
砥粒でブラストしたもの（実施例１）、１００メッシュ
のＳｉＣ砥粒でブラストしたもの（実施例２）、６０メ
ッシュのＳｉＣ砥粒でブラストしたもの（実施例３）、
３０メッシュのＳｉＣ砥粒でブラストしたもの（実施例
４）を得た。In the last blasting step, no blasting treatment (comparative example), 240 mesh SiC
Those blasted with abrasive grains (Example 1), those blasted with 100 mesh SiC abrasive grains (Example 2), those blasted with 60 mesh SiC abrasive grains (Example 3),
What was blasted with 30 mesh SiC abrasive grains (Example 4) was obtained.
【００２８】その結果、得られた各ダミーウエハの平均
表面粗さＲａ、及び最大表面粗さＲｍａｘは、表１に示
す通りであった。これらのダミーウエハを用いて、ＣＶ
Ｄ法により半導体ウエハに窒化シリコン膜を形成する作
業を何回か繰り返し行い、ダミーウエハの表面に付着す
る窒化シリコン膜の厚さがどのくらいで、半導体ウエハ
のパーティクル汚染が発生するかを調査した。この結果
を表１に示す。As a result, the average surface roughness Ra and the maximum surface roughness Rmax of each of the obtained dummy wafers were as shown in Table 1. Using these dummy wafers, CV
The operation of forming a silicon nitride film on a semiconductor wafer by the method D was repeated several times, and the thickness of the silicon nitride film adhering to the surface of the dummy wafer was examined to determine the particle contamination of the semiconductor wafer. Table 1 shows the results.
【００２９】[0029]
【表１】 [Table 1]
【００３０】表１に示されるように、ブラスト処理によ
り、平均表面粗さＲａが１．０１〜４．４μｍとされた
実施例１〜４のダミーウエハは、ブラスト処理をせず、
平均表面粗さＲａが０．４μｍの比較例のダミーウエハ
に比べて、パーティクル汚染が発生するＣＶＤ膜の膜厚
が顕著に厚くなることがわかる。したがって、実施例１
〜４のダミーウエハでは、表面に付着したＣＶＤ膜を洗
浄して除去する作業の回数を減らすことができ、半導体
製造工程におけるＣＶＤ処理の作業性を向上させること
ができる。As shown in Table 1, the dummy wafers of Examples 1 to 4 having the average surface roughness Ra of 1.01 to 4.4 μm by the blast treatment were not subjected to the blast treatment.
It can be seen that the thickness of the CVD film in which particle contamination occurs is significantly thicker than that of the dummy wafer of the comparative example having an average surface roughness Ra of 0.4 μm. Therefore, Example 1
In the dummy wafers Nos. To 4, the number of operations for cleaning and removing the CVD film adhered to the surface can be reduced, and the workability of the CVD process in the semiconductor manufacturing process can be improved.
【００３１】[0031]
【発明の効果】以上説明したように、本発明によれば、
全体がＳｉＣからなるので、窒化シリコン、ポリシリコ
ン等のＣＶＤ膜と熱膨張係数が近く、ＣＶＤ装置からボ
ートを出し入れして、激しい温度変化を繰り返しても、
ダミーウエハ表面に付着したＣＶＤ膜が剥れにくくな
る。また、平均表面粗さＲａを１〜１０μｍとしたこと
により、上記ＣＶＤ膜がより一層剥れにくくなり、ＣＶ
Ｄ処理を繰り返してダミーウエハの表面にＣＶＤ膜がか
なり厚く形成されても、ＣＶＤ膜の剥れを防止すること
ができる。このため、ダミーウエハ表面に付着したＣＶ
Ｄ膜を除去するための洗浄作業の回数を著しく少なくす
ることが可能となり、生産性の向上及び製造コスト低減
を図ることができる。As described above, according to the present invention,
Since the whole is made of SiC, the coefficient of thermal expansion is close to that of a CVD film such as silicon nitride or polysilicon.
The CVD film adhered to the surface of the dummy wafer is hardly peeled off. In addition, by setting the average surface roughness Ra to 1 to 10 μm, the CVD film becomes more difficult to peel off, and the CV
Even if the D process is repeated and the CVD film is formed to be considerably thick on the surface of the dummy wafer, the peeling of the CVD film can be prevented. Therefore, the CV adhered to the surface of the dummy wafer
The number of cleaning operations for removing the D film can be significantly reduced, so that productivity can be improved and manufacturing cost can be reduced.
【図１】本発明のダミーウエハの製造工程を示す説明図
である。FIG. 1 is an explanatory view showing a dummy wafer manufacturing process of the present invention.
【図２】一般的なＣＶＤ装置の一例を示す正面断面図で
ある。FIG. 2 is a front sectional view showing an example of a general CVD apparatus.
１ カーボン基板 ２ａ，２ｂ，２ｃ，２ｄ ＳｉＣ基板 Ｗａ ダミーウエハ Reference Signs List 1 carbon substrate 2a, 2b, 2c, 2d SiC substrate Wa dummy wafer
Claims (10)
いられるダミーウエハにおいて、全体がＳｉＣからな
り、平均表面粗さＲａが１〜１０μｍであることを特徴
とするダミーウエハ。1. A dummy wafer used in a low-pressure CVD apparatus in a semiconductor manufacturing process, wherein the dummy wafer is entirely made of SiC and has an average surface roughness Ra of 1 to 10 μm.
である請求項１記載のダミーウエハ。2. The maximum surface roughness Rmax is 6 to 100 μm.
The dummy wafer according to claim 1, wherein
００〜４００ｍｍである請求項１又は２記載のダミーウ
エハ。3. The thickness is 0.3 to 3.0 mm and the maximum diameter is 1.
3. The dummy wafer according to claim 1, which has a thickness of from 00 to 400 mm.
す請求項１〜３のいずれか１つに記載のダミーウエハ。4. The dummy wafer according to claim 1, wherein the dummy wafer has a circular shape or a shape obtained by cutting out a part of the circular shape.
ずれか１つに記載のダミーウエハ。5. The dummy wafer according to claim 1, wherein the dummy wafer is made of β-type SiC.
１ｐｐｍである請求項１〜５のいずれか１つに記載のダ
ミーウエハ。6. An SiC having an impurity concentration of 0.5 to 0.0.
The dummy wafer according to claim 1, wherein the amount is 1 ppm.
ーボン基板表面にＣＶＤコーティングによってＳｉＣ膜
を形成する工程と、前記カーボン基板を除去してＳｉＣ
基板を作成する工程と、このＳｉＣ基板を研削加工する
工程と、前記ＳｉＣ基板を面取りする工程と、前記Ｓｉ
Ｃ基板表面をサンドブラストして、平均表面粗さＲａを
１〜１０μｍとする工程とを含むことを特徴とするダミ
ーウエハの製造法。7. A step of manufacturing a carbon substrate, a step of forming a SiC film on the surface of the carbon substrate by CVD coating, and a step of removing the carbon substrate to form a SiC film.
Forming a substrate, grinding the SiC substrate, chamfering the SiC substrate,
Sandblasting the surface of the C substrate to have an average surface roughness Ra of 1 to 10 μm.
いてサンドブラストする請求項７記載のダミーウエハの
製造法。8. The method for manufacturing a dummy wafer according to claim 7, wherein sandblasting is performed using abrasive grains made of SiC or Al 2 O 3 .
てサンドブラストする請求項７又は８記載のダミーウエ
ハの製造法。9. The method for producing a dummy wafer according to claim 7, wherein sand blasting is performed using abrasive grains having a particle size of 20 to 320 mesh.
ｋｇ／ｃｍ2 、時間２〜３０分の条件で処理する請求項
７〜９のいずれか１つに記載のダミーウエハの製造法。10. The pressure of the sand blast is 1.0 to 9.0.
preparation of dummy wafer according to any one of kg / cm 2, claim 7 to 9, under conditions of time from 2 to 30 minutes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP29941698A JP3733762B2 (en) | 1997-11-07 | 1998-10-21 | Dummy wafer and manufacturing method thereof |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9-322121 | 1997-11-07 | ||
| JP32212197 | 1997-11-07 | ||
| JP29941698A JP3733762B2 (en) | 1997-11-07 | 1998-10-21 | Dummy wafer and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH11238690A true JPH11238690A (en) | 1999-08-31 |
| JP3733762B2 JP3733762B2 (en) | 2006-01-11 |
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ID=26561918
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP29941698A Expired - Fee Related JP3733762B2 (en) | 1997-11-07 | 1998-10-21 | Dummy wafer and manufacturing method thereof |
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| Country | Link |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001203190A (en) * | 2000-01-20 | 2001-07-27 | Ibiden Co Ltd | Component for semiconductor manufacturing machine and the machine |
| JP2002252179A (en) * | 2001-02-22 | 2002-09-06 | Shin Etsu Handotai Co Ltd | Method of cleaning tube for heat treatment of semiconductor substrate, and metallic contamination getter substrate, and regenerative metal contamination getter substrate |
| WO2003071588A1 (en) * | 2002-02-22 | 2003-08-28 | Mitsui Engineering & Shipbuilding Co., Ltd. | Production method of sic monitor wafer |
-
1998
- 1998-10-21 JP JP29941698A patent/JP3733762B2/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001203190A (en) * | 2000-01-20 | 2001-07-27 | Ibiden Co Ltd | Component for semiconductor manufacturing machine and the machine |
| JP2002252179A (en) * | 2001-02-22 | 2002-09-06 | Shin Etsu Handotai Co Ltd | Method of cleaning tube for heat treatment of semiconductor substrate, and metallic contamination getter substrate, and regenerative metal contamination getter substrate |
| WO2003071588A1 (en) * | 2002-02-22 | 2003-08-28 | Mitsui Engineering & Shipbuilding Co., Ltd. | Production method of sic monitor wafer |
| US7022545B2 (en) * | 2002-02-22 | 2006-04-04 | Mitsui Engineering & Shipbuilding Co., Ltd. | Production method of SiC monitor wafer |
| KR100857751B1 (en) * | 2002-02-22 | 2008-09-09 | 미쯔이 죠센 가부시키가이샤 | PRODUCTION METHOD OF SiC MONITOR WAFER |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3733762B2 (en) | 2006-01-11 |
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