JPH11233519A - Processing method for gettering back surface of silicon wafer - Google Patents
Processing method for gettering back surface of silicon waferInfo
- Publication number
- JPH11233519A JPH11233519A JP2793998A JP2793998A JPH11233519A JP H11233519 A JPH11233519 A JP H11233519A JP 2793998 A JP2793998 A JP 2793998A JP 2793998 A JP2793998 A JP 2793998A JP H11233519 A JPH11233519 A JP H11233519A
- Authority
- JP
- Japan
- Prior art keywords
- silicon wafer
- wafer
- back surface
- gettering
- adhesive layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、研磨装置によりシ
リコンウェーハの裏面にゲッタリング処理を施す方法に
関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for performing a gettering process on a back surface of a silicon wafer by a polishing apparatus.
【０００２】[0002]
【従来の技術】シリコン単結晶インゴットから切出され
てスライスされたシリコンウェーハは、機械研磨（ラッ
ピング）、化学エッチング等の工程を経た後、ウェーハ
裏面のゲッタリング処理（外部ゲッタリング処理）が行
われる。この裏面ゲッタリング処理によりウェーハ裏面
に機械的ダメージ層或は格子歪み層が形成される。ウェ
ーハ表面の欠陥や金属不純物はこうしたウェーハ裏面の
外部ゲッタリング層に吸収される。従来、裏面ゲッタリ
ング処理は微小粒径のＳｉＯ2粉をウェーハ裏面に吹付
けるサンドブラスト法、ウェーハ裏面にリンを拡散する
リン拡散法、ウェーハ裏面にポリシリコン又は窒化ケイ
素の膜を形成する膜形成法、ウェーハ裏面にアルゴンイ
オンを注入するイオン注入法、ウェーハ裏面にレーザ光
を照射するレーザ照射法等により行われる。2. Description of the Related Art A silicon wafer cut and sliced from a silicon single crystal ingot undergoes mechanical polishing (lapping), chemical etching, and other processes, and then is subjected to a gettering process (external gettering process) on the wafer back surface. Will be By this backside gettering process, a mechanically damaged layer or a lattice distortion layer is formed on the backside of the wafer. Defects and metal impurities on the wafer surface are absorbed by the external gettering layer on the back surface of the wafer. Conventionally, sandblasting the backside gettering process blowing SiO 2 powder of fine particle size on the wafer backside, phosphorus diffusion method to diffuse phosphorus into the wafer rear surface, film formation method for forming a polysilicon or silicon nitride film on the wafer rear surface This is performed by an ion implantation method of implanting argon ions into the back surface of the wafer, a laser irradiation method of irradiating laser light to the back surface of the wafer, or the like.
【０００３】一般的なシリコンウェーハの加工プロセス
では、上記裏面ゲッタリング処理の後に、ウェーハの表
面を最終的に研磨する工程である機械的化学的研磨（メ
カノケミカルポリッシング）が行われる。この機械的化
学的研磨工程において、保持具に取付けたシリコンウェ
ーハを回転定盤上に貼付けたフェルト等の柔らかい研磨
用パッドに押付け、研磨液を滴下しながら研磨用パッド
を回転することにより、ウェーハ表面を鏡面状に研磨す
る。この研磨液には、ＳｉＯ2の微粉からなる砥粒を水
酸化ナトリウム水溶液に溶かした研磨液が用いられる。In a general silicon wafer processing process, after the backside gettering treatment, mechanical chemical polishing (mechanochemical polishing), which is a step of finally polishing the surface of the wafer, is performed. In this mechanical and chemical polishing step, the silicon wafer attached to the holder is pressed against a soft polishing pad such as a felt attached on a rotating platen, and the polishing pad is rotated while the polishing liquid is dropped, thereby rotating the wafer. The surface is polished to a mirror surface. As the polishing liquid, a polishing liquid obtained by dissolving abrasive grains composed of fine powder of SiO 2 in an aqueous sodium hydroxide solution is used.
【０００４】[0004]
【発明が解決しようとする課題】しかし、上記従来の裏
面ゲッタリング処理法には、次の問題点がある。即ち、
サンドブラスト法では塵が多く発生し、リン拡散法
では工程が複雑となり、膜形成法ではコスト高とな
り、イオン注入法では複雑で高価な装置が必要であ
り、レーザ照射法ではウェーハの大量処理が困難とな
る。また上記従来の裏面ゲッタリング処理法は後に別の
工程である機械的化学的研磨工程を必要とする。However, the conventional backside gettering method has the following problems. That is,
The sandblast method generates a lot of dust, the phosphorus diffusion method complicates the process, the film formation method increases the cost, the ion implantation method requires complicated and expensive equipment, and the laser irradiation method makes it difficult to process a large amount of wafers. Becomes In addition, the above-mentioned conventional backside gettering method requires a separate mechanical and chemical polishing step.
【０００５】本発明の目的は、ウェーハ裏面からの発塵
が少なく、簡単かつ安価に裏面ゲッタリング層を形成す
ることのできるシリコンウェーハの裏面ゲッタリング処
理方法を提供することにある。本発明の別の目的は、ウ
ェーハ表面の機械的化学的研磨工程において、裏面ゲッ
タリング処理を行って、シリコンウエーハの加工プロセ
スを簡略化できるシリコンウェーハの裏面ゲッタリング
処理方法を提供することにある。An object of the present invention is to provide a backside gettering method for a silicon wafer which can generate a backside gettering layer easily and inexpensively with little dust from the backside of the wafer. Another object of the present invention is to provide a backside gettering method for a silicon wafer, which can perform a backside gettering process in a mechanical and chemical polishing step of a wafer surface to simplify a silicon wafer processing process. .
【０００６】[0006]
【課題を解決するための手段】請求項１に係る発明は、
図１及び図２に示すように表面粗さの平均値Ｒａ1が少
なくとも０．０５μｍである研磨装置１０の上定盤１１
に所定の厚さで塗布した接着剤層１３を介して、或は図
示しないが接着剤層を介さずにシリコンウェーハ１２の
裏面を配置し、前記シリコンウェーハ１２の表面を前記
研磨装置１０の下定盤１５に固定した研磨用パッド１４
に所定の加圧力により押付けて前記シリコンウェーハ１
２の裏面にダメージ層を形成することを特徴とするシリ
コンウェーハの裏面ゲッタリング処理方法である。上定
盤１１をシリコンウェーハ１２の裏面に押付けると、上
定盤の粗面がシリコンウェーハの所定の表面粗さを有す
る裏面に直接接触する。このとき上定盤の粗面により、
ミクロ的に考察した場合、ウェーハ裏面に応力集中が起
こり、ウェーハ裏面に機械的ダメージが与えられる。こ
のダメージ層が裏面ゲッタリング層となる。接着剤層１
３が存在する場合には引続き上定盤１１及び下定盤１５
を相対回転することにより、シリコンウェーハの表面が
鏡面状に研磨される。The invention according to claim 1 is
As shown in FIGS. 1 and 2, the upper surface plate 11 of the polishing apparatus 10 having an average surface roughness Ra 1 of at least 0.05 μm.
The back surface of the silicon wafer 12 is disposed via an adhesive layer 13 applied with a predetermined thickness on the surface of the silicon wafer 12 or not through the adhesive layer (not shown), and the surface of the silicon wafer 12 is fixed to the polishing apparatus 10. Polishing pad 14 fixed to board 15
To the silicon wafer 1 with a predetermined pressure.
2. A method of gettering a back surface of a silicon wafer, wherein a damage layer is formed on the back surface of the silicon wafer. When the upper surface plate 11 is pressed against the back surface of the silicon wafer 12, the rough surface of the upper surface plate comes into direct contact with the back surface of the silicon wafer having a predetermined surface roughness. At this time, due to the rough surface of the upper platen,
When considered microscopically, stress concentration occurs on the back surface of the wafer, and mechanical damage is given to the back surface of the wafer. This damaged layer becomes the backside gettering layer. Adhesive layer 1
If 3 exists, the upper surface plate 11 and the lower surface plate 15 continue.
, The surface of the silicon wafer is polished to a mirror surface.
【０００７】請求項２に係る発明は、図２に示すように
請求項１に係る発明であって、塗布された接着剤層１３
の所定の厚さ(t)が次の式（１）に示される値である処
理方法である。０．１×（Ｒａ1＋Ｒａ2） ≦ ｔ ≦ ２
×（Ｒａ1＋Ｒａ2） ……… （１）但し、Ｒａ1は上定
盤１１の表面粗さの平均値、Ｒａ2はシリコンウェーハ
１２の裏面の表面粗さの平均値である。接着剤層１３の
厚さｔを上記式（１）で示される値にすることにより、
シリコンウェーハ１２が上定盤１１に貼付けられるとと
もに、上定盤１１の加圧時に上定盤がシリコンウェーハ
の裏面に直接接触してダメージ層がより確実に形成され
る。The invention according to claim 2 is the invention according to claim 1, as shown in FIG. 2, wherein the applied adhesive layer 13
Is a processing method in which the predetermined thickness (t) is a value shown in the following equation (1). 0.1 × (Ra 1 + Ra 2 ) ≦ t ≦ 2
× (Ra 1 + Ra 2 ) (1) where Ra 1 is the average value of the surface roughness of the upper surface plate 11, and Ra 2 is the average value of the surface roughness of the back surface of the silicon wafer 12. By setting the thickness t of the adhesive layer 13 to a value represented by the above formula (1),
The silicon wafer 12 is adhered to the upper surface plate 11, and when the upper surface plate 11 is pressed, the upper surface plate comes into direct contact with the back surface of the silicon wafer, so that a damaged layer is more reliably formed.
【０００８】請求項３に係る発明は、請求項１又は２に
係る発明であって、シリコンウェーハ１２の表面を押付
ける所定の加圧力が０．５ｋｇｆ／ｃｍ2以上であっ
て、上記シリコンウェーハ１２の破壊圧力未満である処
理方法である。接着剤層の厚さや接着剤の種類に応じて
上定盤１１の加圧力が上記範囲に調整される。The invention according to claim 3 is the invention according to claim 1 or 2, wherein the predetermined pressure for pressing the surface of the silicon wafer 12 is 0.5 kgf / cm 2 or more, and 12 is a processing method that is less than the burst pressure. The pressing force of the upper platen 11 is adjusted to the above range according to the thickness of the adhesive layer and the type of the adhesive.
【０００９】[0009]
【発明の実施の形態】本発明において、シリコンウェー
ハ１２の裏面にダメージ層を形成する研磨装置１０の上
定盤１１の表面粗さの平均値Ｒａ1は少なくとも０．０
５μｍであることが必要である。０．０５μｍに満たな
い場合には上定盤が鏡面になり、シリコンウェーハの裏
面と直接接触したときにダメージ層が十分に形成されな
い。この上定盤１１の表面粗さの平均値Ｒａ1は、上定
盤に貼付ける前のシリコンウェーハの裏面の表面粗さの
平均値Ｒａ2に近似することが好ましい。これは図２に
示す上定盤１１の表面の凹凸の凸部１８と、シリコンウ
ェーハ１２の裏面の凹凸の凸部１９が一致したときに、
凸部１８による応力集中が生じ易く、ウェーハ裏面の凸
部がより多くつぶれてダメージ層が効率良く形成される
と推察されることによる。この観点から上定盤の表面粗
さの平均値Ｒａ1の好ましい範囲は０．２μｍ〜０．８
μｍである。シリコンウェーハの裏面全体に均一なゲッ
タリング能力を付与することが要求される場合には、上
定盤の表面全体が均一な表面粗さになるように粗面化さ
れる。一方、シリコンウェーハはその後の製造工程にお
いて、ウェーハの周辺部がそれ以外の部分と比べて、製
造装置の駆動部やウェーハを収納するキャリアの溝に接
触する頻度が高いためより汚染されることから、より高
いゲッタリング能力をシリコンウェーハの周辺部に付与
することが要求される場合には、このウェーハの周辺部
に対向する上定盤の部分をウェーハの中心部に対向する
上定盤の部分と比べて粗面化の程度をより大きくする。DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present invention, the average value Ra 1 of the surface roughness of the upper surface plate 11 of the polishing apparatus 10 for forming a damaged layer on the back surface of the silicon wafer 12 is at least 0.0
It needs to be 5 μm. If the thickness is less than 0.05 μm, the upper surface plate becomes a mirror surface, and a damaged layer is not sufficiently formed when the upper surface plate comes into direct contact with the back surface of the silicon wafer. It is preferable that the average value Ra 1 of the surface roughness of the upper surface plate 11 is close to the average value Ra 2 of the surface roughness of the back surface of the silicon wafer before being attached to the upper surface plate. This is because when the projections 18 on the upper surface of the upper platen 11 shown in FIG.
This is because stress concentration due to the convex portion 18 is likely to occur, and it is assumed that the convex portion on the back surface of the wafer is more crushed and the damaged layer is efficiently formed. From this viewpoint, the preferable range of the average value Ra 1 of the surface roughness of the upper platen is 0.2 μm to 0.8 μm.
μm. When it is required to impart uniform gettering ability to the entire back surface of the silicon wafer, the entire surface of the upper platen is roughened so as to have a uniform surface roughness. On the other hand, silicon wafers are more contaminated in the subsequent manufacturing process because the peripheral part of the wafer is more frequently contacted with the drive unit of the manufacturing equipment and the groove of the carrier that stores the wafer than the other parts. If it is required to provide a higher gettering capability to the peripheral portion of the silicon wafer, the portion of the upper platen facing the peripheral portion of the wafer is replaced with the portion of the upper platen facing the central portion of the wafer. The degree of surface roughening is increased as compared with.
【００１０】上定盤１１に接着剤層１３を設けてシリコ
ンウェーハ１２を貼付けて加圧する方が操作が容易であ
り、かつ引続き研磨処理を行えることから好ましいが、
上定盤とシリコンウェーハとを接着剤層を介さずに直接
接触させてもよい。接着剤で貼付ける代りに水でウェー
ハを貼付けたり、或は静電気によりウェーハを上定盤に
貼付けてもよい。接着剤層１３を設ける場合には、接着
剤層１３の厚さはシリコンウエーハ１２の裏面を上定盤
１１に貼付けてシリコンウェーハを上定盤に保持できる
範囲内で、出来るだけ薄いことが望ましい。具体的に
は、接着剤層１３は前述した式（１）の０．１×（Ｒａ
1＋Ｒａ2）以上であって、２×（Ｒａ1＋Ｒａ2）以下の
厚さｔに塗布されることが好ましい。接着剤層１３の厚
さが０．１×（Ｒａ1＋Ｒａ2）未満であると、ウェーハ
１２の上定盤１１への接着力が十分でなく、また２×
（Ｒａ1＋Ｒａ2）を超えると、上定盤１１からシリコン
ウエーハ１２に加えられる加圧力が減殺されてダメージ
層の形成が不十分となる。この接着剤層の厚さｔは通常
の機械的化学的研磨時の接着剤層の厚さより薄い。接着
剤にはシリコンウェーハを上定盤に接着でき、研磨した
後にこのウェーハを損傷することなく上定盤から剥離で
きる接着力を有するワックスが用いられる。シリコンウ
ェーハ１２の表面を押付ける所定の加圧力は０．５ｋｇ
ｆ／ｃｍ2以上であって、シリコンウェーハ１２の破壊
圧力未満である。好ましくは１．５ｋｇｆ／ｃｍ2以上
６．０ｋｇｆ／ｃｍ2以下である。加圧力が０．５ｋｇ
ｆ／ｃｍ2に満たない場合には、ダメージ層の形成が不
十分になる。この加圧力は接着剤層の厚さ、接着剤の種
類、加圧時間、或はダメージ層形成後の機械的化学的研
磨条件等に応じて調整される。この加圧力は通常の機械
的化学的研磨時の加圧力より大きいが、接着剤層の厚さ
が薄い場合にはこの加圧力と同等でもよい。It is preferable to provide an adhesive layer 13 on the upper platen 11, attach the silicon wafer 12 and pressurize the silicon wafer 12 because the operation is easy and the polishing process can be continuously performed.
The upper platen and the silicon wafer may be brought into direct contact without using an adhesive layer. Instead of attaching with an adhesive, the wafer may be attached with water, or the wafer may be attached to the upper surface plate by static electricity. When the adhesive layer 13 is provided, the thickness of the adhesive layer 13 is desirably as thin as possible within a range where the back surface of the silicon wafer 12 can be attached to the upper surface plate 11 and the silicon wafer can be held on the upper surface plate. . Specifically, the adhesive layer 13 is formed of 0.1 × (Ra
It is preferable that the coating be applied to a thickness t of not less than 1 + Ra 2 ) and not more than 2 × (Ra 1 + Ra 2 ). If the thickness of the adhesive layer 13 is less than 0.1 × (Ra 1 + Ra 2 ), the adhesive force of the wafer 12 to the upper platen 11 is not sufficient, and
If (Ra 1 + Ra 2 ) is exceeded, the pressure applied from the upper platen 11 to the silicon wafer 12 is reduced, and the formation of a damaged layer becomes insufficient. The thickness t of the adhesive layer is smaller than the thickness of the adhesive layer during normal mechanical and chemical polishing. As the adhesive, a wax having an adhesive force capable of adhering a silicon wafer to the upper surface plate and peeling the silicon wafer from the upper surface plate without being damaged after polishing is used. The predetermined pressure for pressing the surface of the silicon wafer 12 is 0.5 kg
f / cm 2 or more and less than the breaking pressure of the silicon wafer 12. Preferably at 1.5 kgf / cm 2 or more 6.0 kgf / cm 2 or less. Pressure is 0.5kg
When it is less than f / cm 2 , formation of a damaged layer becomes insufficient. This pressing force is adjusted according to the thickness of the adhesive layer, the type of the adhesive, the pressing time, the conditions for mechanical and chemical polishing after the formation of the damaged layer, and the like. This pressure is larger than the pressure applied during normal mechanical and chemical polishing, but may be equal to the pressure when the thickness of the adhesive layer is small.
【００１１】本発明において、シリコンウェーハの裏面
ゲッタリング処理は機械的化学的研磨工程の前処理とし
て片面研磨装置で行われる。図１及び図２に示すよう
に、この研磨装置１０はシリコンウエーハ１２を保持し
て回転する小円板の上定盤１１と、大円板の下定盤１５
を備える。下定盤１５はその底面中心に接続されたシャ
フト１６により回転し、上定盤１１はその上面中心に接
続されたシャフト１７によりシャフト１６と逆方向に回
転するようになっている。この上定盤１１の下面には表
面粗さの平均値Ｒａ1が少なくとも０．０５μｍである
微小な凹凸が形成される（図２）。下定盤１５の上面に
は研磨用パッド１４が貼付けられる。研磨用パッド１４
の上部には研磨液を供給するための図示しない配管が設
けられる。この研磨装置１０を用いてシリコンウェーハ
１２の裏面ゲッタリング処理を行う場合には、上定盤１
１の下面にワックスに代表される接着剤を前述した式
（１）に示された厚さｔで均一に塗布し、この接着剤層
１３を介してシリコンウエーハ１２の裏面を貼付ける。
次いで上定盤１１を下降してシリコンウエーハ１２の表
面を研磨用パッド１４に所定の加圧力により押付ける。
このとき上定盤１１及び下定盤１５は回転させないでお
く、加圧により図２に示す上定盤１１の表面の微小な凹
凸の凸部１８と、シリコンウェーハ１２の裏面の微小な
凹凸の凸部１９が一致すると、ウェーハ裏面の凸部はつ
ぶれダメージ層が形成され、これが裏面ゲッタリング層
となる。このときシリコンウェーハの表面は研磨用パッ
ド１４に圧接するが、パッドが柔らかいため、特にダメ
ージ層は生じない。別の裏面ゲッタリング処理方法とし
て、上定盤の下面に接着剤を塗布せずに、ウェーハを水
貼り又は静電気により上定盤に保持するか、或はシリコ
ンウェーハを上定盤の直下の研磨用パッド上に配置した
後、上定盤を下降してシリコンウェーハの裏面にダメー
ジ層を形成してもよい。In the present invention, the backside gettering of the silicon wafer is performed by a single-side polishing apparatus as a pretreatment of the mechanical and chemical polishing step. As shown in FIGS. 1 and 2, the polishing apparatus 10 includes an upper platen 11 that rotates while holding a silicon wafer 12 and a lower platen 15 that rotates a large disk.
Is provided. The lower surface plate 15 is rotated by a shaft 16 connected to the center of the bottom surface, and the upper surface plate 11 is rotated in the opposite direction to the shaft 16 by a shaft 17 connected to the center of the upper surface. Average Ra 1 of the surface roughness on the bottom surface of the upper platen 11 minute unevenness is at least 0.05μm is formed (FIG. 2). A polishing pad 14 is attached to the upper surface of the lower platen 15. Polishing pad 14
A pipe (not shown) for supplying the polishing liquid is provided at the upper part of. When performing the back gettering process on the silicon wafer 12 using the polishing apparatus 10, the upper platen 1
An adhesive typified by wax is uniformly applied to the lower surface of the silicon wafer 12 with the thickness t shown in the above-described formula (1), and the back surface of the silicon wafer 12 is attached via the adhesive layer 13.
Next, the upper platen 11 is lowered to press the surface of the silicon wafer 12 against the polishing pad 14 with a predetermined pressure.
At this time, the upper surface plate 11 and the lower surface plate 15 are not rotated, and the convex portions 18 of the fine irregularities on the surface of the upper surface plate 11 shown in FIG. When the portions 19 coincide with each other, a crush damage layer is formed on the convex portion on the back surface of the wafer, and this becomes a back gettering layer. At this time, the surface of the silicon wafer comes into pressure contact with the polishing pad 14, but since the pad is soft, no damage layer is particularly formed. Another backside gettering treatment method is to apply the adhesive to the lower surface of the upper surface plate without applying adhesive, hold the wafer on the upper surface plate by water adhesion or static electricity, or polish the silicon wafer directly under the upper surface plate. After arranging them on the pads, the upper platen may be lowered to form a damaged layer on the back surface of the silicon wafer.
【００１２】このようにしてシリコンウェーハ１２の裏
面ゲッタリング処理を終了した後に引続いてシリコンウ
エーハ１２を機械的化学的研磨する場合には、所定の厚
さの接着剤層１３を上定盤１１とシリコンウェーハ１２
の間に設けた状態で、シリコンウエーハ１２の表面を研
磨用パッド１４に押付けた加圧力を通常の機械的化学的
研磨時に採用される圧力程度まで減少させ、図示しない
研磨液を研磨用パッド１４上に供給しながら上定盤１１
と下定盤１５とを互いに反対方向に回転させて、シリコ
ンウェーハ１２の表面を鏡面状に研磨する。この場合、
接着剤層の厚さ又は加圧力の程度に応じてこの研磨中に
もウェーハ裏面にダメージ層が形成される。またシリコ
ンウェーハ１２の裏面ゲッタリング処理を終了した後に
シリコンウエーハ１２を機械的化学的研磨する別の方法
として、シリコンウエーハ１２を上定盤１１から剥がし
た後、再び又は新たに接着剤を通常の機械的化学的研磨
を行うときの厚さで上定盤１１の表面に塗布してシリコ
ンウエーハ１２の裏面に貼付けて通常の機械的化学的研
磨を実施してもよい。この場合には研磨中にウェーハ裏
面にはダメージ層は形成されない。When the silicon wafer 12 is mechanically and chemically polished after the back gettering process of the silicon wafer 12 is completed, the adhesive layer 13 having a predetermined thickness is formed on the upper surface plate 11. And silicon wafer 12
In this state, the pressing force of pressing the surface of the silicon wafer 12 against the polishing pad 14 is reduced to about the pressure employed during normal mechanical and chemical polishing, and a polishing liquid (not shown) is applied to the polishing pad 14. Upper surface plate 11 while supplying the upper surface
The lower surface plate 15 and the lower platen 15 are rotated in opposite directions to polish the surface of the silicon wafer 12 into a mirror surface. in this case,
A damaged layer is formed on the back surface of the wafer during this polishing depending on the thickness of the adhesive layer or the degree of the pressing force. Another method of mechanically and chemically polishing the silicon wafer 12 after the back gettering process of the silicon wafer 12 is completed is to peel off the silicon wafer 12 from the upper platen 11 and then apply an adhesive again or newly. It may be applied to the surface of the upper platen 11 with the thickness at which the mechanical and chemical polishing is performed, and may be adhered to the back surface of the silicon wafer 12 to perform ordinary mechanical and chemical polishing. In this case, no damage layer is formed on the back surface of the wafer during polishing.
【００１３】[0013]
【実施例】次に本発明の具体的態様を示すために、本発
明の実施例を比較例とともに説明する。 ＜実施例１＞図１に示した研磨装置１０を使用して、１
０枚のシリコンウェーハの裏面にダメージ層を形成し
た。即ち、表面粗さの平均値Ｒａ1が０．８μｍである
上定盤の表面に接着剤であるワックスを均一に塗布して
厚さ１．０μｍの接着剤層を形成した。この接着剤層を
介して一枚ずつシリコンウェーハの裏面を上定盤の表面
に貼付けた。１０枚のウェーハ裏面の表面粗さの平均値
Ｒａ2は全て０．２μｍであった。上定盤及び下定盤を
回転させることなく、各シリコンウェーハの表面を研磨
用パッドに４ｋｇｆ／ｃｍ2の加圧力により３０秒間押
付けた。 ＜比較例１＞実施例１と同種の１０枚のシリコンウェー
ハの裏面に実施例１と同一の条件でダメージ層を形成し
た。これらのシリコンウェーハの裏面に形成されたダメ
ージ層をＨＮＯ3（６１％）とＨＦ（５０％）を１０
０：３の割合で混合した混酸でエッチングして除去し
た。EXAMPLES Next, examples of the present invention will be described together with comparative examples in order to show specific embodiments of the present invention. <Embodiment 1> Using the polishing apparatus 10 shown in FIG.
A damaged layer was formed on the back surface of the zero silicon wafer. That is, wax as an adhesive was uniformly applied to the surface of the upper platen having an average surface roughness Ra 1 of 0.8 μm to form an adhesive layer having a thickness of 1.0 μm. The back surface of each silicon wafer was adhered to the surface of the upper platen one by one via this adhesive layer. The average value Ra 2 of the surface roughness of the back surfaces of all ten wafers was 0.2 μm. Without rotating the upper platen and the lower platen, the surface of each silicon wafer was pressed against the polishing pad with a pressing force of 4 kgf / cm 2 for 30 seconds. Comparative Example 1 A damaged layer was formed on the back surface of ten silicon wafers of the same type as in Example 1 under the same conditions as in Example 1. HNO 3 (61%) and HF (50%) were reduced to 10
It was removed by etching with a mixed acid mixed at a ratio of 0: 3.
【００１４】＜比較評価＞実施例１のダメージ層を形成
した１０枚のシリコンウェーハと比較例１の混酸でエッ
チングした１０枚のシリコンウェーハの各表面を約１×
１０13ａｔｏｍｓ／ｃｍ2の濃度のＣｕで強制的に汚染
した。この汚染したシリコンウエーハを大気雰囲気中１
０００℃で１時間熱処理した後、更に４００℃で１時間
の熱処理を行った。全反射蛍光Ｘ線法に基づいて実施例
１及び比較例１のそれぞれのシリコンウエーハ表面のＣ
ｕ濃度を測定した。実施例１及び比較例１のウェーハ表
面のＣｕ濃度を図３に示す。図３から明らかなように、
裏面にダメージ層を与えた実施例１のシリコンウエーハ
の表面は、裏面のダメージ層を除去した比較例１のシリ
コンウエーハの表面よりもＣｕ濃度が低くなっていた。
このことから、実施例１の処理で形成されたダメージ層
でウェーハ裏面にゲッタリング能力が付与され、このダ
メージ層により汚染物のＣｕが取込まれたことが分っ
た。<Comparative Evaluation> Each surface of the ten silicon wafers on which the damaged layer was formed in Example 1 and the ten silicon wafers etched with the mixed acid of Comparative Example 1 were approximately 1 ×.
It was forcibly contaminated with Cu at a concentration of 10 13 atoms / cm 2 . This contaminated silicon wafer was placed in air atmosphere 1
After heat treatment at 000 ° C. for 1 hour, heat treatment was further performed at 400 ° C. for 1 hour. Based on the total reflection X-ray fluorescence method, the C of the silicon wafer surface of each of Example 1 and Comparative Example 1 was
The u concentration was measured. FIG. 3 shows the Cu concentration on the wafer surface in Example 1 and Comparative Example 1. As is clear from FIG.
The surface of the silicon wafer of Example 1 in which the damage layer was provided on the back surface had a lower Cu concentration than the surface of the silicon wafer of Comparative Example 1 in which the damage layer on the back surface was removed.
From this, it was found that gettering ability was imparted to the back surface of the wafer by the damaged layer formed in the processing of Example 1, and that the contaminant Cu was taken in by the damaged layer.
【００１５】[0015]
【発明の効果】以上述べたように、本発明のシリコンウ
ェーハの裏面ゲッタリング処理方法によれば、所定の表
面粗さを有する研磨装置の上定盤に所定の厚さで塗布し
た接着剤層を介して、或は接着剤層を介さずにシリコン
ウェーハの裏面を配置し、シリコンウェーハの表面を研
磨装置の研磨用パッドに所定の加圧力により押付けてシ
リコンウェーハの裏面にダメージ層を形成するようにし
たから、従来のサンドブラスト法ようにウェーハ裏面か
ら塵が発生する恐れはなく、簡単にかつ安価に裏面ゲッ
タリング層を形成できる。またウェーハ表面の機械的化
学的研磨工程の際に、従来別に行われていた裏面ゲッタ
リング処理を同時に実施できるため、シリコンウエーハ
の加工プロセスを簡略化できる利点もある。As described above, according to the method for gettering a back surface of a silicon wafer of the present invention, the adhesive layer applied to the upper surface plate of the polishing apparatus having the predetermined surface roughness with a predetermined thickness. The back surface of the silicon wafer is disposed via the or without the adhesive layer, and the front surface of the silicon wafer is pressed against the polishing pad of the polishing apparatus with a predetermined pressure to form a damaged layer on the back surface of the silicon wafer. Thus, unlike the conventional sandblasting method, there is no possibility that dust will be generated from the back surface of the wafer, and the back surface gettering layer can be formed easily and inexpensively. In addition, since the backside gettering process, which has been conventionally performed separately, can be simultaneously performed at the time of the mechanical and chemical polishing step of the wafer surface, there is an advantage that the processing process of the silicon wafer can be simplified.
【図１】本発明の処理方法に用いる研磨装置の構成図。FIG. 1 is a configuration diagram of a polishing apparatus used in a processing method of the present invention.
【図２】上定盤で加圧する前の図１の構成を拡大して模
式的に示す図。FIG. 2 is an enlarged view schematically showing the configuration of FIG. 1 before pressurization by an upper platen.
【図３】全反射蛍光Ｘ線法に基づいて実施例１及び比較
例１のシリコンウエーハ表面のＣｕ濃度を測定した結果
を示す図。FIG. 3 is a view showing the results of measuring the Cu concentration on the silicon wafer surface of Example 1 and Comparative Example 1 based on the total reflection X-ray fluorescence method.
１０ 研磨装置 １１ 上定盤 １２ シリコンウェーハ １３ 接着剤層 １４ 研磨用パッド １５ 下定盤 DESCRIPTION OF SYMBOLS 10 Polishing apparatus 11 Upper surface plate 12 Silicon wafer 13 Adhesive layer 14 Polishing pad 15 Lower surface plate
───────────────────────────────────────────────────── フロントページの続き (72)発明者 前田 剛 東京都千代田区大手町１丁目５番１号 三 菱マテリアルシリコン株式会社内 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Tsuyoshi Maeda Mitsubishi Materials Silicon Co., Ltd., 1-1-1, Otemachi, Chiyoda-ku, Tokyo
Claims (3)
０．０５μｍである研磨装置(10)の上定盤(11)に所定の
厚さで塗布した接着剤層(13)を介して或は接着剤層を介
さずにシリコンウェーハ(12)の裏面を配置し、前記シリ
コンウェーハ(12)の表面を前記研磨装置(10)の下定盤(1
5)に固定した研磨用パッド(14)に所定の加圧力により押
付けて前記シリコンウェーハ(12)の裏面にダメージ層を
形成することを特徴とするシリコンウェーハの裏面ゲッ
タリング処理方法。An adhesive layer (13) applied to an upper surface plate (11) of a polishing device (10) having an average value (Ra 1 ) of at least 0.05 μm at a predetermined thickness. Alternatively, the back surface of the silicon wafer (12) is arranged without interposing the adhesive layer, and the surface of the silicon wafer (12) is placed on the lower platen (1) of the polishing device (10).
A method for gettering a back surface of a silicon wafer, wherein a damage layer is formed on the back surface of the silicon wafer (12) by pressing the polishing pad (14) fixed to (5) with a predetermined pressure.
(t)が次の式（１）に示される値である請求項１記載の
処理方法。 ０．１×（Ｒａ1＋Ｒａ2） ≦ ｔ ≦ ２×（Ｒａ1＋Ｒａ2） ……… （１） 但し、Ｒａ1は上定盤(11)の表面粗さの平均値、Ｒａ2は
シリコンウェーハ(12)の裏面の表面粗さの平均値であ
る。2. A predetermined thickness of the applied adhesive layer (13)
The processing method according to claim 1, wherein (t) is a value represented by the following equation (1). 0.1 × (Ra 1 + Ra 2 ) ≦ t ≦ 2 × (Ra 1 + Ra 2 ) (1) where Ra 1 is the average value of the surface roughness of the upper surface plate (11), and Ra 2 is silicon. This is the average value of the surface roughness of the back surface of the wafer (12).
所定の加圧力が０．５ｋｇｆ／ｃｍ2以上であって、前
記シリコンウェーハ(12)の破壊圧力未満である請求項１
又は２記載の処理方法。3. A predetermined pressure for pressing the surface of the silicon wafer (12) is 0.5 kgf / cm 2 or more and less than a breaking pressure of the silicon wafer (12).
Or the processing method according to 2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP02793998A JP3582569B2 (en) | 1998-02-10 | 1998-02-10 | Silicon wafer backside gettering method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP02793998A JP3582569B2 (en) | 1998-02-10 | 1998-02-10 | Silicon wafer backside gettering method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH11233519A true JPH11233519A (en) | 1999-08-27 |
| JP3582569B2 JP3582569B2 (en) | 2004-10-27 |
Family
ID=12234879
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP02793998A Expired - Fee Related JP3582569B2 (en) | 1998-02-10 | 1998-02-10 | Silicon wafer backside gettering method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3582569B2 (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009206431A (en) * | 2008-02-29 | 2009-09-10 | Sumco Corp | Silicon substrate and manufacturing method thereof |
| WO2010140621A1 (en) * | 2009-06-05 | 2010-12-09 | 浜松ホトニクス株式会社 | Semiconductor light detecting element and manufacturing method therefor |
| US8629485B2 (en) | 2009-02-24 | 2014-01-14 | Hamamatsu Photonics K.K. | Semiconductor photodetection element |
| US8742528B2 (en) | 2009-02-24 | 2014-06-03 | Hamamatsu Photonics K.K. | Photodiode and photodiode array |
| US8916945B2 (en) | 2009-02-24 | 2014-12-23 | Hamamatsu Photonics K.K. | Semiconductor light-detecting element |
| US9190551B2 (en) | 2009-02-24 | 2015-11-17 | Hamamatsu Photonics K.K. | Photodiode and photodiode array |
| CN115841973A (en) * | 2023-02-17 | 2023-03-24 | 成都莱普科技股份有限公司 | Light blocking ring for wafer laser annealing and preparation method thereof |
-
1998
- 1998-02-10 JP JP02793998A patent/JP3582569B2/en not_active Expired - Fee Related
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009206431A (en) * | 2008-02-29 | 2009-09-10 | Sumco Corp | Silicon substrate and manufacturing method thereof |
| US8994135B2 (en) | 2009-02-24 | 2015-03-31 | Hamamatsu Photonics K.K. | Photodiode and photodiode array |
| US8629485B2 (en) | 2009-02-24 | 2014-01-14 | Hamamatsu Photonics K.K. | Semiconductor photodetection element |
| US8742528B2 (en) | 2009-02-24 | 2014-06-03 | Hamamatsu Photonics K.K. | Photodiode and photodiode array |
| US8916945B2 (en) | 2009-02-24 | 2014-12-23 | Hamamatsu Photonics K.K. | Semiconductor light-detecting element |
| US9190551B2 (en) | 2009-02-24 | 2015-11-17 | Hamamatsu Photonics K.K. | Photodiode and photodiode array |
| US9419159B2 (en) | 2009-02-24 | 2016-08-16 | Hamamatsu Photonics K.K. | Semiconductor light-detecting element |
| US9614109B2 (en) | 2009-02-24 | 2017-04-04 | Hamamatsu Photonics K.K. | Photodiode and photodiode array |
| US9972729B2 (en) | 2009-02-24 | 2018-05-15 | Hamamatsu Photonics K.K. | Photodiode and photodiode array |
| JP2010283223A (en) * | 2009-06-05 | 2010-12-16 | Hamamatsu Photonics Kk | Semiconductor optical detecting element and method of manufacturing semiconductor optical detecting element |
| WO2010140621A1 (en) * | 2009-06-05 | 2010-12-09 | 浜松ホトニクス株式会社 | Semiconductor light detecting element and manufacturing method therefor |
| CN115841973A (en) * | 2023-02-17 | 2023-03-24 | 成都莱普科技股份有限公司 | Light blocking ring for wafer laser annealing and preparation method thereof |
| CN115841973B (en) * | 2023-02-17 | 2023-04-28 | 成都莱普科技股份有限公司 | Light blocking ring for wafer laser annealing and preparation method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3582569B2 (en) | 2004-10-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI364814B (en) | Edge removal of silicon-on-insulator transfer wafer | |
| JP4860113B2 (en) | Manufacturing method of semiconductor integrated circuit device | |
| TW494487B (en) | Semiconductor wafer and method for fabrication thereof | |
| JPH06104229A (en) | Manufacture of wafer | |
| WO2003098695A1 (en) | Laminated substrate, method of manufacturing the substrate, and wafer outer periphery pressing jigs used for the method | |
| JPH11219873A (en) | Improvement of single crystal silicon wafer in mechanical resistance | |
| JP5331777B2 (en) | Semiconductor wafer polishing method | |
| JPH11233519A (en) | Processing method for gettering back surface of silicon wafer | |
| JP2004506314A (en) | Method of treating semiconductor wafer using double-side polishing method | |
| JPH09171980A (en) | Manufacture of semiconductor device | |
| JP2010239161A (en) | Method of fabricating semiconductor integrated circuit device | |
| US6248001B1 (en) | Semiconductor die de-processing using a die holder and chemical mechanical polishing | |
| JP2007180252A (en) | Semiconductor device manufacturing method | |
| JPH1158232A (en) | Dressing tool and manufacture thereof | |
| JP2007149884A (en) | Semiconductor wafer polishing method | |
| JP2002141311A (en) | Wafer polishing method and wafer washing method | |
| TW201009915A (en) | A method of dicing wafers to give high die strength | |
| JP2004072025A (en) | Method and apparatus for polishing wafer | |
| WO2001096065A1 (en) | Method for polishing work | |
| JP2950457B2 (en) | Semiconductor wafer polishing equipment | |
| JP2004090119A (en) | Single-side polishing device of plate-like body, back pad used for this device and its molding method | |
| JP2671857B2 (en) | Wafer polishing equipment | |
| JP2004090120A (en) | Pressure surface table used for single-side polishing device | |
| JP2004230486A (en) | Method for polishing single crystal substrate | |
| JPH10308368A (en) | Manufacture of semiconductor wafer |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20031224 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20040220 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20040407 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20040525 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20040707 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20040720 |
|
| R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20070806 Year of fee payment: 3 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080806 Year of fee payment: 4 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20080806 Year of fee payment: 4 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090806 Year of fee payment: 5 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20090806 Year of fee payment: 5 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100806 Year of fee payment: 6 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110806 Year of fee payment: 7 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110806 Year of fee payment: 7 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120806 Year of fee payment: 8 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130806 Year of fee payment: 9 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| LAPS | Cancellation because of no payment of annual fees |