JPH11233462A - Both surfaces polishing method of semiconductor wafer - Google Patents

Both surfaces polishing method of semiconductor wafer

Info

Publication number
JPH11233462A
JPH11233462A JP2701398A JP2701398A JPH11233462A JP H11233462 A JPH11233462 A JP H11233462A JP 2701398 A JP2701398 A JP 2701398A JP 2701398 A JP2701398 A JP 2701398A JP H11233462 A JPH11233462 A JP H11233462A
Authority
JP
Japan
Prior art keywords
polishing
wafer
polishing cloth
cloth
surface plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2701398A
Other languages
Japanese (ja)
Inventor
Tsutomu Sato
勉 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Naoetsu Electronics Co Ltd
Original Assignee
Naoetsu Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Naoetsu Electronics Co Ltd filed Critical Naoetsu Electronics Co Ltd
Priority to JP2701398A priority Critical patent/JPH11233462A/en
Publication of JPH11233462A publication Critical patent/JPH11233462A/en
Pending legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00Lapping machines or devices; Accessories
    • B24B37/11Lapping tools
    • B24B37/20Lapping pads for working plane surfaces
    • B24B37/26Lapping pads for working plane surfaces characterised by the shape of the lapping pad surface, e.g. grooved

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

PROBLEM TO BE SOLVED: To leave machined strain on a sand blast treatment surface when both surfaces polishing method excellent in precision is adopted. SOLUTION: Polishing cloths 1, 2 which are different in slurry holding force and in polishing speed are used. The cloth 1 whose polishing speed is extremely low is used facing a surface W1 having a working strain layer of a wafer W, cloth 2 whose polishing speed is high is used facing a polishing surface W2 on the opposite side, and both surfaces are simultaneously polished. As a result, polishing amount of the surface W1 having the machined strain layer of the wafer W is made extremely little as compared with that of the polishing surface W2 on the opposite side.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、片面を鏡面仕上げ
し、その面にパターンが形成されてIC用素子を製造す
るシリコン半導体基板で、そのシリコン半導体基板を製
造する際の鏡面研磨方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for polishing a silicon semiconductor substrate on which one surface is mirror-finished and a pattern is formed on the surface to manufacture an IC element, and a mirror polishing method for manufacturing the silicon semiconductor substrate.

【0002】[0002]

【従来の技術】従来、少なくとも片面が鏡面仕上げされ
ていることの必要なシリコン半導体基板を製造する時の
研磨方法は、スラリーを供給しながらプレートに貼り付
けられたウエハを研磨布に押圧して片面を鏡面に仕上げ
るか、又はウエハキャリアに保持されたウエハを研磨布
の貼り付けられた上下一対の金属定盤間で挟圧し、定盤
に貼り付けられた研磨布に対して相対的に移動させるこ
とで両面を同時に、均等な研磨量で鏡面に仕上げてい
た。上記2方法による基板は、その後、片面のみ鏡面で
あるシリコン半導体基板はその鏡面側に、両面が鏡面で
あるシリコン半導体基板はその内の一方の面に、パター
ンが形成される。両研磨方法の相違を重要な特性の一つ
である平坦度に関していえば、両面研磨方法は片面研磨
方法のようなウエハをプレートに貼り付ける必要はな
く、その際のプレートの歪み、厚さ誤差、接着剤の塗布
むら等のウエハをプレートに貼り付ける際のバラツキの
影響を受けることもないため平坦度は良好であり採用さ
れている。一方、前記研磨布は、その実用に供されてい
るものとして実に多種多様であるが、一般的に製造方法
とその構造により、不織布を基材にしてその表面にウレ
タン樹脂を発泡させた「スエード型」と、ポリエステル
不織布にウレタン樹脂を含浸させた「不織布型」と、
「ウレタン発泡型」の3種類に大別されるとされ、これ
ら各種型の選定は、目的に応じ経験上使い分けられてい
る。
2. Description of the Related Art Conventionally, a polishing method for producing a silicon semiconductor substrate that requires at least one surface to be mirror-finished is performed by pressing a wafer attached to a plate against a polishing cloth while supplying a slurry. One side is mirror-finished, or the wafer held by the wafer carrier is pressed between a pair of upper and lower metal platens on which the polishing cloth is attached, and is moved relatively to the polishing cloth attached to the surface plate. By doing so, both surfaces were simultaneously mirror-finished with an equal amount of polishing. After that, in the substrate according to the above two methods, a pattern is formed on the mirror surface side of the silicon semiconductor substrate having only one mirror surface, and on one surface of the silicon semiconductor substrate having both mirror surfaces. Speaking of the difference between the two polishing methods in terms of flatness, which is one of the important characteristics, the double-side polishing method does not require the wafer to be attached to the plate as in the single-side polishing method. The flatness is good because it is not affected by variations in sticking the wafer to the plate, such as uneven application of the adhesive. On the other hand, the polishing cloth is indeed a wide variety of practically used ones. In general, depending on the manufacturing method and its structure, a non-woven fabric is used as a base material and a urethane resin is foamed on the surface thereof. Mold) and a `` nonwoven fabric mold '' in which a polyester nonwoven fabric is impregnated with urethane resin.
It is said that the urethane foam type is roughly classified into three types, and these various types are selected depending on the purpose depending on the purpose.

【0003】[0003]

【発明が解決しようとする課題】しかし乍ら、このよう
な従来の両面研磨方法では、平坦度は良好であるが以下
のような課題がある。シリコン半導体基板は、工程的に
は研磨加工前で、パターンが形成される面の反対側面を
ゲッタリング効果(汚染物質の吸収、結晶欠陥の吸収)
を目的としてサンドブラスト処理による有意な加工歪み
の層を形成するのが一般的である。片面研磨方式は、も
ともとサンドブラスト処理された面と反対側の面が研磨
仕上げされてサンドブラスト処理面に何ら影響を受ける
ことは無いのに対し、両面研磨方式は、ウエハ両面より
同速度で研磨されるので、通常研磨代というものは、そ
こに到るまでの工程の加工のバラツキを考慮して10μm
前後が必要であるのに、サンドラスト処理により形成さ
れる有意の加工歪み層は数μm以下の僅少であることを
考えると、加工歪みは完全又は部分的に消失してしまう
ということになる。この課題は本質的なものであり、対
策として両面側より研磨が進行し、消失する分を見込み
深く加工歪みを形成しておくことも試行されるが、深い
サンドブラスト処理は、それ以降の工程においてウエハ
表面が剥離等し傷等の発生の原因、又は洗浄中に鏡面側
に付着する等の問題が再提起される。また、鏡面仕上げ
終了後にサンドブラスト加工することも思量されるが、
その時には加工済みの鏡面側がウエハの保持面となって
傷が発生して現状不可能に近いものがあり、その課題に
対してはその対応が非常に困難なものがあった。別の課
題としては、操業上の現実的なものがあり、両面研磨方
法は、研磨終了後に上定盤を引き上げて、ウエハキャリ
アからウエハを手動であれ、自動であれウエハを取り出
さなければならない。この取り出しの時に、本来、下定
盤側の研磨布面上にあるべきウエハが上定盤側の研磨布
に貼り付いたまま上定盤と共に上がってしまい、その取
り出し作業に難儀するだけでなく、取り出し作業中にウ
エハを落下させて破損してしまうという厄介な問題があ
る。
However, such a conventional double-side polishing method has good flatness but has the following problems. The silicon semiconductor substrate has a gettering effect (absorption of contaminants and absorption of crystal defects) on the side opposite to the surface on which the pattern is formed before polishing in the process.
It is common to form a layer with significant processing strain by sandblasting for the purpose of. The single-side polishing method has no effect on the sandblasted surface since the surface opposite to the surface originally sandblasted is polished and finished, whereas the double-side polishing method is polished at the same speed from both sides of the wafer Therefore, the polishing allowance is usually 10 μm in consideration of the variation in the processing of the process up to that point.
Considering that the significant work strain layer formed by the sand blasting process is very small of several μm or less, although the front and back are necessary, the work strain is completely or partially eliminated. This problem is essential, and as a countermeasure, it is attempted to form a processing strain deeply with polishing progressing from both sides and disappearing, but deep sandblasting is performed in subsequent steps. Problems such as the occurrence of scratches and the like due to peeling of the wafer surface, and adhesion to the mirror surface during cleaning are raised again. It is also conceivable to perform sandblasting after finishing the mirror finish,
At that time, the processed mirror surface becomes the holding surface of the wafer, and there are some scratches which are almost impossible at present, and there are some which are very difficult to cope with the problem. Another problem is that it is practical in operation. In the double-side polishing method, the upper platen must be pulled up after polishing is completed, and the wafer must be taken out of the wafer carrier manually or automatically. At the time of this removal, the wafer that should be on the polishing cloth surface on the lower platen side rises together with the upper platen while sticking to the polishing cloth on the upper platen side, and not only is it difficult to take out the work, There is a troublesome problem that the wafer is dropped and damaged during the unloading operation.

【0004】本発明のうち請求項1記載の発明は、精度
的に優位な両面研磨方法を採用するにあたり、サンドブ
ラスト処理面の加工歪みを残存させることを目的とした
ものである。請求項2記載の発明は、請求項1に記載の
発明の目的に加えて、上定盤側の研磨布にウエハが貼り
付くのを確実に防止することを目的としたものである。
An object of the present invention is to leave a processing distortion on a sandblasted surface when employing a double-side polishing method superior in accuracy. A second object of the present invention is to prevent the wafer from being stuck to the polishing pad on the upper platen side, in addition to the object of the first embodiment.

【0005】[0005]

【課題を解決するための手段】前述した目的を達成する
ために、本発明のうち請求項1記載の発明は、研磨布が
夫々貼り付けられた上下一対の定盤間にシリコン半導体
ウエハを挟圧し、スラリーを供給しながら相対的に移動
させて両面同時に研磨する方法において、前記定盤に貼
り付ける研磨布素材の材質及び形状を、同時又は各々独
立して上下定盤で異なるものとし、その研磨布に当接す
るウエハ両面側からの研磨速度(その時間当たりの研磨
量)を相違させて研磨することを特徴とするものであ
る。ここで、研磨布素材の材質、形状の相違とは、一般
的に研磨布は異なる材質、形状のものを層状に構成し製
造されるが、ウエハに直接接する表面層の材質、形状に
注目した相違である。請求項2記載の発明は、請求項1
記載の発明の構成に、前記定盤に貼り付けられる研磨布
素材の形状の相違において、上定盤側の研磨布表面に最
終的に施されたスラリー流路用溝の総面積が、下定盤側
のそれより大きくする構成を加えたことを特徴とする。
In order to achieve the above-mentioned object, according to the first aspect of the present invention, a silicon semiconductor wafer is sandwiched between a pair of upper and lower platens to which polishing cloths are respectively attached. Pressing, in the method of simultaneously moving both sides while supplying the slurry, and polishing simultaneously on both surfaces, the material and shape of the polishing cloth material to be attached to the surface plate are different at the same time or independently of the upper and lower surface plates, It is characterized in that polishing is performed with different polishing speeds (polishing amounts per time) from both sides of the wafer in contact with the polishing cloth. Here, the difference in the material and shape of the polishing cloth material means that, in general, the polishing cloth is manufactured by forming different materials and shapes in a layered form, but attention is paid to the material and shape of the surface layer directly in contact with the wafer. It is a difference. The invention described in claim 2 is claim 1
In the configuration of the invention described in the above, in the difference in the shape of the polishing cloth material attached to the surface plate, the total area of the slurry flow channel finally applied to the polishing cloth surface on the upper surface plate side, the lower surface plate It is characterized by adding a configuration that is larger than that of the side.

【0006】[0006]

【作用】研磨布として何れの型のクロスを選定しても、
その使用時間が増大することにより、目詰まりや目潰れ
現象が発生し、その結果、スラリーの保持力が低下して
研磨速度を低下させてしまう。この現象に留意し、請求
項1の発明は、スラリー保持力が当初より相違して研磨
速度に差のある研磨布を使用し、ウエハの加工歪み層を
有する面に対しては、研磨速度の極端に小さい研磨布を
使用すると共に、その反対側の研磨面に対しては、研磨
速度の大きい研磨布を使用して両面同時に研磨すること
により、ウエハの加工歪み層を有する面が反対側の研磨
面に比べ研磨量が極めて僅少となるものである。上下の
研磨布の材質、形状を共に相違させる実際上の対応とし
ては、例えば上定盤側の研磨布が「ウレタン発泡型」で
あるのに対し、下定盤側の研磨布は「不織布型」を採
用、又は材質的に同じウレタン発泡型といわれるもので
あっても上定盤側には発泡の大きさ、数とも下側に比べ
て極端に相違する、即ち形状の相違するものを使用する
等がある。これら相違は研磨速度の極端な相違になるた
め、ほんのわずかに加工歪みを深く形成するだけで従来
に相当する加工歪みを残存させることができる。尚、ウ
エハの研磨時の上面、下面で研磨量を変化させる方法と
しては、研磨布とウエハ上、下面との相対速度を変化さ
せて行うことも試行されるが、その変化に見合う力がウ
エハキャリアに働き、薄板であるウエハキャリアの強度
的な問題等で限界があるので大きな変化を持たすことは
できない。請求項2の発明は、請求項1記載の構成に対
して、前記定盤に貼り付けられる研磨布素材の形状の相
違において、上定盤側の研磨布表面に最終的に施された
スラリー流路用溝の総面積が、下定盤側のそれより大き
くする構成を追加したので、上定盤側の研磨布の方が下
定盤側の研磨布に比べ、スラリー流路用溝の面積が大き
い分だけ、より大気圧と通じて吸着力が減少する。
[Action] Regardless of the type of cloth selected as the polishing cloth,
As the usage time increases, clogging and crushing phenomenon occur, and as a result, the holding power of the slurry decreases and the polishing rate decreases. In consideration of this phenomenon, the invention of claim 1 uses a polishing cloth having a different polishing rate because the slurry holding force is different from the beginning, and the polishing rate of the wafer having a processing strain layer is reduced. By using an extremely small polishing cloth and simultaneously polishing both sides using a polishing cloth with a high polishing rate on the opposite polishing surface, the surface of the wafer having the work strained layer is on the opposite side. The amount of polishing is extremely small as compared with the polished surface. As a practical correspondence to make both the material and the shape of the upper and lower polishing cloths different, for example, the polishing cloth on the upper platen side is “urethane foam type”, while the polishing cloth on the lower platen side is “nonwoven fabric type”. Adopting or using the same urethane foam type as the material even if the size and number of foams on the upper platen side are extremely different from those on the lower side, that is, those with different shapes Etc. Since these differences result in extreme differences in the polishing rate, the processing strain equivalent to the conventional one can be left by forming the processing strain only slightly deeply. In addition, as a method of changing the polishing amount on the upper surface and the lower surface when polishing the wafer, it is attempted to change the relative speed between the polishing cloth and the upper and lower surfaces of the wafer. Since it acts on the carrier and is limited by the strength problem of the thin wafer carrier, it cannot have a great change. According to a second aspect of the present invention, in the structure of the first aspect, the difference in the shape of the polishing cloth material stuck on the surface plate causes the slurry flow finally applied to the surface of the polishing cloth on the upper surface plate. Since the total area of the groove for the road is larger than that of the lower platen, the area of the slurry passage groove is larger in the upper platen than in the lower platen. The adsorbing power is reduced by the amount corresponding to the atmospheric pressure.

【0007】[0007]

【発明の実施の形態】以下、本発明の各実施例を図面に
基づいて説明する。最初に図1を用いて、シリコン半導
体ウエハを両面研磨する装置の概略を説明する。この装
置は、研磨布が貼り付けられた上下一対の金属製定盤U
T,LTと、ウエハWを保持する複数のキャリアCと、
そのキャリヤCを上下定盤UT,LT間で遊星運動をさ
せるためのサンギアS及びインターナルギアIよりなる
シリコン半導体ウエハの両面研磨機である。構造的には
シリコン半導体ウエハのラッビング加工装置と同様なも
のである。通常、スラリーは、スラリー導入管P及び導
入孔Hを通して、上定盤UT側より供給される。また、
前記上定盤UTには、ウエハWの上面W1と対向して研
磨布1が貼り付けられ、下定盤LTには、ウエハWの下
面W2と対向して研磨布2が貼り付けられる。
Embodiments of the present invention will be described below with reference to the drawings. First, an outline of an apparatus for polishing a silicon semiconductor wafer on both sides will be described with reference to FIG. This apparatus is composed of a pair of upper and lower metal platens U to which a polishing cloth is attached.
T, LT, a plurality of carriers C holding the wafer W,
This is a double-side polishing machine for a silicon semiconductor wafer comprising a sun gear S and an internal gear I for causing the carrier C to carry out planetary movement between the upper and lower platens UT and LT. The structure is similar to that of the silicon semiconductor wafer rubbing apparatus. Usually, the slurry is supplied from the upper platen UT through the slurry introduction pipe P and the introduction hole H. Also,
A polishing cloth 1 is attached to the upper platen UT so as to face the upper surface W1 of the wafer W, and a polishing cloth 2 is attached to the lower platen LT so as to face the lower surface W2 of the wafer W.

【0008】[0008]

【実施例1】通常の研磨は、2段階研磨方式が一般的
で、本案施例も同様である。実施例1では、1次研磨方
式で研磨布1,2の素材及び形状を相違させ、2次研磨
は形状のみ(材質は同一)相違させた例である。(尚、
当然ながら荷重、スラリー、その他の条件は全て同一と
なる) これら研磨布1,2の素材及び形状の具体例を下記の表
1に示す。
[Embodiment 1] In general polishing, a two-stage polishing system is generally used, and the same applies to the embodiment of the present invention. The first embodiment is an example in which the materials and shapes of the polishing cloths 1 and 2 are different in the primary polishing method, and only the shape (the material is the same) is different in the secondary polishing. (still,
(Of course, the load, slurry, and other conditions are all the same.) Specific examples of the materials and shapes of these polishing cloths 1 and 2 are shown in Table 1 below.

【0009】[0009]

【表1】 [Table 1]

【0010】ウレタン発泡型研磨布は、そのウレタン発
泡部の形態、即ちその発泡部の数、大きさは製造方法に
より容易に変更可能であり、上記表のウレタン発泡型の
「発泡が小さく数の極端に少ないもの」とは、特別に製
造されたものを示している。また、ウレタン発泡型(発
泡の大きさ、数の通常のもの)は、スラリーをより良好
に保持できるるように製造された従来通りものを示して
る。
The urethane foam type polishing cloth can easily change the form of the urethane foam part, that is, the number and size of the foam parts, according to the manufacturing method. "Extremely low" indicates specially manufactured. In addition, the urethane foam type (usual size and number of foams) indicates a conventional one manufactured so as to be able to hold the slurry better.

【0011】従って、上記の例は、ウエハWの上面W1
がサンドブラスト加工面であり、下面W2が本来の鏡面
に研磨仕上げされてパターンが形成される面であるが、
この下面W2が1次研磨、2次研磨を合わせて7〜8μ
m研磨されるのに対し、サンドブラスト処理された上面
W1は、スラリー保持力の相違によって極めて少ない加
工代(量)の0.5 〜1μm程度と推測できる。この分は
予めサンドブラスト処理時に幾分加工歪みを深く形成し
ておくことで十分対応でき、従来通りの加工歪みを有す
るゲッタリング効果を確保できる。
Therefore, the above example is based on the upper surface W1 of the wafer W.
Is a sandblasted surface, and the lower surface W2 is a surface on which a pattern is formed by being polished to an original mirror surface,
The lower surface W2 has a primary polishing and secondary polishing of 7 to 8 μm.
On the other hand, the upper surface W1 subjected to sandblasting can be estimated to have an extremely small machining allowance (amount) of about 0.5 to 1 μm due to a difference in slurry holding power. This can be sufficiently dealt with by forming the processing strain somewhat deeper in advance during the sandblasting process, and the gettering effect having the conventional processing strain can be secured.

【0012】[0012]

【実施例2】実施例2では、使用される研磨布1,2の
素材が実施例1と同じであるがその形状をマクロ的に観
た場合、1次研磨も2次研磨も上定盤UTに研磨布1を
貼り付ける前の時点で、図2に示す如く特殊工具により
スラリー流路用の溝1aを切削形成したものである。こ
れに対し、下定盤LTに貼り付けられる研磨布2のスラ
リー流路用溝(図示せず)は、その形成された溝の面積
が上定盤UT側のスラリー流路用溝1aの面積より小さ
いか、又は下記の表2に示すように全く形成されていな
い。
Embodiment 2 In Embodiment 2, the materials of the polishing cloths 1 and 2 to be used are the same as those in Embodiment 1, but when the shape is viewed macroscopically, both the primary polishing and the secondary polishing are performed on the upper surface plate. Before the polishing cloth 1 is attached to the UT, a groove 1a for a slurry flow path is cut and formed by a special tool as shown in FIG. On the other hand, in the slurry flow channel groove (not shown) of the polishing pad 2 attached to the lower surface plate LT, the area of the formed groove is larger than the area of the slurry flow channel groove 1a on the upper surface plate UT side. Small or not formed at all as shown in Table 2 below.

【0013】[0013]

【表2】 [Table 2]

【0014】従来、研磨布に様々に加工される溝は、本
来、スラリーを均一に分布させるためのもので研磨速度
も増大させると言われているが、本実施例のようなウレ
タン発泡型研磨布の発泡部の構造(形状、数)まで相違
させる時は、そのような影響は少なく、溝の面積を大き
く形成したことによるウエハ吸着カの減少のみが顕在化
する。
Conventionally, it is said that the grooves processed variously in the polishing cloth are originally for uniformly distributing the slurry and also increase the polishing rate, but the urethane foam type polishing as in this embodiment is considered. When the structure (shape, number) of the foamed portion of the cloth is made different, such an effect is small, and only the reduction of the wafer suction force due to the large area of the groove becomes apparent.

【0015】従って、上定盤UT側の研磨布1面上に形
成したスラリー流路用溝1aが占める面積は、下定盤L
T側の研磨布2面上に形成したスラリー流路用溝(図示
せず)が占める面積(本案施例ではゼロ)より多く大気
圧と通じているため、吸着力が減少する。その結果、1
次、2次研磨終了後に上定盤UTを引き上げて、ウエハ
キャリアCからウエハWを取り出そうとしても、ウエハ
Wが上の研磨布1に貼り付いて一緒に上昇するというよ
うな操業上の問題が回避できる。
Accordingly, the area occupied by the slurry flow channel groove 1a formed on the surface of the polishing cloth 1 on the upper surface plate UT side is equal to the lower surface plate L
Atmospheric pressure is greater than the area (zero in this embodiment) occupied by the slurry flow channel (not shown) formed on the surface of the polishing cloth 2 on the T side, so that the suction force is reduced. As a result, 1
Next, when the upper platen UT is pulled up after the completion of the secondary polishing and the wafer W is to be taken out from the wafer carrier C, an operation problem such that the wafer W sticks to the upper polishing cloth 1 and rises together. Can be avoided.

【0016】上記表2のスラリー流路用溝1aは、図2
に示す如く1次研磨も2次研磨もピッチ15mmで、溝巾2
mmで、深さ 0.6mmで加工されている。同図の(a)は、
上定盤UT側に貼り付けられる研磨布1の全体図で、装
置の大きさにより決まる同心円形状の厚さ 1.5mmの研磨
布である。そして、この研磨布1の表面には、同図の
(b)に示す如く溝1aがピッチ15mmで格子状に加工さ
れると共に、同図の(c)に示す如く溝巾2mmで断面V
字形に形成されている。更に、符号1bは、研磨布1を
上定盤UTに貼り付けるための接着シートである。
The groove 1a for the slurry flow channel shown in Table 2 is shown in FIG.
As shown in the figure, both primary and secondary polishing have a pitch of 15 mm and a groove width of 2.
mm and 0.6 mm deep. (A) of FIG.
FIG. 2 is an overall view of the polishing cloth 1 attached to the upper platen UT side, which is a concentric circular polishing cloth having a thickness of 1.5 mm determined by the size of the apparatus. On the surface of the polishing cloth 1, grooves 1a are formed in a grid pattern at a pitch of 15 mm as shown in FIG. 4B, and a groove V of 2 mm is formed as shown in FIG.
It is formed in the shape of a letter. Further, reference numeral 1b denotes an adhesive sheet for attaching the polishing cloth 1 to the upper surface plate UT.

【0017】尚、このようなスラリー流路用溝1aの全
体の形状に関して、格子状に限らず、同心円状、菱形
状、螺旋状、その他であっても作用、効果は同一であ
る。
The overall shape of the slurry flow channel 1a is not limited to the lattice shape, and the same operation and effect can be obtained even if it is concentric, rhombic, spiral, or the like.

【0018】[0018]

【発明の効果】以上説明したように、本発明のうち請求
項1記載の発明は、スラリー保持力に差があって研磨速
度が相違する研磨布を使用し、ウエハの加工歪み層を有
する面と対向して、研磨速度の極端に小さい研磨布を配
置させると共に、その反対側の研磨面と対向して、研磨
速度の大きい研磨布を配置させ両面同時に研磨すること
により、ウエハの加工歪み層を有する面が反対側の研磨
面に比べ研磨量が極めて僅少となるので、サンドブラス
ト処理面の加工歪みを残存できる。従って、従来通りの
加工歪みで目的するゲッタリング効果を確保できる。
尚、両面ミラー仕上げ基板は、その加工精度が良好であ
るにも拘わらず片面ミラー仕上げされた基板に比べて量
的に少ない理由の一つとして、表裏の識別が難しいとい
う点があるといわれている。この点に関し、サンドブラ
ストという処理面が残留することで面質の相違となって
識別可能である。
As described above, the present invention according to claim 1 of the present invention uses a polishing cloth having a difference in slurry holding power and a different polishing rate, and a surface of a wafer having a work distortion layer. A polishing cloth with an extremely low polishing rate is disposed opposite to the polishing surface, and a polishing cloth with a high polishing rate is disposed opposite the polishing surface on the opposite side, and both sides are polished at the same time. Is extremely small compared to the opposite polished surface, so that the processing distortion of the sandblasted surface can be left. Therefore, the desired gettering effect can be ensured with the conventional processing distortion.
It is said that one of the reasons that a double-sided mirror-finished substrate is quantitatively less than a single-sided mirror-finished substrate despite its good processing accuracy is that it is difficult to identify the front and back surfaces. I have. In this regard, the remaining processing surface called sand blast causes a difference in surface quality and can be identified.

【0019】請求項2の発明は、請求項1の発明の効果
に加えて、上定盤側の研磨布の方が下定盤側の研磨布に
比べ、スラリー流路用溝の面積が大きい分だけ、より大
気圧と通じて吸着力が減少するので、上定盤側の研磨布
にウエハが貼り付くのを確実に防止できる。従って、研
磨終了後に上定盤を引き上げて、ウエハキャリアからウ
エハを取り出す作業が容易になり、この取り出し作業中
にウエハを落下させて破損させることもない。
According to a second aspect of the present invention, in addition to the effect of the first aspect, the polishing pad on the upper platen has a larger area for the groove for the slurry flow path than the polishing cloth on the lower platen. However, since the suction force is reduced by communicating with the atmospheric pressure, it is possible to reliably prevent the wafer from sticking to the polishing cloth on the upper stool. Therefore, it is easy to take out the wafer from the wafer carrier by lifting the upper platen after the polishing is completed, and the wafer is not dropped and damaged during the taking out operation.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 シリコン半導体ウエハを両面研磨する装置の
断面図である。
FIG. 1 is a sectional view of an apparatus for polishing a silicon semiconductor wafer on both sides.

【図2】 (a)は上定盤側の研磨布を示す全体図、
(b)は(a)の部分拡大図、(c)は部分拡大して示
す断面図である。
FIG. 2A is an overall view showing a polishing cloth on an upper platen side;
(B) is a partially enlarged view of (a), and (c) is a sectional view showing a partially enlarged view.

【符号の説明】[Explanation of symbols]

UT 上定盤 LT 下定盤 W ウエハ W1 上面 W2 下面 1 研磨布 1a スラリー流路用溝 2 研磨布 UT Upper surface plate LT Lower surface plate W Wafer W1 Upper surface W2 Lower surface 1 Polishing cloth 1a Slurry flow channel 2 Polishing cloth

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 研磨布(1,2)が夫々貼り付けられた
上下一対の定盤(UT,LT)間にシリコン半導体ウエ
ハ(W)を挟圧し、スラリーを供給しながら相対的に移
動させて両面同時に研磨する方法において、前記定盤
(UT,LT)に貼り付ける研磨布(1,2)素材の材
質及び形状を、同時又は各々独立して上下定盤(UT,
LT)で異なるものとし、その研磨布(1,2)に当接
するウエハ(W)両面(W1,W2)側からの研磨速度
を相違させて研磨することを特徴とするシリコン半導体
ウエハの両面研磨方法。
1. A silicon semiconductor wafer (W) is sandwiched between a pair of upper and lower platens (UT, LT) to which polishing cloths (1, 2) are respectively attached, and relatively moved while supplying slurry. In the method of polishing both surfaces simultaneously, the material and the shape of the polishing cloth (1, 2) to be attached to the surface plate (UT, LT) are simultaneously or independently set.
LT), and polishing at different polishing rates from both sides (W1, W2) of the wafer (W) in contact with the polishing cloth (1, 2). Method.
【請求項2】 前記定盤(UT,LT)に貼り付けられ
る研磨布(1,2)素材の形状の相違において、上定盤
(UT)側の研磨布(1)表面に最終的に施されたスラ
リー流路用溝(1a)の総面積が、下定盤(LT)側の
それより大きくすることを特徴とする請求項1記載のシ
リコン半導体ウエハの両面研磨方法。
2. The method according to claim 1, wherein the difference in the shape of the polishing cloth (1, 2) material adhered to the surface plate (UT, LT) results in a final application to the surface of the polishing cloth (1) on the upper surface plate (UT) side. 2. The method for polishing both sides of a silicon semiconductor wafer according to claim 1, wherein the total area of the formed slurry flow grooves (1a) is larger than that of the lower surface plate (LT).
JP2701398A 1998-02-09 1998-02-09 Both surfaces polishing method of semiconductor wafer Pending JPH11233462A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2701398A JPH11233462A (en) 1998-02-09 1998-02-09 Both surfaces polishing method of semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2701398A JPH11233462A (en) 1998-02-09 1998-02-09 Both surfaces polishing method of semiconductor wafer

Publications (1)

Publication Number Publication Date
JPH11233462A true JPH11233462A (en) 1999-08-27

Family

ID=12209226

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2701398A Pending JPH11233462A (en) 1998-02-09 1998-02-09 Both surfaces polishing method of semiconductor wafer

Country Status (1)

Country Link
JP (1) JPH11233462A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001091970A1 (en) * 2000-05-31 2001-12-06 Sumitomo Mitsubishi Silicon Corporation Method of polishing semiconductor wafers by using double-sided polisher
JP2006159353A (en) * 2004-12-08 2006-06-22 Shin Etsu Chem Co Ltd Polishing method
US7589023B2 (en) * 2000-04-24 2009-09-15 Sumitomo Mitsubishi Silicon Corporation Method of manufacturing semiconductor wafer
JP2012234604A (en) * 2011-05-09 2012-11-29 Asahi Glass Co Ltd Method for manufacturing glass substrate for magnetic recording medium and glass substrate for magnetic recording medium
JP2014195119A (en) * 2011-09-15 2014-10-09 Siltronic Ag Method for double-side polishing of semiconductor wafer
CN111558895A (en) * 2019-02-14 2020-08-21 胜高股份有限公司 Wafer recovery device, polishing system and wafer recovery method
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Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7589023B2 (en) * 2000-04-24 2009-09-15 Sumitomo Mitsubishi Silicon Corporation Method of manufacturing semiconductor wafer
US8283252B2 (en) 2000-04-24 2012-10-09 Sumitomo Mitsubishi Silicon Corporation Method of manufacturing semiconductor wafer
WO2001091970A1 (en) * 2000-05-31 2001-12-06 Sumitomo Mitsubishi Silicon Corporation Method of polishing semiconductor wafers by using double-sided polisher
US7470169B2 (en) 2000-05-31 2008-12-30 Sumitomo Mitsubishi Silicon Corporation Method of polishing semiconductor wafers by using double-sided polisher
JP2006159353A (en) * 2004-12-08 2006-06-22 Shin Etsu Chem Co Ltd Polishing method
JP2012234604A (en) * 2011-05-09 2012-11-29 Asahi Glass Co Ltd Method for manufacturing glass substrate for magnetic recording medium and glass substrate for magnetic recording medium
JP2014195119A (en) * 2011-09-15 2014-10-09 Siltronic Ag Method for double-side polishing of semiconductor wafer
US9308619B2 (en) 2011-09-15 2016-04-12 Siltronic Ag Method for the double-side polishing of a semiconductor wafer
CN111558895A (en) * 2019-02-14 2020-08-21 胜高股份有限公司 Wafer recovery device, polishing system and wafer recovery method
JP2020131309A (en) * 2019-02-14 2020-08-31 株式会社Sumco Wafer recovery device, polishing system and wafer recovery method
WO2022215370A1 (en) 2021-04-07 2022-10-13 信越半導体株式会社 Wafer processing method and wafer
KR20230165236A (en) 2021-04-07 2023-12-05 신에쯔 한도타이 가부시키가이샤 Wafer processing methods and wafers

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