JPH11232181A - Abnormally detector for battery backup ram - Google Patents

Abstract

PROBLEM TO BE SOLVED: To detect a true abnormality in a battery backup RAM. SOLUTION: In a computer system on which this battery backup RAM 13 is mounted, the feeding state of a backup power supply line 20 is detected and a keyword written on the RAM 13 and data written on a ROM 7 are compared. Only when the feeding state of the line 20 is normal and also the noncoincidence of keyword data is decided, the RAM 13 is decided as a true failure. In the case of an abnormality in the feeding state, the line 20 is decided as abnormal. Also, when it is continuously decided as abnormal, the number of times is written in a nonvolatile EEPROM, and when counted value is larger than a prescribed value, it is decided as a permanent failure. It is thus possible to surely detect a true abnormality in a backup RAM.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a battery backup RAM inspection device capable of retaining data by a battery even after power is turned off, and more particularly to a detection device for detecting an abnormality in a backup RAM itself. This device is, for example, a backup R in an engine control device in which a control value is stored as a learning value in a battery backup RAM.
It can be used in an AM abnormality detection device.

[0002]

2. Description of the Related Art Conventionally, a CPU (Central Processing Unit)
Is large, the program is written in R
It comprises an OM (read only memory), a RAM (random access memory) as a work area memory, an I / O interface as an input / output interface with the outside, and the like. In recent years, flash ROMs and EEPROMs that can be electrically erased or written
However, the RAM holds the memory at a static power supply voltage S
There are a RAM (static ram) and a DRAM (dynamic ram) whose data is held by a dynamic pulse (refresh pulse). The SRAM is used as a backup RAM or the like whose storage is held by a battery. These are used properly depending on the purpose of use of the control device.

[0003] A fuel injection control device used in an internal combustion engine for a vehicle is also constituted by a computer system similar to the above. In the fuel injection control device, in order to obtain a mixed gas having an appropriate air-fuel ratio, the state of the vehicle is detected by various sensors, and the CPU performs arithmetic processing using a memory provided therein,
Actuators such as fuel injection valves are operated. The previous control values such as the injection timing and the injection amount are stored in the backup RAM as learning values, and are used as control values at the time of the next engine start. The backup RAM is a memory that retains the learning value even when the ignition switch (start switch) of the vehicle is turned off. As a power supply (backup power supply) for operating the backup RAM, an in-vehicle battery is generally used.

However, in the backup RAM, the actual voltage (backup voltage) applied thereto may be lower than the voltage required to operate the backup RAM. This occurs when the voltage of the vehicle-mounted battery drops, the backup power supply line is disconnected, or the vehicle-mounted battery is disconnected from the backup power supply line. Then, there is a problem that the data stored in the backup RAM is destroyed, and if the data is used as it is, the actuator is operated by erroneous data.

The backup RAM is composed of a plurality of ICs.
In some cases, the (integrated circuit) is mounted on a vehicle in a state of being soldered to a printed circuit board. If there is a potential soldering failure, the integrated circuit is peeled off due to severe vibration of the vehicle and the like, and one of the backup RAMs is removed. The part may be destroyed. Even in such a case, there is a problem that optimal engine control cannot be performed.

Conventionally, as a method of solving these problems, there is known a battery disconnection detecting device described in Japanese Patent Application Laid-Open No. 7-52732. FIG. 8 shows the configuration. Briefly, RO, which is an element of a computer system,
The above-described EEPROM 10 is used as a part of M, and the backup RAM 13 is used as a part of RAM. Each time the ignition switch 19 is turned on, for example, a standby voltage VSTBY, which is a backup voltage, is monitored, and if the voltage is equal to or lower than a specified value, the result is written to the EEPROM 10. When the number of times of continuous writing exceeds a predetermined number, it is characterized that a backup power supply line abnormality is determined. The same keyword is written in the EEPROM 10 and the backup RAM 13, and the keyword is compared every time the ignition switch is turned on. If they do not match, the result is similarly written to the EEPROM 10. If the number of consecutive writings exceeds a predetermined number, it is determined that the backup power supply line is abnormal.

According to the above-described device, the number of times of voltage drop of the backup power supply line is written in the EEPROM 10,
Only when the writing exceeds a predetermined number of times continuously is determined to be a permanent disconnection, it can be distinguished from a single voltage drop, that is, removal of the backup power supply line that occurs due to repair etc., and it is possible to reliably detect disconnection Was.

[0008]

However, the above-described device detects an abnormality in the backup power supply line when the power supply from the vehicle-mounted battery to the backup RAM is reduced or interrupted. It is not intended to detect an abnormality (an abnormality in the backup RAM itself). For example, a written key
The word mismatch is either a destruction of the element in which the keyword is written or a loss of data due to a disconnection or the like, and does not distinguish between them. Also, the key
If an error occurred in an element other than the one in which the word was written, the error could not be detected. Therefore,
The problem of malfunctioning as before has been left.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and relates to a battery backup RAM abnormality detecting device capable of holding data by a battery. And a genuine backup RAM error (backup R
Note that there is an abnormality in the AM itself)
It is an object of the present invention to completely distinguish between the two by the AM keyword inspection method and to detect a genuine backup RAM abnormality.

[0010]

According to a first aspect of the present invention, a predetermined data is written to a predetermined address of a battery backup RAM before the main switch is turned off, and a predetermined data of the battery backup RAM is stored next time the main switch is turned on. The data at the address is read, and it is determined whether or not this data matches the predetermined data. When the power supply state to the battery backup RAM via the backup power supply path is normal, when it is determined that the data does not match, This is an apparatus that writes data indicating mismatch to a writable nonvolatile memory and determines that the battery backup RAM is abnormal based on the data stored in the writable nonvolatile memory.

As described above, when the power supply state of the backup power supply path is normal and there is an abnormality in the data in the backup RAM while the main switch is off, R
It is stored in the writable nonvolatile memory as an AM abnormality. Therefore, it is possible to clearly distinguish whether the data is destroyed because power supply is stopped due to disconnection of the backup power supply path or the like or a genuine failure of the battery backup RAM.

According to the battery backup RAM abnormality detecting device of the second aspect, when the coincidence determining means continuously determines the mismatch, the number of mismatches is stored in the writable nonvolatile memory, and the RAM abnormality determining means is provided. Is provided with a RAM abnormality judging means for judging an abnormality when the number of consecutive mismatches is equal to or more than a predetermined number. as a result,
Temporary inconsistencies are excluded and battery backup RA
Only when M has a continuous abnormality (mismatch), it is determined that the backup RAM is abnormal. Therefore, it becomes an abnormality detection device for the battery backup RAM that reliably detects the genuine abnormality.

According to the battery backup RAM abnormality detecting device of the present invention, the determination by the RAM abnormality determining means is performed by turning on the main switch and supplying power from the battery to the electronic control device controlled using the battery backup RAM. Is executed every time is started. Therefore, when an abnormality occurs in the battery backup RAM when the electronic control unit is stopped, the inspection is performed at the time of startup, so that the electronic control unit is not controlled by a wrong data and does not malfunction. For example, in the case of an electronic control unit for an automobile, this detection is performed immediately after the engine is started or the ignition switch is turned on. Therefore, it is a safe battery backup RAM abnormality detection device for preventing malfunction.

According to the battery backup RAM abnormality detecting device of the present invention, when the main switch is turned on and the coincidence determining means determines that the data in the battery backup RAM does not match the predetermined data, then
Writing and reading of predetermined data to and from the battery backup RAM are performed, and it is determined whether there is any abnormality in the data writing and reading operations. In the case of an abnormality, it can be determined that the battery backup RAM is abnormal, and if no error occurs due to rewriting, it is considered that the data in the battery backup RAM was destroyed while the main switch was off. That is, battery backup RAM for disconnection of backup power supply line, temporary removal of battery, and maintenance
Can be regarded as rewriting of data. In this manner, a genuine failure of the battery backup RAM can be detected without providing a means for detecting the power supply state of the backup power supply path. For example, if the data read by the reading unit does not match the predetermined data immediately after the start of the electronic control unit, it is first determined that the battery backup RAM is abnormal for some reason. Next, writing and reading are sequentially performed, and if the results do not match, it is determined that the abnormality is a genuine backup RAM abnormality (an abnormality of the battery backup RAM itself). If they match, it is determined that the data is temporarily lost due to an abnormality in the power supply state. Therefore, a genuine backup RA is required without a device for detecting the power supply state of the backup power supply line.
M abnormality can be detected efficiently.

According to a fifth aspect of the present invention, when the number of times of inconsistency detected each time the main switch of the fourth aspect is turned on occurs continuously, it is determined that the battery backup RAM is abnormal. Therefore, a genuine failure of the battery backup RAM and a failure of the backup power supply path can be more accurately determined.

According to a sixth aspect of the present invention, the above-mentioned electronic control device is a device for controlling the engine of a vehicle, and the electronic control unit is supplied with power from a battery to control the engine. The various control values obtained during the operation are stored as learning values, and in order to use the learning values for the next engine control, in a state where the power supply from the battery is stopped, A memory for storing a learning value is provided. Therefore, when the abnormality detection device for the battery backup RAM according to any one of claims 1 to 5 is applied to the device for controlling the engine of the automobile, the genuine backup RA is surely obtained when the engine is started.
Since the M abnormality is inspected and notified to the user, a safe device without malfunction can be provided.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. Note that the present invention is not limited to the following examples. (First Embodiment) FIG. 1 shows the configuration of the apparatus according to the first embodiment. The battery backup RAM abnormality detection device of the present invention is applied to, for example, a control device for a diesel engine. The vehicle equipment 2 is a diesel engine, and the ECUs 5 and 5 are control devices for controlling the vehicle equipment 2.
It comprises a battery 1 as a power supply for operating the CU 5 and a warning lamp 3 for warning an abnormal state or the like.

These devices are provided with contacts 18, 21, 15, 16 provided on the connector 4, a main power supply line (corresponding to a main power supply path) 17 as a power supply path, and a backup power supply line (claims). (Corresponding to a backup power supply path) 20 to the battery 1. An ignition switch (corresponding to a main switch in the claims) 19 serving as a start switch is mounted on the main power supply line 17.

The ECU 5 is a control device on which a computer system is mounted. The power supply circuit 11 supplies a constant voltage, and the controller 1 controls the vehicle equipment 2.
4. ROM 7 in which a program to be executed is stored, EEPROM 10 in which parameters at the time of startup and the like are written (corresponding to a writable nonvolatile memory in the claims) (electrical eraser)
ble progamable ROM). This EEPR
The OM 10 can rewrite data a limited number of times, and stores a small amount of rewritten data.
Further, the controller 14 comprises a CPU 6, a RAM 8 which is a work area and a storage area for arithmetic processing, and an input / output port 9 which is an interface for input and output to and from the control device 2. They are connected by a system bus 12 composed of data lines and signal lines. Also, the RAM 8
A backup RAM 13 is provided which can store data learned after power-off. In addition, C of the power supply circuit 11
The diode 22 arranged in the forward direction between the output to the PU 6 or the like and the output to the backup RAM 13 is connected to the V 22 to stabilize the supply voltage Vstby to the backup RAM 13.
When the level of stby falls below the output voltage V _DD to the CPU 6 or the like, the output voltage V _DD is supplied to the supply voltage Vstby to the backup RAM 13 via the diode 22. The output voltage V _DD to the CPU 6 and the like and the supply voltage V stby to the backup RAM 13 are at substantially the same level.

Next, the operation of the battery backup RAM abnormality detecting apparatus will be described with reference to the flowchart shown in FIG. The present invention uses a backup RAM at startup.
Since the main purpose is to inspect the normal / abnormal state of 13 and inform the user, the control of the control device 2 is omitted.
This embodiment is mainly applied to the case where the backup RAM 13 is singular. The operation of the battery backup RAM abnormality detecting device of the present invention starts when a vehicle start switch (ignition switch, hereinafter referred to as IG switch) is turned on.

In step s210, the power supply state detection means and the power supply state determination means determine whether or not the state of the standby bit of the CPU 6 is "1". Both means are composed of a CPU 6, a ROM 7, and a program 7a contained in the ROM 7. The standby bit is an operation state monitoring bit of the CPU 6 that constantly monitors the power supply state of the backup power supply line 20. When the supply voltage Vstby to the backup RAM 13 is higher than the reference voltage for a predetermined time, "1" is set. Otherwise, "0" is set. When the standby bit is “1”, it is determined that the power supply from the backup power supply line 20 is normal, and the process shifts to step s220.
If the standby bit is "0", it is determined that an abnormality has occurred in the backup power supply line, and the process immediately proceeds to the next processing. In the next process, a process corresponding to the standby bit = “0”, for example, a warning for disconnection of the backup power supply line 20 and other processes are performed.

In step s220, the coincidence judging means judges whether or not the keyword read from the backup RAM 13 by the reading means matches predetermined data in the ROM 7. Step s220 constitutes the reading means and the coincidence determining means. If the keywords match, the backup RAM 13 is determined to be normal, and the flow shifts to step s230. Step s230
Then, it is determined whether or not the count value of a counter provided in the EEPROM 10 is “0”. Here, when the count value is “0”, there is no abnormality in the battery backup RAM 13 in the past, so that the process immediately proceeds to the next process. If the count value is not “0”, it is determined that the number of abnormalities up to the previous time is abrupt due to noise or the like, and the process proceeds to the next step S240, and the EEPROM is executed.
The count value written in 10 is cleared, and the process proceeds to the next processing.

On the other hand, if the keywords do not match in step s220, it is determined that an abnormality has occurred in the backup RAM 13 itself due to some influence under a normal power supply, and the process proceeds to step s250. . In step s250, the counter in the EEPROM 10 is counted up. Subsequently, in step s260, for example, a value of 5AA5H is reset to a predetermined location in the backup RAM 13 for the next inspection, and the process proceeds to step s270.

The count value of the counter in the EEPROM 10 is checked by the RAM abnormality determining means in step s270. If the count value reaches n or more (usually 3 to 4), the permanent backup RAM 13
Is determined to have occurred. That is, I
The G switch 19 is activated three to four times in succession, and if a backup RAM abnormality is detected continuously, it is determined that the abnormality is not a sudden abnormality but a genuine RAM abnormality, and the process proceeds to step s280. In the case of no, the temporary R
Since there is a possibility of an AM abnormality (for example, data loss due to battery removal), the process proceeds to step s275, sets a learning data unusable flag, and proceeds to the next process. In the next process, the initial data stored in the ROM 7 is used for control without using the learning data in the backup RAM 13. The learning data unusable flag is
It is stored in the RAM 8 and is cleared to 0 at the start of the program each time the IG switch is turned on next time. The RAM abnormality determination means in this case is also
6, ROM 7 and program 7a included in ROM 7
It is composed of

The operation of the flowchart of FIG. 2 will be described with reference to the timing chart of FIG. The section (a) in FIG. 3 is a period during which the battery 1 is removed (standby bit =
At the time of "0"), the IG switch 19 is turned on, and the signal keyword (keyword match determination signal in step s220) is at a level indicating abnormality, but is not a genuine abnormality. It is "0" without being counted up. The section (b) in FIG. 3 is a case where the IG switch 19 is turned on during normal operation, and the signal ke
yword is at a level indicating normality. Therefore, EEPRO
The counter of M10 is not counted up and is "0". However, as shown in the section (c) of FIG. 3, when any abnormality occurs in the backup RAM 13,
Each time the IG switch 19 is turned on, the signal keyword becomes a level indicating a mismatch (abnormal), and the counter of the EEPROM 10 is continuously counted up. This count value is determined in step s270 described above, and the processing in steps s275 and s280 is executed according to the determination result.

If it is determined that the backup RAM is genuine, a warning is issued to the driver in step s280 such as turning on the warning lamp 3. In step s290, a failure code or the like is issued. Is set,
It is displayed on a display device (not shown).

As described above, when it is confirmed that the power supply state of the backup power supply line 20 of the backup RAM 13 is normal, when the data held in the backup RAM 13 and the keyword do not match. , The backup RAM 13 is abnormal. As a result,
An abnormality such as a disconnection of the backup power supply line 20 and a genuine failure of the backup RAM 13 can be clearly distinguished. The counter of the EEPROM 10, which is a non-volatile memory, is updated each time the abnormality is determined to be continuous, and when the counter value exceeds a predetermined value, the backup R
Since it is determined that the AM 13 is a genuine failure, the failure determination is more reliable.

(Second Embodiment) In the first embodiment, the capacity of the backup RAM 13 is small and a single storage element (SRA) is used.
M). But the same RAM
When a large capacity is required and a plurality of storage elements are used, even if the keywords stored at the predetermined addresses match, other areas and other elements are destroyed. Could be. In such a case, the present embodiment is applied. In this embodiment, all the backup RAMs 13
Is inspected.

The operation will be described with reference to a flowchart shown in FIG. The difference from the first embodiment is shown in FIG.
By adopting the data structure match determination in step s225 instead of the keyword match determination in step s220, and adding step s235 (memory abnormal state recording clear) and step s295 (memory abnormal state display). is there.

In step s225, the backup RA
Matching between the data structure in M13 and the data structure specified in the ROM 7 is determined by the match determining means.
The data structure is, for example, a data structure as shown in FIG.
Is a mirror structure formed symmetrically. Assuming that the data used for control is 5AH (hexadecimal), the backup RAM 13 stores symmetrical data, 5AA
5H, generally pqqp is written. Also,
In the ROM 7, a program 7a for designating a data structure and inspecting mirror data is written. CPU6
Inspects the mirror structure in the backup RAM 13 according to this program.

If it is determined in step s225 that all the data structures match, the process proceeds to step s230. In step s230, it is determined whether or not the count value of the counter provided in the EEPROM 10 is "0". If the count value is "0", it is determined that the count is normal,
Move to next process. If the count value is "1", it means that a sudden abnormality has occurred in the past. Therefore, the process proceeds to the next steps s235 and s240, where the recording of the memory abnormality state is cleared and the counter of the EEPROM 10 is cleared. Is cleared, and the process proceeds to the next process.

On the other hand, if all the data structures do not match in step s225, it is a memory abnormality, so the process proceeds to step s226, and the memory abnormality state such as the address, total number, and data value of the memory abnormality is detected. Is recorded, and the routine goes to step s250. Steps s250 to s290 are the same as in the first embodiment.

Finally, in step s295, based on the standby bit and the record of the memory abnormality, the address and number of the memory in which the abnormality has occurred are indicated to the user by a display device (not shown).

(Third Embodiment) The third embodiment is similar to the first and second embodiments.
Unlike the embodiment, this is an apparatus that detects a genuine failure of the backup RAM 13 without detecting the power supply state of the backup power supply line 20. In step s110 shown in FIG.
A keyword written in a predetermined location of the AM 13 is read, and the read keyword is compared with a predetermined keyword written in the ROM 7 by the match determination means. Note that both the reading means and the coincidence determining means are the CPU 6,
It is constituted by a computer system comprising a ROM 7 and a program 7a in the ROM 7.

If the result of the comparison is "yes", that is, if the values match, the backup RAM 13 is determined to be normal, and the routine goes to step s160. In step s160, E
It is determined whether the count value of the counter provided in EPROM 10 is “0”. Here, when the count value is “0”, the operation is normal, and the next process, that is, the normal control such as the calculation of the fuel injection amount is immediately performed based on the previous learning value stored in the backup RAM 13. Be started. On the other hand, if the count value is not "0", it means that an erroneous recognition has been made in the past due to a sudden cause such as noise or the like. Clear the value and proceed to the next process.

On the other hand, if it is determined in step s110 that they do not match, it is possible that data has been lost due to the temporary removal of the backup power supply line 20, or that an abnormality has occurred in the electric circuit due to vibration or the like. There is. Step s to determine which one
In step 120 and step s130, continuous writing, reading, and coincidence determination are performed. Backup RAM 13
This is because if the data itself is destroyed, the values of the continuous writing and reading do not match. That is, in step s120, the keyword is stored in the backup RAM1 again.
3, and are read and compared by the coincidence determining means in step s130.

If the result is a match, step s1
The cause of the mismatch at 10 is determined to be a temporary loss of data, the learning data unavailable flag is set to "1" at step s135, and the process proceeds to step s170. Step s17
At 0, the previous count value written in the EEPROM is cleared, and the process proceeds to the next process. In the next process, since the learning data unavailable flag is “1”, the backup R
Without using the learning data written in AM13, ROM
The control device 2 is controlled using the initial value data registered in 7 or the like. The learning data unavailable flag is set to RA
It is stored in M8 and cleared to 0 at the start of the program every time the IG switch is turned on next time.

If the values do not match, it is determined that an abnormality (genuine abnormality) has occurred in the circuit of the backup RAM 13 due to some influence under a normal power supply.
Move to 140. In step s140, a counter in the EEPROM 10 is counted up to check the frequency of the abnormality, and the process proceeds to step s150. In step s150, the second RAM abnormality detecting means determines whether or not the count value of the counter in the EEPROM 10 has reached n or more (usually 3 to 4). If the number of abnormalities is not equal to or greater than the predetermined number, it is considered that an abnormality has suddenly occurred, and the process proceeds to step s155, the learning data unavailable flag is set to “1”, and the process proceeds to the next process. If the number of abnormalities is equal to or more than the predetermined number, it is determined that a permanent abnormality has occurred in the backup RAM 13 itself. In other words, regarding the continuous start of the IG switch 19 three to four times,
When an abnormality is continuously detected in the backup RAM 13, it is determined that the abnormality is not a sudden abnormality such as noise but is permanently destroyed. The second RAM abnormality detecting means also includes a CPU 6, a ROM 7, and a program 7a included in the ROM 7.

In step s180, an abnormal warning such as turning on the warning lamp 3 is given to the driver. In step s190, a failure code or the like is set.
It is displayed on a display device (not shown).

As described above, in the present embodiment, the comparison with the previously written keyword, that is, the determination of the data holding state during the battery backup, and the continuous operation while the data is supplied from the main power supply line 17 are performed. By combining data comparison by writing / reading, a permanent abnormality (genuine backup RAM abnormality) and a temporary abnormality are determined. Therefore, it is possible to efficiently detect the genuine abnormality of the backup RAM without intentionally using a device for detecting the power supply state. Also, the number of times determined to be abnormal is written in the EEPROM 10 which is a non-volatile memory, and the continuity is finally determined.
Abnormality of the genuine backup RAM can be reliably detected.

(Modifications) Although one embodiment of the present invention has been described above, various other modifications are possible. For example,
In the first and second embodiments, the presence or absence of power supply from the backup power supply line 20 is detected by the standby bit of the CPU, but the backup power supply voltage is converted into a digital value by an A / D converter (not shown). Alternatively, monitoring and determination may be made at the input / output port 9. In the first to third embodiments, the program executed by the CPU is mainly written in the ROM. However, a small-scale program may be directly written in the EEPROM 10. Further, in the first to third embodiments, the battery backup RA of the present invention is used.
Although the M abnormality detection device is all incorporated in the control device, it may be a separate system.

In the above-described second embodiment, when an abnormality in the backup RAM 13 is detected, it may be necessary to specify the location where the failure has occurred in order to facilitate the recovery. In the second embodiment, the memory abnormal address, the total number, and the like are displayed in the final step s295, but an abnormal area or an abnormal element may be further specified from the address where the abnormality has occurred. In this case, the backup R corresponding to the upper digit of the address in which the error occurred or the upper digit
The number of the component of the AM 13 or the like can be displayed to notify the user.

In the second embodiment, the data structure is a symmetric mirror structure. However, as shown in FIG.
The data may be bit-inverted to form an inverted bit structure added to the lower digits.

Further, in the third embodiment, step s1
10, when it is determined that there is an abnormality, the backup RAM 1
3, the rewriting and rereading of the keyword data are executed to detect a mismatch, and when a predetermined number of such mismatches are detected consecutively, the backup RAM
13 is determined to be a genuine failure. But with rewriting,
Since the possibility of a genuine failure of the backup RAM 13 is high when there is a mismatch due to re-reading, it may be determined that the genuine failure has occurred at least once in this state.

In addition, various modifications are conceivable. However, various modifications may be made without departing from the gist of the present invention, in which a genuine backup RAM abnormality is determined by a combination of a keyword reading method or a combination of a determination based on a keyword and a power supply state. Modifications can be made.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing an electronic control device using an abnormality detection device according to a first embodiment of the present invention.

FIG. 2 is a flowchart showing a processing procedure of a CPU of the first embodiment.

FIG. 3 is a timing chart showing the operation of the first embodiment.
G.

FIG. 4 is a flowchart showing a processing procedure of a CPU of the apparatus according to the second embodiment of the present invention.

FIG. 5 is a structural diagram showing write data used for matching determination used in the device of the second embodiment.

FIG. 6 is a flowchart showing a processing procedure of a CPU of a device according to a third embodiment of the present invention.

FIG. 7 is a data structure diagram used in a modified example of the present invention.

FIG. 8 is a configuration diagram of a conventional disconnection detection device for a backup power supply line for a backup RAM.

[Description of Signs] 1 Battery 2 In-vehicle device 3 Warning lamp 6 CPU 7 ROM 7a Program 8 RAM 10 EEPROM (writable nonvolatile memory) 13 Backup RAM 17 Main power line (main power supply line) 19 Ignition switch (main switch) 20 Backup power line (backup power supply line)

Claims (6)

[Claims] 1. An abnormality is detected in a battery backup RAM that always supplies power via a backup power supply path by a battery and retains stored contents. When a main switch is turned on, power is supplied from the battery via the main power supply path. A power supply state detection means for detecting a power supply state to the battery backup RAM via the backup power supply path; and determining whether a power supply state detected by the power supply state detection means is normal or abnormal. Power supply state determining means for writing; writing means for writing predetermined data to a predetermined address of the battery backup RAM before the main switch is turned off; and writing by the writing means when the main switch is turned on last time. The data at the predetermined address of the battery backup RAM inserted in the When the switch is turned on, a reading means for reading, a coincidence judging means for judging whether or not the data read by the reading means coincides with the predetermined data, and a case where the power supply state judging means judges that the power is normal. And when the coincidence determination unit determines that there is no match, data indicating the mismatch is written by the match determination unit, and is stored in the writable nonvolatile memory. R that determines that the battery backup RAM is abnormal based on the
Battery backup RA comprising AM abnormality determination means
M abnormality detection device. 2. The method according to claim 1, wherein said coincidence determining means stores the number of mismatches in said writable nonvolatile memory when said mismatch is determined continuously, and said RAM abnormality determining means determines whether said number of mismatches has occurred continuously. The abnormality detection device for a battery backup RAM according to claim 1, wherein the abnormality is determined when the number of times is equal to or more than a predetermined number. 3. The judgment by the coincidence judging means is executed every time the main switch is turned on and power supply to the electronic control device controlled using the battery backup RAM is started via the main power supply path. 3. The abnormality detection device for a battery backup RAM according to claim 2, wherein the abnormality is detected. 4. An abnormality is detected in a battery backup RAM which always supplies power via a backup power supply line by a battery and retains stored contents. When a main switch is turned on, power is supplied from the battery via the main power supply line. Writing means for writing predetermined data to a predetermined address of the battery backup RAM before the main switch is turned off, and writing by the writing means when the main switch is turned on last time. Reading means for reading the stored data at the predetermined address of the battery backup RAM after the main switch is turned on next time; and determining whether or not the data read by the reading means matches the predetermined data. When the match determining means determines that there is no match,
The predetermined data is written to a predetermined address of the battery backup RAM, and then the data at the predetermined address is read, and it is determined whether or not the data matches the predetermined data. An abnormality detection device for a battery backup RAM, comprising: a second RAM abnormality determination means for determining an abnormality. 5. A non-volatile memory, comprising: a writable nonvolatile memory; and said second RAM abnormality determination means, when the main switch is turned on, continuously determining that the data does not match. The battery backup R is stored when the number of consecutive mismatches stored in the writable nonvolatile memory is equal to or greater than a predetermined number.
The abnormality detection device for a battery backup RAM according to claim 4, wherein the AM is determined to be abnormal. 6. The electronic control unit according to claim 1, wherein said electronic control unit is a device for controlling an engine of a vehicle, and said battery backup RAM
Stores various control values obtained while the electronic control unit is powered by the battery and performing engine control as learning values, and uses the learning values for the next engine control. The battery backup RAM according to any one of claims 1 to 5, wherein the electronic control unit is a memory for storing a learning value when power supply from the battery is stopped.
Abnormality detection device.