JPH11231839A - Driving circuit for liquid crystal display - Google Patents

Abstract

PROBLEM TO BE SOLVED: To sharply reduce the number of composing elements. SOLUTION: On the one picture element data of subordination 6 bit, two adjacent decoder elements A1 in a decoder 1 are turned on, and a voltage supplied from a gradation voltage setting sectinj to the decoder element is taken out and severally supplied to the switches 7, 9 of a selecter 5. The switches 7, 9 carry out tour types of selection motions on the picture element data of a host 2 bit, and a voltage taken out at the switches 7, 9 is dispersed into capacitors C0, C1, C2, C3, and a gradation voltage for one picture element is taken out from the capacitor C3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a driving circuit for a liquid crystal display, and more particularly to a driving circuit used for a liquid crystal panel such as a personal computer and a monitor.

[0002]

2. Description of the Related Art FIG. 3 shows a configuration of a driving circuit of a conventional liquid crystal display. The gradation voltage setting unit 105 determines that 2
The 56 reduced voltages are used as voltage sources and supplied to 256 decoder elements (not shown) constituting the 8-bit (hereinafter, bit) decoder 101. Note that the 8-bit decoder 101 is, for example,
38 to support panel standards such as GA and SXGA
There are four.

[0003] One pixel data (gradation data) of 8 bits is supplied to the decoder 101, and one decoder element corresponding to the pixel data at that time is turned on. And
The gradation voltage setting unit 10 supplied to the decoder element
5 is supplied to a liquid crystal display (not shown) via the amplifier 103 as a gradation voltage of one pixel.

The other 383 8-bit decoders operate in the same manner, and supply the grayscale voltages of 383 pixels to the liquid crystal display.

[0005] The number of elements of this 256 gradation, 384 output dot inversion type decoder (drive circuit) is (number of gradations) x
(Number of bits) × (method) × (number of outputs) = 256 × 8 × 2
× 384 = 1.57 million elements.

[0006]

SUMMARY OF THE INVENTION Conventionally, for example, 256
A gray scale, 384 output inversion type decoder (drive circuit) requires 15.7 million elements, and has a problem that the area of the semiconductor integrated circuit becomes large.

Accordingly, an object of the present invention is to provide a driving circuit for a liquid crystal display capable of greatly reducing the number of constituent elements.

[0008]

According to the present invention, there is provided a driving circuit of a liquid crystal display for generating a gradation voltage of one pixel from one pixel data composed of r bits (r = higher n bits + lower m bits).
It is composed of gray-scale voltage setting means for supplying a number of different gray-scale voltages corresponding to m bits, and a group of decoder elements receiving supply of each voltage from the gray-scale voltage setting means.
One decoder element is turned on by the bit pixel data, and the first voltage and the second voltage from the gradation voltage setting means are turned on.
Decoder means for extracting the first and second voltages, and the first voltage is supplied to each first selected terminal, and the second voltage is supplied to each second selected terminal. And n switch means whose selection terminals select the first or second terminal to be selected, and n switch means each having one end connected to each of the n selection terminals and the other end commonly connected. It is characterized by comprising a capacitor group and capacitor means having one end connected to the other end of the n capacitor groups and the other end connected to an output terminal to output a gradation voltage of one pixel.

[0009]

1 and 2 show the configuration of an embodiment of a driving circuit for a liquid crystal display according to the present invention. Due to the complexity of the configuration, it is divided into two drawings.
A drive circuit is configured by connecting the same numbers 1 to a11 and the same numbers a1 to a11 in FIG.

In the present embodiment, the driving circuit 1
And the configuration is the same. One pixel data (gradation data) is composed of 8 bits, and the upper 2 bits (D
0, D1) are supplied to the selector 5, and the lower 6 bits (D2 to D7) are supplied to the decoder 2. Also in the present embodiment, as described later, 256 gradations (= 64 gradations ×
4 gradations) can be obtained.

The gradation voltage setting section 31 has 64
The reduced voltages are supplied to 64 decoder elements (A1, A2, A3,..., A64) as voltage sources.

The lower 6 bits of pixel data are transmitted to the decoder 2
Supplied to As described above, the decoder 2 has 64 decoding elements A1, A2, A3,.
, A64 are arranged in parallel. Each decoding element is composed of two sets of six MOS transistors, and each gate of the six transistors has pixel data D
One of D2 to D7 is supplied.

Each time the content of the 6-bit pixel data changes, one decoder element is turned on. For example, decoder elements A1, A2, A3, A4,..., A64. Thereby, the first voltage and the second voltage supplied to the decoder element from the gradation voltage setting unit 31 are extracted. The extracted first voltage is supplied to the first selected terminals of the two switches 7 and 9 of the selector 5, and the extracted second voltage is supplied to the second terminals of the switches 7 and 9 of the selector 5. It is supplied to the selected terminal.

One end of each of the capacitors C1 and C2 is connected to each selection terminal of the switches 7 and 9, and the other end of each of the capacitors C1 and C2 is connected to one end of a capacitor C3.

The other end of the capacitor C3 is connected to the output terminal 1 via a switch 23. In addition, 21 is an amplifier. The switch 23 is turned on when the drive circuit 1 needs to operate. Also, the capacitors C1 and C2
And C3 have different capacities.

C0 has a role of preventing the occurrence of overlapping of gradations. C0 is always connected to the first voltage side.

Each of the selection terminals of the switches 7 and 9 of the selector 5 is controlled by the upper two bits of pixel data.
Select the first or second selected terminal. That is, the selector 5 performs four selections of 2 squares.

The charge due to the voltage taken out at the selection terminals of the switches 7 and 9 is distributed to the capacitors C1, C2 and C3, and the voltage appearing at the other end of the capacitor C3 is used as the gradation voltage of the pixel as the switch 23. Is output to a liquid crystal display (not shown).

By employing the capacitor array 3 of the capacitors C0, C1, C2 and C3, the resistance of the switches 7 and 9 of the selector 5 does not affect the accuracy of the gradation voltage output.

The capacitors C0, C1, C2, and C3
Switches 20, 1 connected in parallel to
1, 13, and 15 are turned on before the next pixel data is supplied to the drive circuit 1, and the capacitors C0, C1, C2, and C
3 is to be initialized.

Next, 256 gradations, 3
The number of elements of the 84-output dot inversion driving circuit is obtained.
(Number of gradations) × (number of bits) × (method) × (number of outputs) = 6
4 × 6 × 4 × 384 = 560,000 elements. In addition, (selector + the number of capacitors) × the number of outputs = (2 × 2 + 4) × 384 =
30.72 million elements are added, and the total number of elements is 56.30.
720,000 elements. This is about 36% of the conventional number of elements (1.57 million elements), and the area of the semiconductor integrated circuit is greatly reduced. In this way, the number of elements can be greatly reduced because the selector 5 and the capacitors C0, C1,
This is because the potential of the capacitor array 3 of C2 and C3 is divided and the potential is superimposed on the gradation voltage divided by the lower bit.

[0022]

As described above, according to the present invention, the number of components of the driving circuit can be greatly reduced, and the area of the semiconductor integrated circuit can be reduced.

[Brief description of the drawings]

FIG. 1 is a diagram showing a part of a configuration of an embodiment of a driving circuit of a liquid crystal display of the present invention.

FIG. 2 is a diagram showing another portion of the configuration of the embodiment of the driving circuit of the liquid crystal display of the present invention.

FIG. 3 is a diagram showing a configuration of a driving circuit of a conventional liquid crystal display.

[Explanation of symbols]

1 ... drive circuit, 2 ... decoder, A1, A2, ...
..A64: decoder element, 5: selector,
7, 9 ... switch, C1, C2, C3 ... capacitor, 11, 13, 15, 23 ... switch, 21 ...
····················· Amplifier, 31 ··· Grayscale voltage setting unit, 41 ··· External voltage terminal.

Claims (2)

[Claims] 1. A driving circuit for a liquid crystal display that generates a gray scale voltage of one pixel from one pixel data of r bits (r = high n bits + m low bits), wherein the number of different levels corresponding to m bits is different. A gray scale voltage setting means for supplying an adjustment voltage; and a group of decoder elements each receiving supply of each voltage from the gray scale voltage setting means. One of the decoder elements is turned on by pixel data of lower m bits. Decoder means for taking out a first voltage and a second voltage from the gradation voltage setting means; and the first voltage is supplied to each first selected terminal, and the second voltage is supplied to each of the first selected terminals. The selected terminals are supplied to the second selected terminals, and each of the selected terminals selects the first or second selected terminal based on the upper n bits of image data.
Switch means, one end is connected to each of the n selection terminals, and the other end is commonly connected to n capacitor groups; and one end is connected to the other end of the n capacitor groups. A driving circuit for a liquid crystal display, comprising: capacitor means having an end connected to an output terminal and outputting a gradation voltage of one pixel. 2. The liquid crystal display driving circuit according to claim 1, wherein the capacitances of the n capacitor groups and the capacitor means are different from each other.