JPH11225473A - Power supply - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a PWM system and zero volt switching system with high conversion efficiency. SOLUTION: A power supply is provided with a first switching element 4 for switching an input DC current with a PWM control, a first and a second capacitor and a second switching element 5 in order to conduct the first switching operation for accumulating energy to a transformer, by turning on th first switching element 4 and conduct the second switching operation to lower a terminal voltage of the first capacitor 8 by turning off the first switching element 4 to charge the second capacitor, turning on the second switching element to release a recovery current from the second capacitor 9 and then turning off the second switching element 5. In this case, the second switching element 5 is set to an on state in the former half period of the off condition unchanging period by providing the off condition unchanging period, in which the first switching element is in the off condition at all times in one period of the switching signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply for generating a DC voltage by switching, and more particularly to a power supply for generating a DC voltage by a so-called zero volt switch system.

[0002]

2. Description of the Related Art In general, in a power supply device using an FET (field effect transistor) as a switching element for switching an input DC through a primary winding of a transformer, first, the FET is controlled to an ON state, so that the FET is first turned on. Store energy in transformer. Next, by controlling the FET to an off state, the stored energy of the transformer is released from the secondary winding of the transformer to generate a DC voltage on the secondary winding side. In this case, while discharging the stored energy of the transformer from the secondary winding, the induced voltage of the primary winding is applied to the FET, so that the terminal voltage of the internal capacitor parasitically present inside the FET rises. . Therefore, when the FET is switched while the voltage between the terminals of the internal capacitor is increasing, the F
Power is lost due to ET switching. For this reason, after reducing the voltage between the terminals of the internal capacitor, FE
A zero volt switch method of switching T is adopted.

As a power supply employing such a zero volt switch method, a power supply based on a PFM method (frequency control method) has been conventionally known. In this power supply device, when the load is heavy, as shown in FIG. 9A, the switching frequency is controlled to be low, so that the current I21 flowing through the primary winding of the transformer is increased. As shown in (2), control is performed so that the amount of energy corresponding to the output current I22 output from the secondary winding is increased. Conversely, when the load is light, by controlling the switching frequency high as shown in FIG.
The current I21 flowing through the primary winding of the transformer is reduced, whereby the energy amount corresponding to the output current I22 output from the secondary winding is controlled to be small as shown in FIG. In FIGS. 7A and 7C, the hatched portions indicate the regenerative current output from the internal capacitor of the FET as a switching element to the input DC supply source side, and FIGS. , (D) indicates a regenerative current that is regenerated to the input DC supply source side via, for example, a primary winding in order to output a regenerative current from the internal capacitor of the FET to the input DC supply source side. Indicates that

However, there is a problem in that the power supply device based on the PFM method becomes large as a whole.
Specifically, the minimum switching frequency when the load current is the maximum and the input DC voltage is the allowable minimum voltage is, for example, 50
If the frequency is set to kHz, when the load current is the minimum and the input DC voltage is the maximum allowable voltage, the switching frequency is, for example, about 280 kHz. In this case, it is necessary to design the transformer so as to obtain predetermined characteristics with respect to the lowest switching frequency, so that the size of the transformer naturally increases. In addition, when the switching frequency is reduced, the cutoff frequency of the smoothing filter provided on the secondary winding side of the transformer must be designed to be low. Therefore, the smoothing filter, particularly, the capacitor constituting the smoothing filter is required. Also increase in size. As a result, the size of the entire apparatus is increased.

For this reason, in order to reduce the size of the power supply device (especially, the transformer and the smoothing filter provided on the secondary winding side), the switching signal is turned on by using a zero volt switch system and keeping the switching frequency constant. There is also a power supply device that employs a PWM control method (Pulse-Width Modulation) that changes a duty ratio of a period according to a load current.

[0006] As shown in FIG.
A primary winding 2a, a secondary winding 2
b and a transformer 2 having an auxiliary winding 2c. On the primary winding 2a side of the transformer 2, a capacitor 3, FETs 4 and 5, a switching control circuit 6 for controlling switching of the FET 4, capacitors 7 to 9, a resistor 10 and diodes 11 to 13 It has. The capacitor 8 is constituted by a parasitic capacitance of the FET 4 or a capacitor connected in parallel to the FET 4 separately from the parasitic capacitance. Further, the diodes 11 and 12 are constituted by diodes called so-called body diodes or parasitic diodes existing inside the FETs 4 and 5, respectively, or independent diodes connected to the FETs 4 and 5 separately from the body diodes and the like. . Further, the power supply device 41 includes a rectifying diode 21 and a smoothing capacitor 22 on the secondary winding 2b side.

Next, the operation of the power supply device 41 will be described with reference to FIG.
This will be described with reference to FIG. In a normal state, the switching control circuit 6 outputs the switching signal S11 shown in FIG. As a result, the current I11 shown in FIG. 6C and FIG. 6 respectively flows through the primary winding 2a. At this time, a current opposite to the current I12 shown in FIG. 6 tends to flow through the secondary winding 2b, but is blocked by the diode 21. Stored. Next, the switching control circuit 6 outputs the signal S12 immediately after stopping the output of the switching signal S11 and controlling the FET 4 to be in the OFF state.
5 is turned on. As a result, the current I12 based on the flyback voltage generated in the secondary winding 2b due to the energy stored in the transformer 2 is supplied to the secondary winding 2b as shown in FIG. Flows. At this time, the output voltage of the voltage E2 is rectified by the diode 21 and smoothed by the capacitor 22, and output to the outside of the device. In this case, assuming that the induced voltage of the primary winding 2a is the voltage E3, a voltage EC expressed by the following equation and in the direction shown in FIG. 6 is generated at both ends of the capacitor 8. EC = E1 + E3 where the primary winding 2a and the secondary winding 2b of the transformer 2
Are N1 and N2, respectively.
If the forward voltage is ignored, the voltage E3 is approximately expressed by the following equation, and the voltage EC is expressed by the following equation. E3 = (N1 / N2) · E2 ... Equation EC = E1 + (N1 / N2) · E2 ... Equation

Therefore, if the FET 4 is immediately turned on in this state, both ends of the capacitor 8 are short-circuited, so that the energy stored in the capacitor 8 is consumed as heat loss in the short-circuited by the FET 4. . In this case, the energy stored in the capacitor 8 is proportional to the square of the voltage EC across the capacitor 8. Therefore, the higher the voltage EC is, the larger the energy loss due to the short circuit becomes. Further, when the FET 4 is switched at a high switching frequency of several hundred KHz in order to reduce the size of the power supply device, a loss occurs each time switching is performed. Therefore, if the control method of immediately turning on the FET 4 while the capacitor 8 is being charged is adopted, the conversion efficiency of the power supply device is reduced, and noise is generated when the capacitor 8 is short-circuited. There is.

For this reason, in the power supply device 41 as well, the FET 4 is controlled to be on by the zero volt switch method. Specifically, in the power supply device 41, when discharging the stored energy from the transformer 2, the power supply device 41 includes the primary winding 2a, the capacitor 9, the diode 12, and the capacitor 7, as shown in FIGS. Capacitors 7 and 9 are charged by flowing current I13 through the current path.
In this case, the energy charged in the capacitor 7 is used as the power of the switching control circuit 6. Next, when the release of the stored energy of the transformer 2 is completed, the switching control circuit 6 continuously outputs the signal S12, and as shown in FIGS. , The capacitor 3, the auxiliary winding 2c, the resistor 10, the diode 13, and the drain and source of the FET 5, the regenerative current I14 flows. In this case, the capacitor 9 has a capacitance value that is sufficiently larger than the capacitance value of the capacitor 8, and outputs a regenerative current I14 sufficient to allow a current I15 to flow from the capacitor 8 described later. Thereafter, as shown in FIGS. 7B and 7E, when the switching control circuit 6 stops outputting the signal S12, the outflow of the regenerative current I14 from the capacitor 9 is cut off. Next, the switching control circuit 6 continuously stops outputting the switching signal S11 and the signal S12 for a predetermined time. In this state, as shown in FIG. 3C, a current I15 opposite to the current I11 flows out of the capacitor 8 and is regenerated to the capacitor 3 through the primary winding 2a. Voltage EC decreases. Thereafter, when the voltage EC across the capacitor 8 reaches or approaches 0 V, the switching control circuit 6 outputs the switching signal S11 to control the FET 4 to the on state. As a result, a zero volt switch is achieved, and energy loss when the capacitor 8 is short-circuited is reduced.

[0010]

However, the conventional power supply device 41 has the following problems. That is, in the conventional power supply device 41, the capacitor 9 is charged by the current I13 and the regenerative current I14 based on the energy by the charging is regenerated to the capacitor 3 when the load is in an appropriate state, so that the capacitor 8 discharges the current I15. As a result, a zero volt switch is realized.
However, when the input DC voltage E1 increases or the load current decreases, as shown in FIGS. 8A and 8B, the switching control circuit 6
Control is performed such that the on-period duty ratio of the signal 11 is reduced and the on-period duty ratio of the signal S12 is increased.
In this case, during the ON period of the signal S12, since the capacitance value of the capacitor 9 is sufficiently large, the regenerative current I14 is continuously output. As a result, as shown in FIGS. And the energy corresponding to the current I15 becomes unnecessarily large. Therefore, when these currents I14 and I15 regenerate, they flow through the primary winding 2a, so that power is lost, which causes a problem that the conversion efficiency of the device is reduced.

The present invention has been made to solve such a problem, and has as its main object to provide a power supply device capable of improving the conversion efficiency of the device while realizing a zero volt switch system based on a PWM system.

[0012]

According to a first aspect of the present invention, there is provided a power supply apparatus comprising:
A first switching element that is WM controlled to switch the input direct current through the primary winding of the transformer, a first capacitor equivalently connected in parallel to the first switching element, a second capacitor, A second switching element that is controlled to be on when the one switching element is off, a first switching operation that stores energy in the transformer by controlling the first switching element to be on; Controlling the first switching element to an off state, thereby generating a DC voltage on the secondary winding side of the transformer by an output current based on the stored energy of the transformer, charging the second capacitor, and performing the second switching. The element is controlled to be in an ON state to allow a regenerative current to flow out of the second capacitor, and
A power supply device that alternately performs a second switching operation of lowering the voltage between the terminals of the first capacitor by controlling the switching element of the first switching element to an off state, wherein the first switching element is provided in one cycle of the switching signal. Is provided with an off-state invariable period for constantly controlling the second switching element to an off-state, and the second switching element is controlled to be in an on-state during the first half of the off-state invariable period.

In this power supply device, during the first switching operation, when the first switching element is turned on in accordance with the switching signal, the input DC flows through the primary winding of the transformer, so that energy is accumulated in the transformer. Is done. Next, at the time of the second switching operation,
By controlling the first switching element to be in the off state, an output current based on the energy stored in the transformer is output via the secondary winding to generate a DC voltage, and the second capacitor is charged. . Next, the second switching element is controlled to be turned on, whereby a regenerative current for reducing the voltage between the terminals of the first capacitor flows out of the second capacitor. In this case, the second
Are controlled to the on state within the off state invariable period. Here, the off-state invariable period is a period during which the first switching element is always controlled to be in the off state in one cycle of the switching signal, that is, the off state is controlled even when the load current is maximum. Therefore, during this period, even when the load current is the minimum, the time length is not extended. Therefore, since the energy corresponding to the regenerative current output from the second capacitor does not change much depending on the magnitude of the load current, the power loss caused by the outflow of the regenerative current when the load current is small is reduced. On the other hand, when the second switching element is controlled to be turned off after the regenerative current flows out of the second capacitor, the regenerative current flows out from the first capacitor to the input DC supply source side, thereby causing the regenerative current to flow. The voltage between terminals decreases. Next, while the inter-terminal voltage of the first capacitor is decreasing, the first switching element is controlled to the on state. This achieves a zero volt switch. Thereafter, by repeatedly executing both switching operations, a DC voltage is continuously generated on the secondary line side.

According to a second aspect of the present invention, in the power supply device of the first aspect, the first half and the second half of the off-state invariable period are controlled to be constant.

The OFF state invariable period may be controlled so as to be changed according to the input DC voltage value or the load current. On the other hand, the capacitance value of the first capacitor equivalently connected in parallel to the first switching element is generally constant. Therefore, when the voltage applied to the first switching element and its time are determined, the amount of energy stored in the first capacitor also becomes substantially constant. Therefore, the amount of energy corresponding to the regenerative current output from the second capacitor in order to release the energy stored in the first capacitor may necessarily be constant. For this reason,
The power supply device controls the energy corresponding to the regenerative current output from the second capacitor to be substantially constant by controlling the off-state invariable period to a fixed time. As a result, it is possible to omit the process for controlling the expansion and contraction of the time length of the OFF state invariable period and the configuration therefor, so that the device can be configured simply and inexpensively while achieving the zero volt switch.

According to a third aspect of the present invention, in the power supply device according to the first or second aspect, the off-state invariable period is provided in the first half of the on-state control period of the switching signal.

The first switching element and the second switching element may be controlled independently of each other by providing the OFF state invariable period independently of the switching signal. However, in such a case, the process of synchronizing the control of the first and second switching elements becomes complicated. In this power supply device, by providing an off-state invariable period in the first half of the on-state control period of the switching signal, the first switching element is always controlled to be in the off-state during the off-state invariable period of each one cycle of the switching signal. Becomes possible. At the same time, it is possible to provide an off-state invariable period with a simple configuration and to easily perform synchronous control of both switching elements.

According to a fourth aspect of the present invention, in the power supply device according to any one of the first to third aspects, a first control signal for controlling the first switching element to be turned on and a second switching signal. A control signal generation circuit for generating a second control signal for controlling the element to an on state based on the switching signal is provided.

In this power supply device, the duty ratio of the switching signal is feedback-controlled according to the load current, and the control signal generation circuit generates the first and second control signals based on the switching signal. In this case, since the control signal generation circuit centrally manages the generation processing of both control signals, it is possible to reliably synchronize both control signals.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of a power supply according to the present invention will be described below with reference to the accompanying drawings. Note that the same components as those of the power supply device 41 are denoted by the same reference numerals, and redundant description will be omitted.

First, a configuration of a power supply device 1 of a flyback type PWM system to which a power supply device according to the present invention is applied will be described with reference to FIG. The power supply device 1 includes, on the primary winding 2a side of the transformer 2, a capacitor 3, FETs 4 and 5 corresponding to the first and second switching elements of the present invention, respectively, in the same manner as the conventional power supply apparatus 41. Switching control circuit 6, capacitor 7
9, a control signal generating circuit 14, and a parasitic capacitance of the FET 5 or a capacitor 15 connected in parallel to the FET 5 separately from the parasitic capacitance. In this case, the switching control circuit 6 uses the FET 4 to stabilize the output voltage to the voltage E2 based on the feedback signal SF output from the feedback control circuit 23 described later.
A switching signal S1 for feedback-controlling the on-period duty ratio is generated.

On the other hand, the control signal generating circuit 14 receives the switching signal S1 output from the switching control circuit 6 and, based on the switching signal S1, corresponds to a first control signal in the present invention and performs switching of the FET 4. , And a control signal S3 corresponding to a second control signal according to the present invention and controlling on / off of the FET 5. More specifically, when the input DC voltage E1 is the allowable minimum voltage and the load current is the maximum, the duty ratio of the switching signal S1 is determined by changing one cycle of the switching signal S1 over time as shown in FIG. In the case of TSW, the period TON during which the high level signal (H level signal) is output is the longest and the period TOFF during which the low level signal (L level signal) is output is the shortest within the time TSW. in this case,
The control signal generation circuit 14 generates a control signal S3 fixed at a time T1 in synchronization with the rise of the switching signal S1, as shown in FIG.
Time T2 of a length approximately equal to time T1 from the fall of
And a control signal S2 for a time T3 which is expanded and contracted according to the remaining period of the output period of the high level signal in the switching signal S1 after the blank period. In this case, the control signal S2 is not always generated between the time T1 and the time T2.
The period of T2 corresponds to the OFF state invariable period in the present invention. It should be noted that the time T3 shown in FIG.
Is the longest output time.

On the other hand, when the input DC voltage E1 is the maximum allowable voltage and the load current is the minimum, the duty ratio of the switching signal S1 becomes the high level signal within the time TSW as shown in FIG. Is output during the period TON
Is the shortest, and the period T during which the low level signal is output
OFF is the longest. Also in this case, the control signal generation circuit 1
4 is a switching signal S1 as shown in FIG.
Control signal S fixed at time T1 in synchronization with the rise of
3 and a blank period fixed at a time T2 substantially equal to the time T1 from the fall of the control signal S3, and the remaining period of the output period of the high-level signal in the switching signal S1 after the blank period. Generates a control signal S2 for a time T3 that expands and contracts according to The time T3 shown in FIG. 3D is the shortest output time of the control signal S2. As a result, the control signal generating circuit 14 always outputs the control signal S3 fixed at the time T1 to the FET 5 in synchronization with the switching signal S1, and also controls the control signal S2 which expands and contracts according to the duty ratio of the switching signal S1. Is output to the FET4.

Further, the power supply device 1 includes a diode 21, a capacitor 22, and a feedback control circuit 23 for feeding back a feedback signal SF corresponding to an output voltage to the switching control circuit 6 in the secondary winding 2 b.

Next, the operation of the power supply device 1 will be described with reference to FIGS.
This will be described with reference to FIG.

First, the operation when the duty ratio of the high level signal in the switching signal S1 is the maximum will be described with reference to FIG. In the power supply device 1, the feedback control circuit 23 outputs a feedback signal SF corresponding to the load current to the switching control circuit 6. As a result, the switching control circuit 6 converts the switching signal S1 (see FIGS. 1 and 2A) generated based on the feedback signal SF into the control signal generation circuit 14.
Output to In this case, actually, the control signal generation circuit 1
4 outputs the control signal S3 at first, but for the sake of easy understanding, the description will be made from the time when the control signal S2 is first output. When the control signal S2 shown in FIG. 2 (b) is output, the FET 4 is controlled to be turned on.
The current I1 shown in (d) flows through the primary winding 2a, so that energy is stored in the transformer 2. Next, the switching control circuit 6 outputs the switching signal S1.
Is stopped, the control signal generation circuit 14 also stops outputting the control signal S2. As a result, a current I2 based on the flyback voltage generated in the secondary winding 2b by the energy stored in the transformer 2 (see FIG. 7E) is output from the secondary winding 2b. At this time, the output voltage is generated by rectifying and smoothing the diode 21 and the capacitor 22. At the same time, on the primary winding 2a side, the current I3 shown in FIG.
The current flows through a current path including the primary winding 2a, the capacitor 9, the diode 12, and the capacitor 7. Thereby, the capacitors 7, 9 are charged.

Next, the switching control circuit 6 outputs a switching signal S1 to the control signal generation circuit 14 based on the feedback signal SF. In this case, the control signal generation circuit 14 outputs the control signal S3 in synchronization with the rise of the switching signal S1 as shown in FIG. As a result, the FET 5 is controlled to be turned on, and as a result, a regenerative current I4 opposite to the current I3 is generated based on the energy stored in the capacitor 9 connected in series with the FET 5, as shown in FIG. , Primary winding 2
a, the capacitor 3, the auxiliary winding 2c, the resistor 10, the diode 13, and the current flowing through the drain and source of the FET 5, and the energy stored in the capacitor 9 is regenerated to the capacitor 3. Next, the control signal generation circuit 1
4 stops the output of the control signal S3 when the time T1 elapses from the output of the control signal S3. At this time, since both control signals S2 and S3 are not output, both FETs 4 and 5 are controlled to be off. At this time, in order to maintain the state in which the regenerative current I4 is flowing, a current I5 in the opposite direction to the current I1 based on the energy stored in the capacitor 8 (see FIG. 2D).
Flows through the current path including the primary winding 2a and the capacitor 3. As a result, the voltage VDS between the source and the drain of the FET 4, which is the voltage EC between the terminals of the capacitor 8, decreases as shown in FIG. In this case, the voltage waveform W1 of the voltage VDS is a waveform corresponding to the series resonance frequency determined by the capacitance of the capacitor 8 and the inductance of the primary winding 2a, as shown by the broken line in FIG.
At this time, the diode 11 prevents the voltage VDS from becoming a negative voltage.

Next, the control signal generating circuit 14 outputs the control signal S2 at the time when the time T2 has elapsed since the output of the control signal S3 was stopped. Thereby, FET4
Is controlled to the ON state. At this time, the voltage VDS becomes 0
V, the loss due to switching of the FET 4 is prevented, and the switching is performed by the FET 4 when the voltage VDS first reaches 0 V.
Power loss due to series resonance is also reduced. On the other hand, FET4
Is controlled to the on state, the current I5 continues to flow through the primary winding 2a, and at the time when the discharge of energy from the capacitor 8 ends, the current I1 opposite to the current I5 starts to flow. As a result, energy is stored in the transformer 2 as described above. Thereafter, the above operation is repeated to continuously generate a DC voltage. FIGS. 6H to 6J show the conventional power supply device 41.
, The current waveform of the current I11 flowing through the primary winding 2a when the switching signal S1 is at the high level, the voltage waveform of the voltage VDS between the source and the drain of the FET 4, and the current waveforms of the currents I13 and I14 for charging and discharging the capacitor 9. When the duty ratio of the high-level signal is the maximum, the waveform is almost the same as the corresponding waveform in the power supply device 1.

Next, the operation when the duty ratio of the high level signal in the switching signal S1 is minimum will be described with reference to FIG. The same operation as the operation when the duty ratio is the maximum will not be described repeatedly. In this case, the switching control circuit 6
Outputs a switching signal S1 (see FIGS. 1 and 5A) generated based on the feedback signal SF to the control signal generation circuit 14. Next, when the control signal S2 shown in FIG. 4B is output, the FET 4 is controlled to the ON state, and as a result, the current I1 shown in FIGS. 1 and 5D flows through the primary winding 2a. , The energy is stored in the transformer 2. Next, when the switching control circuit 6 stops outputting the switching signal S1, the control signal generating circuit 14 also stops outputting the control signal S2. As a result, the secondary winding 2b
Is output from the secondary winding 2b based on the flyback voltage generated at the same time, and at the same time, on the primary winding 2a side, the current I3 shown in FIG.
Flows through the current path shown in FIG. Thereby, the capacitors 7, 9 are charged. At this time, unlike the case where the duty ratio is the maximum, the two control signals S2 and S3 are not output even after the stored energy of the transformer 2 is released, so that both the FETs 4 and 5 are turned off over the period T4. To maintain. In this period T4, the capacitor 9
Of the regenerative current I3 has a resonance waveform corresponding to the series resonance frequency, as shown in FIG. 4F, because a series resonance occurs at a series resonance frequency determined by the capacitance value of the primary winding 2a and the inductance of the primary winding 2a. Becomes Also, during this period T4, the voltage EDS between the drain and the source of the FET 4
Also, as shown in FIG. 9G, a resonance waveform corresponding to the fluctuation of the regenerative current I3 is obtained.

Next, the switching control circuit 6 outputs the switching signal S1 to the control signal generation circuit 14 based on the feedback signal SF. In this case, as shown in FIG. 3C, the control signal generation circuit 14 outputs the control signal S3, so that the FET 5 is turned on. At this time, since the voltage on the primary winding 2a side of the capacitor 9 is applied to the drain of the FET 4,
4, the voltage VDS between the source and the drain is pulled up to the voltage on the primary winding 2a side of the capacitor 9 as shown in FIG. At this time, based on the energy stored in the capacitor 9, the regenerative current I
4 flows through the current path shown in FIG. 1, and the energy stored in the capacitor 9 is regenerated to the capacitor 3. Next, the control signal generation circuit 14 stops outputting the control signal S3 when the time T1 has elapsed since the control signal S3 was output. Subsequent operations are performed in the same manner as when the duty ratio is the maximum. In addition, FIG.
(J) shows the waveform of each part when the duty ratio of the high level signal in the switching signal S1 is the minimum in the conventional power supply device 41, and (h) shows the current of the current I11 flowing through the primary winding 2a. The waveform is shown, and (i) is FE
The voltage waveform of the voltage VDS between the source and the drain of T4 is shown, and (j) shows currents I13 and I14 for charging and discharging the capacitor 9.
3 shows a current waveform. These waveforms and the waveforms of various parts of the power supply device 1, particularly, the regenerative current I shown in FIG.
As is clear from the comparison between the current waveform of FIG. 14 and the current waveform of the regenerative current I4 shown in FIG. 9F, when the duty ratio of the high level signal in the switching signal S1 is the minimum, the duty ratio becomes the maximum. Unlike the case of (1), the energy corresponding to the regenerative current I4 in the power supply device 1 becomes necessary and sufficient, and as a result, unnecessary energy is drastically reduced. For this reason, the energy for achieving the zero volt switch can be drastically reduced, whereby the conversion efficiency of the device can be significantly improved.

As described above, according to the power supply device 1,
The control signal generation circuit 14 is required to control the FET 5 to the ON state only during the period T1 of a fixed time length, thereby achieving the zero volt switch regardless of the input DC voltage E1 and the load current. Energy is maintained at a substantially constant value. Therefore, even in the lightest load state where the input DC voltage value E1 and the load current are minimum, it is possible to realize a zero volt switch while maintaining high conversion efficiency.

Next, a power supply device 31 according to another embodiment will be described with reference to FIG. Note that the same components as those of the power supply device 1 are denoted by the same reference numerals, and redundant description will be omitted. Further, the feedback control for stabilizing the output voltage by the switching control circuit 6 is the same as that of the power supply device 1, and therefore the illustration of the configuration for that and the description of the operation are omitted.

The power supply 31 is different from the power supply 1
A transformer 32 is arranged in place of the transformer 2, and F
An FET 33 corresponding to ET5 is connected in parallel with the diode 21. Also, regarding the configuration for controlling the ON / OFF of the FET 33, a drive circuit 34 for driving the FET 33 is disposed on the secondary winding 32b side,
A transformer 35 for insulating the drive circuit 34 from the control signal generation circuit 14 is also provided.

The power supply 31 is basically composed of the power supply 1
In order to execute the same operation as described above, the operation will be described in comparison with the operation of the power supply device 1.

In the power supply device 31, the control signal generation circuit 14 outputs the control signal S2, so that the FET 4 is turned on. At this time, as in the power supply device 1, the current I1 flows through the primary winding 32a, so that energy is stored in the transformer 32. Then
When the control signal generation circuit 14 stops outputting the control signal S2, the secondary winding 32
The current I2 based on the flyback voltage generated at the point b is output from the secondary winding 2b via the diode 21, and is rectified and smoothed by the diode 21 and the capacitor 22 to generate an output voltage. .
In this case, in the power supply 31, a part of the current I 2 flowing through the capacitor 22 is
Corresponds to the current I3 flowing through the circuit. Therefore, part of the energy stored in the capacitor 22 corresponds to the energy stored in the capacitor 9 in the power supply device 1.

Next, the switching control circuit 6 outputs the switching signal S1 to the control signal generation circuit 14, and the control signal generation circuit 14 outputs the control signal S3 in synchronization with the rise of the switching signal S1. The control signal S3 is supplied to the drive circuit 34 via the transformer 35.
The drive circuit 34 amplifies the input control signal S3 and outputs the amplified control signal S3 to the FET 33. Thereby, F
As a result of the ET 33 being controlled to the ON state, a regenerative current I6 opposite to the current I2 is generated based on the energy stored in the capacitor 22 connected in series with the FET 33, as shown in FIG. It flows through a current path consisting of the drain and source, and the secondary winding 32b. In this case, the primary winding 3 has the same direction as the current I1.
The capacitor 8 is charged by the current flowing through 2a.
The regenerative current I6 corresponds to the current I4 in the power supply device 1.

Next, when the time T1 has elapsed since the control signal S3 was output, the control signal generation circuit 14
The output of the control signal S3 is stopped. At this time, as in the case of the power supply device 1, both FETs 4 and 33 are controlled to be off. At this time, a current I7 opposite to the current I1 flows through the current path including the primary winding 2a and the capacitor 3 based on the energy stored in the capacitor 8. The current I7 in this case is the current I7 in the power supply device 1.
Equivalent to 5. Thereby, similarly to the power supply device 1,
The voltage VDS between the source and the drain in the FET 4 decreases. Subsequent operations are performed in the same manner as in the power supply device 1. Also in this power supply device 31, when the duty ratio of the high-level signal in the switching signal S1 is the minimum, in the period T4 after the energy stored in the transformer 32 is released via the secondary winding 32b, the power supply device 31 is similar to the power supply device 1. Thus, the FET 33 is not controlled to the ON state. For this reason, the regenerative current I6 does not flow during the period T4. Therefore, even when the input DC voltage E1 is the maximum allowable voltage and the load current is the minimum, the power supply device 31 can maintain a high conversion efficiency while maintaining a high conversion efficiency. A switch can be realized.

It should be noted that the present invention is not limited to the configuration shown in the above embodiment of the present invention, and can be appropriately changed.
For example, in the power supply devices 1 and 31 according to the embodiment of the present invention, an example in which FETs are used as the first and second switching elements has been described. However, the present invention is not limited to this. Switching elements can be used. Further, in the embodiment of the present invention, an example has been described in which the control signal generation circuit 14 generates the control signal S2 and the control signal S3 based on the switching signal S1, but the present invention is not limited to this. , The control signal S2 and the control signal S3 may be generated based on the switching signal S1.

[0039]

As described above, according to the power supply device of the first aspect, the off-state invariable period for controlling the first switching element to be always in the off state in one cycle of the switching signal is provided. By controlling the second switching element to be in the ON state during the first half of the period, the energy corresponding to the regenerative current output from the second capacitor is limited to a predetermined amount. The conversion efficiency of the device in the state can be improved.

According to the power supply device of the second aspect,
By controlling the first half period and the second half period of the off-state invariable period to a fixed time, it is possible to omit a process for expanding and contracting the time length of the off-state invariable period and a configuration therefor, thereby achieving a zero volt switch. In addition, the apparatus can be configured simply and inexpensively.

Furthermore, according to the power supply device of the third aspect, the off-state invariable period is provided in the first half of the on-state control period of the switching signal. One switching element can be reliably controlled to be in the off state, a simple configuration can provide an invariable period in the off state, and both switching elements can be reliably synchronized.

According to the power supply device of the fourth aspect,
A control signal generation circuit generates a first control signal for controlling the first switching element to be on and a second control signal for controlling the second switching element to be on based on the switching signal. Thus, both control signals can be reliably controlled in synchronization.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a power supply device 1 according to an embodiment of the present invention.

FIGS. 2A and 2B are voltage waveforms and the like of respective parts for explaining the operation of the power supply device 1 when the duty ratio of a high-level signal in the switching signal S1 is maximum, and FIG. , (B) show the control signal S2
(C) is a voltage waveform diagram of the control signal S3,
(D) shows the current I1 flowing through the primary winding 2a of the transformer 2,
Ie is a current waveform diagram, (e) is a current waveform diagram of the current I2 flowing through the secondary winding 2b, (f) is a current waveform diagram of the currents I3 and I4 flowing when charging and discharging the capacitor 8, and (g) is a current waveform diagram. FE
A voltage waveform diagram of a voltage VDS between the source and the drain of T4,
(H) is a current waveform diagram of the currents I11 and I15 in the conventional power supply device 41, and (i) is an FE in the conventional power supply device 41.
A voltage waveform diagram of a voltage VDS between the source and the drain of T4,
(J) is a current waveform diagram of currents I13 and I14 in the conventional power supply device 41.

3A and 3B are diagrams for explaining control signals S2 and S3 generated by a control signal generation circuit 14, wherein FIG. 3A illustrates a voltage waveform of a switching signal S1 when a duty ratio of a high-level signal is maximum. FIG. 4B is a voltage waveform diagram of the control signals S2 and S3 when the duty ratio of the high level signal in the switching signal S1 is the maximum, and FIG. 4C is the switching signal when the duty ratio of the high level signal is the minimum. FIG. 7D is a voltage waveform diagram of the control signals S2 and S3 when the duty ratio of the high level signal in the switching signal S1 is minimum.

FIG. 4 is a circuit diagram of a power supply device 31 according to another embodiment of the present invention.

5A and 5B are voltage waveforms and the like of each part for explaining the operation of the power supply device 1 when the duty ratio of the high level signal in the switching signal S1 is minimum, and FIG. 5A is a voltage waveform diagram of the switching signal S1. , (B) show the control signal S2
(C) is a voltage waveform diagram of the control signal S3,
(D) shows the current I1 flowing through the primary winding 2a of the transformer 2,
Ie is a current waveform diagram, (e) is a current waveform diagram of the current I2 flowing through the secondary winding 2b, (f) is a current waveform diagram of the currents I3 and I4 flowing when charging and discharging the capacitor 8, and (g) is a current waveform diagram. FE
A voltage waveform diagram of a voltage VDS between the source and the drain of T4,
(H) is a current waveform diagram of the currents I11 and I15 in the conventional power supply device 41, and (i) is an FE in the conventional power supply device 41.
A voltage waveform diagram of a voltage VDS between the source and the drain of T4,
(J) is a current waveform diagram of currents I13 and I14 in the conventional power supply device 41.

FIG. 6 is a circuit diagram of a conventional power supply device 41.

7A and 7B are voltage waveform diagrams and the like of various parts of a conventional power supply device 41, wherein FIG. 7A is a voltage waveform diagram of a switching signal S11, FIG. 7B is a voltage waveform diagram of a signal S12, and FIG. The current waveform diagram of the currents I11 and I15 flowing through the secondary winding 2a, the current waveform diagram of the current I12 flowing through the secondary winding 2b, and the current waveform of the currents I13 and I14 flowing when charging and discharging the capacitor 8 are shown in FIG. FIG.

8A and 8B are voltage waveforms and the like of each section for explaining the operation of the conventional power supply device 41 when the duty ratio of the high level signal in the switching signal S11 is minimum, and FIG. 8A shows the voltage of the switching signal S11. Waveform diagram,
(B) is a voltage waveform diagram of the signal S12, and (c) is a primary winding 2a.
And (d) are current waveform diagrams of currents I13 and I14 flowing when the capacitor 8 is charged and discharged.

9A and 9B are current waveform diagrams and the like of respective parts in a power supply device based on the conventional PFM method, and FIG. 9A illustrates a primary winding in a transformer when an input DC voltage is an allowable minimum voltage and a load current is a maximum. Current waveform diagram of flowing current I21, (b)
Is a current waveform diagram of the output current I22 flowing through the secondary winding of the transformer when the input DC voltage is the minimum allowable voltage and the load current is the maximum, and FIG. The current waveform diagram of the current I21 flowing through the primary winding in the transformer when the load current is the minimum, and (b) shows the secondary winding in the transformer when the input DC voltage is the maximum allowable voltage and the load current is the minimum. FIG. 9 is a current waveform diagram of a flowing output current I22.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Power supply device 2 Transformer 2a Primary winding 2b Secondary winding 4 FET 5 FET 6 Switching control circuit 8 Capacitor 9 Capacitor 14 Control signal generation circuit 31 Power supply device 32 Transformer 32a Primary winding 32b Secondary winding 33 FET

Claims (4)

[Claims] 1. A first switching element which is PWM-controlled according to a switching signal to switch an input DC through a primary winding of a transformer, and a first capacitor equivalently connected in parallel to the first switching element And a second capacitor, and a second switching element that is controlled to an on state when the first switching element is in an off state, and controls the first switching element to an on state by controlling the first switching element to an on state. A first switching operation for storing energy in a transformer, and a DC voltage is generated on the secondary winding side of the transformer by an output current based on the stored energy of the transformer by controlling the first switching element to an off state. And charges the second capacitor, and turns on the second switching element. A second switching operation for lowering the voltage between the terminals of the first capacitor by controlling the drainage of the regenerative current from the second capacitor and controlling the second switching element to an OFF state alternately. A power supply device for performing, in one cycle of the switching signal, an off-state invariable period for always controlling the first switching element to be in an off-state, and the second period in the first half of the off-state invariable period.
A power supply device, wherein the switching element is controlled to be in an ON state. 2. The power supply device according to claim 1, wherein the first half period and the second half period of the off-state invariable period are controlled to a fixed time. 3. The power supply device according to claim 1, wherein the off-state invariable period is provided in a first half of an on-state control period of the switching signal. 4. A first control signal for controlling the first switching element to be turned on and a second control signal for controlling the second switching element to be turned on are based on the switching signal. And a control signal generating circuit for generating the control signal.
The power supply device according to any one of the above.