JPH11213307A - Magnetic disk device and thermal asperity cancelling method applied to this device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To remove a noise component included in a reproduced signal by a head regardless of a variance in characteristics of an MR element pair of the DSMR(dual stripe magneto-resistive) head in the case of the occurrence of TA(thermal asperity) or the like. SOLUTION: Signals reproduced by MR(magneto-resistive) elements MR1 and MR2 of a DSMR head 1-i (i=0,1) are amplified by variable gain amplifiers 21-1 and 21-2 in a head channel 2, and both of these outputs are amplified by a differential amplifier 22 and are outputted to a read channel 3. If a noise higher than a reference level is included in the signal outputted to the read channel 3, the occurrence of TA is detected by a TA detection circuit 4. If the signal outputted to the read channel 3 cannot be correctly decoded at this time, a CPU 6 performs individual gain switching operation of amplifiers 21-1 and 21-2 on the condition of at least TA detection during the read retry processing while changing the combination of gains up to all combinations till correct read is performed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a magnetic disk drive using a double stripe magnetoresistive head having a pair of MR elements for reproducing data from a disk, and a thermal asperity canceling method applied to the magnetic disk drive.

[0002]

2. Description of the Related Art In recent years, in order to realize a high recording density (high capacity) of a magnetic disk drive, a magnetic resistance (Magneto-Resistant) has been developed.
Magnetic disk devices employing read-only (playback) heads called sistive (MR) heads are increasing. However, in a magnetic disk device using a magnetoresistive head, when a minute projection is present on the disk surface, the reproduction waveform (read signal waveform) is disturbed by heat generated by the head coming into contact (collision) with the projection. That is, the reproduced waveform is D
A thermal asperity (Thermal Asperit) in which the baseline (the center line of the amplitude of the reproduced waveform) shifts in a C-like manner (a change in time of about 1 to 2 μs and a low frequency) shifts.
y; TA), there is a problem that causes a read error and the like.

[0003] Japanese Patent Application Laid-Open No. 9-231505 discloses a dual stripe magnetoresistive (hereinafter referred to as DSMR) head having a pair of magnetoresistive elements (MR elements). D
A technique for removing a low-frequency fluctuation signal (noise) caused by the occurrence of TA included in a signal read from the SMR head by a differential amplifier and a technique for detecting the occurrence of TA are described. According to this technique (prior art), a fluctuation signal caused by the occurrence of TA appears as an in-phase signal. Therefore, the TA signal included in the signal (read signal) read from the DSMR head is used due to the common-mode removal characteristic of the differential amplifier. A component (noise component) can be attenuated.

[0004]

As described above, the DS
In a magnetic disk drive using an MR head, TA
The common-mode noise component (fluctuation signal) resulting from the generation is canceled to some extent by the differential output of a pair (two layers) of MR elements (MR films). Compared to the case using the MR head of
The effect of A generation is small.

However, a pair of M in the DSMR head
Unless the magnetoresistance characteristics (temperature rise characteristics, heat radiation characteristics) of the R elements are the same, there will be a difference in the amount of baseline shift due to TA. Therefore, the prior art described in the above publication has a problem in that not all noise components are canceled, and there is a possibility that a read error or the like remains.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object the ability to independently switch and set the gain between the outputs of a pair of MR elements forming a DSMR head and a differential amplifier. A head channel provided with a pair of variable gain amplifiers, and at least a thermal asperity (T
At the time of the occurrence of A), each gain of the pair of variable gain amplifiers is individually set so that even if there is a variation in characteristics between the corresponding pair of MR elements, each of the pair of variable gain amplifiers has a characteristic. A magnetic disk drive capable of making the amounts of noise components such as baseline fluctuations included in the reproduction signal substantially equal, and thereby removing the noise component from the differential output of the pair of MR elements for each reproduction signal. An object of the present invention is to provide a thermal asperity canceling method applied to the apparatus.

[0007]

According to a first aspect of the present invention, there is provided a magnetic disk drive for reproducing data from a disk.
In a magnetic disk drive using a DSMR head (double stripe magnetoresistive head) having a pair of MR elements,
A pair of variable gain amplifiers each capable of individually setting a plurality of levels of gain for amplifying signals reproduced by the pair of MR elements of the DSMR head, and both output signals of the pair of variable gain amplifiers Channel based on a signal reproduced by a pair of MR elements of the DSMR head and a head channel having a differential amplifier
A TA detection circuit for detecting A (thermal asperity) generation;
According to the detection of TA occurrence by the TA detection circuit,
Gain switching control means for individually switching the gains of the pair of variable gain amplifiers.

In such a configuration, when TA occurs, the gain switching control means individually switches the gains of a pair of variable gain amplifiers corresponding to the pair of MR elements of the DSMR head, whereby the 1 It is possible to eliminate the difference in the amount of the TA component (noise component) caused by the variation in the magnetoresistive characteristics of the paired MR elements. As a result, the TA component can be canceled by the common-mode removal characteristic of the differential amplifier, and the amount of the baseline shift of the read signal can be minimized.

Therefore, if the gain switching by the above gain switching control means is performed at least on the condition that the TA detection circuit detects the occurrence of TA at the time of the retry processing when a read error occurs, the retry succeeds and the read error is detected. It can be eliminated. In addition, if the read error is not eliminated by retrying (normal retry) by changing the set values of various parameters of the read channel (such as the cut-off frequency of the low-pass filter), the gain should be further passed through the high-pass filter. In the case where the read error is not eliminated by retry (TA retry) taking measures such as reducing the low frequency noise component (TA component), the method may be performed.

By the way, a structure in which a DSMR head is arranged on each surface side of a disk, and a structure in which a plurality of disks are stacked and provided, and a DSMR head is arranged on at least one surface side of each disk. In a magnetic disk drive, a pair of variable gain amplifiers (and differential amplifiers) is provided for each DSMR head. In this case, even if gain switching is performed only for a pair of variable gain amplifiers corresponding to the DSMR head on the disk surface side to be read, gain switching is performed for only one pair of variable gain amplifiers for each DSMR head. You can go.

In the configuration of the magnetic disk drive according to the first aspect described above, the TA is changed only by one gain switching.
The optimum gain at which the component is canceled is not always set, and in the worst case, the gain may be switched for all combinations of gains.

Therefore, a magnetic disk drive according to a second aspect of the present invention switches an arbitrary gain within a certain range, instead of the variable gain amplifier (that is, an amplifier whose gain can be switched in a plurality of stages). In addition to using a variable gain amplifier that can be set, a bias voltage measuring circuit for measuring the bias voltage of each of the pair of MR elements of the DSMR head is newly provided, and the bias voltage measuring circuit is used in advance to measure the bias voltage. The pair of M of the DSMR head
The bias voltage of each R element is measured in advance, and the pair of gain variable amplifiers corresponding to the DSMR head at a gain ratio determined by the reciprocal of the measured bias voltage ratio in response to the detection of the TA occurrence. The gain switching control means for individually setting the gains is provided.

In such a configuration, the gain of a pair of variable gain amplifiers corresponding to the DSMR head is determined by a gain ratio determined in advance by the reciprocal of the bias voltage ratio of the pair of MR elements of the DSMR head. Is set, it is possible to operate in a state where the influence of noise due to TA is minimized. In particular, by performing the gain setting in the retry process at the time of a read error accompanying the occurrence of TA, the operation of switching the gain of the pair of variable gain amplifiers as in the magnetic disk device according to the first aspect is performed. The retry time can be shortened rather than repeatedly obtaining a gain that can eliminate the influence of noise.

Here, the measured bias voltage of each of the pair of MR elements of the DSMR head, the ratio of the bias voltage, the gain ratio determined by the reciprocal of the bias voltage, or the above-described 1 determined by the gain ratio. If a configuration in which the gain of the pair of variable gain amplifiers is stored in the non-volatile storage means is applied, it can be easily reused.

The gain of the pair of variable gain amplifiers may always be set at a gain ratio determined by the reciprocal of the ratio of the measured bias voltages of the pair of MR elements. In this case, operation is possible in a state where the TA component can always be canceled.

Incidentally, since the characteristics of the DSMR head, specifically, the magnetoresistive characteristics of the pair of MR elements change with time, the above-mentioned bias voltage also changes. Accordingly, the above-described bias voltage measurement is periodically performed to acquire the latest bias voltage at every power-on of the magnetic disk device or at a predetermined number of startups, and is determined from the ratio of the latest bias voltage. The gain may be switched (gain setting) using the latest gain ratio.

The characteristics of the DSMR head are as follows.
Generally, the heads are different. Therefore, in a magnetic disk drive having a plurality of DSMR heads, the bias voltage of a pair of MR elements is measured for each DSMR head, and the bias voltage, the ratio of the bias voltage, or the reciprocal of the bias voltage is measured. Determined gain ratio,
Alternatively, the configuration may be such that the gain of a pair of variable gain amplifiers determined by the gain ratio is stored in the non-volatile storage means for each DSMR head, and can be selectively used according to the selected head.

[0018]

Embodiments of the present invention will be described below with reference to the drawings. [First Embodiment] FIG. 1 is a block diagram showing a schematic configuration of a magnetic disk drive having a TA detection / cancellation function according to a first embodiment of the present invention.

In FIG. 1, DSMR heads 1-0, 1-1
Are read-only heads, each of which has a pair of MR elements MR
1 and MR2. Here, a magnetic disk device having a single disk is assumed, and a DSMR head 1-0 is provided corresponding to one surface of a disk (magnetic recording medium) not shown, and a DSMR head 1-1 is provided. Is provided corresponding to the other surface of the disk.

As is well known, the DSMR head 1-i (i = 0, 1) utilizes the fact that the resistance value changes due to a change in an external magnetic field, and the above-mentioned 1 for reading data recorded on a disk. A pair of MR elements MR1 and MR2 are connected so as to output differentially. DSMR head 1-i
Of magnetic recording data by the MR elements MR1 and MR1
2 is supplied with a constant sense current (bias current) IB, thereby detecting data recorded on the disk as a voltage change across the MR elements MR1 and MR2 due to a change in the magnetic field. Note that, in FIG.
The recording head provided as a pair with the head 1-i is omitted.

One end of each of the MR elements MR1 and MR2 is connected to a common terminal (COM), and the other end is connected to the input of a variable gain amplifier 21-1 or 21-2. The gains α1 and α2 of the amplifiers 21-1 and 21-2 are switched and set by control (head channel control) from the CPU 6 described later. Here, the amplifiers 21-1 and 21-2
The gains α1 and α2 can be switched from a plurality of predetermined values, for example, two values. Specifically, the gains α1 and α2 are set by gain switching setting bits b1 and b2 from the CPU 6. You.

The outputs of the amplifiers 21-1 and 21-2 are connected to the respective inputs of the differential amplifier 22. Head selection circuit 23
Selects any one of the outputs of the differential amplifiers 22 corresponding to the DSMR heads 1-0 and 1-1 according to a head selection signal from the CPU 6 described later.

The head channel 2 includes the variable gain amplifiers 21-1 and 21-2, a differential amplifier 22, and a head selection circuit 23. The feature of this head channel 2 is that
While amplifying the analog output (analog reproduction output) read from the disk by the DSMR heads 1-1 and 1-2, a write signal (write current) is supplied to the recording head in accordance with write data sent from a write channel (not shown). In addition to the well-known function of outputting, the variable gain amplifier 21-1,
The MR element MR
The present invention has a novel function of switching and setting the gains α1 and α2 in a plurality of stages (here, two stages) for each of the MR1 and MR2. In this embodiment, the head channel 2 is formed into an integrated circuit (IC).

The read channel 3 is connected to the head channel 2. The read channel 3 is subjected to the differential processing by the head channel 2 (from the head selection circuit 23).
An analog output (read signal) is input, and a decoding function for performing signal processing necessary for data reproduction operation to, for example, an NRZ code, and a processing for extracting data (burst data) necessary for servo processing such as head positioning control are performed. It has a signal processing function. The read channel 3 has an A for amplifying a read signal from the head channel 2 to a constant amplitude.
GC (automatic gain control) amplifier, low-pass filter (LP) for removing high-frequency noise contained in read signals
F), a high-pass filter (HPF) for removing low-frequency noise included in the read signal, a PLL (phase locked loop) circuit for generating a sampling clock (both not shown), and the like. In the present embodiment, the HP
F is turned off and not used during a normal read operation, and is turned on (used) only in the case of a TA retry (first TA retry) described later. The disk 11
A write channel having an encoding function for performing signal processing necessary for recording data into the data channel is omitted.

The TA detection circuit 4 monitors the amplitude of the read signal from the head channel 2 input by the read channel 3 to generate a TA signal including a fluctuation signal (noise component) of a specified level or more. And outputs a TA detection signal 41 indicating that to the CPU 6. As the TA detection circuit 4, a thermal asperity detector as described in JP-A-9-231505 can be used.

In this embodiment, the read channel 3,
The write channel and the TA detection circuit 4 constitute a read / write circuit (read / write IC) formed as an IC.

The CPU 6 is, for example, a one-chip microprocessor. This CPU 6 has a ROM (Read Onl
The main controller controls each unit in the magnetic disk device according to the control program 70 stored in the y memory 7. When a read error occurs, the CPU 6 performs a retry of a read operation by changing a first read condition described later (hereinafter, referred to as a normal retry), fails in the normal retry, and detects a TA by the TA detection circuit 4. If so, a TA retry is performed. The TA retry includes a first TA retry in which a second read condition described later is changed and the read operation is retried, and a gain variable amplifier 21-1 or 21.
There is a second TA retry for changing the gain α1, α2 (third read condition) of −2 and retrying the read operation.
Here, if reading cannot be performed normally even in the first TA retry, the second TA retry is performed. This second
Change operation of the third read condition in the TA retry of
That is, the gain switching operation is repeatedly performed until reading can be performed normally. However, if reading cannot be performed correctly even when all of the switchable gain combinations are performed, an error is terminated. If the data can be read normally, a replacement process is performed in which a replacement sector is assigned to a corresponding sector, that is, a defective sector in which a TA has occurred, and the read data is written in the replacement sector (reassignment process).
I do.

An HDC (disk controller) 8 is connected to the CPU 6. The HDC 8 controls communication of commands and data with a host device (not shown), and controls data communication with the read channel 3 (at the time of reading) or the write channel (at the time of writing). The HDC 8 has an ECC function of performing an ECC (error detection and correction) process on the read data decoded by the read channel 3. The HDC 8 is connected to a buffer memory 9 (buffer RAM) 9 configured by, for example, a RAM or the like, in which read / write data is stored in a cache system.

Next, the read operation of the configuration of FIG. 1 will be described with reference to the flowchart of FIG. First, it is assumed that a read command is given from the host device to the disk device of FIG. 1 and a disk read specified by the read command has been performed (step 201). If the data cannot be read normally (step 202), the CPU 6
Is the first read condition, DSMR head 1-i (i
Is 0 or 1) an offset (a deviation amount of a target position from a track center) for positioning control, a cutoff frequency of a low-pass filter (provided in the read channel 3), and a bit length (correctable by ECC processing) A normal retry of switching and setting the burst value and retrying the read operation is performed (step 203).

If the normal retry fails (step 204), the CPU 6 determines whether the TA detection circuit 4 has detected the occurrence of a TA (step 205). The determination here is performed as follows.

First, a read signal read from the disk by the DSMR head 1-i is input to the TA detection circuit
The signal is subjected to differential processing in the head channel 2 and further amplified and input by the AGC amplifier in the read channel 3. T
When the amplitude of the read signal exceeds a predetermined threshold, the A detection circuit 4 determines that a TA has occurred and outputs a valid TA detection signal 41 to the CPU 6.
Therefore, the CPU 6 determines whether or not a TA has occurred, based on whether or not a valid TA detection signal 41 is output from the TA detection circuit 4 (step 205).

In this embodiment, since the DSMR head 1-i is used as the reproducing head, the low-frequency common-mode noise component (fluctuation signal) caused by the occurrence of the TA has a pair (two layers).
Is canceled to some extent by the differential outputs of the MR elements MR1 and MR2. However, the MR elements MR1, M
If the magnetoresistive characteristics of R2 are different, as shown in FIG. 3, there is a difference in the amount of the baseline shift caused by TA between MR elements MR1 and MR2, and therefore, as shown in FIG. All of the noise components are not canceled by the differential output (MR1-MR2), but may be detected by the TA detection circuit 4 as the occurrence of TA as described above.

When the CPU 6 determines that TA has occurred, the CPU 6 turns on the HPF in the read channel 3 in order to reduce low frequency noise components included in the read signal. PLL
A first TA retry for holding the circuit state and retrying the read operation in that state is performed (steps 206 to 2).
08).

If the first TA retry fails (step 209), the CPU 6 performs the second TA retry directly related to the present invention as follows. First CPU
Reference numeral 6 denotes variable gain amplifiers 21-1 and 21 in the head channel 2 for amplifying the reproduction output by the MR elements MR1 and MR2.
-2 gain α1, α2 gain switching setting bit b
Switching setting is performed by using 1 and b2 (step 210).
Here, the gain αj of the amplifier 21-j (j = 1, 2)
Is set to the first gain value α when the gain switching setting bit bj is logic “0”, and to the second gain value β when the gain switching setting bit bj is logic “1”. In the initial state, the gains α1 and α2 of the amplifiers 21-1 and 21-2 are both set to α.

When the gains α1 and α2 of the amplifiers 21-1 and 21-2 are switched by the gain switching setting bits b1 and b2, the CPU 6 retries the read operation. Assuming that the reproduction outputs (head outputs) of the MR elements MR1 and MR2 of the DSMR head 1-i are vMR1 and vMR2, the outputs VMR1 and VMR2 of the gain variable amplifiers 21-1 and 21-2 having gains α1 and α2 are as follows. become that way.

VMR1 = α1 × vMR1 VMR2 = α2 × vMR2 As is apparent from the above equation, the MR elements MR1 and MR2
Output differences vMR1 and vMR2 due to the influence of TA, that is, in-phase noise components (baseline shift)
Variable gain amplifiers 21-1 and 21-2 even if there is a difference in
If the gains α1 and α2 are switched, it is possible to set the gains to almost the same level. If the amount of the common-mode noise component (baseline shift) can be made substantially the same, the noise component is sufficiently attenuated due to the common-mode removal characteristic of the differential amplifier 22. In this case, the TA is canceled (canceled), and the possibility of normal reading is increased.

FIG. 4 shows the state of FIG.
As a result of switching only the gain 1-2 (gain on the MR element MR2 side) α2 to a larger value, the differential amplifier 2
2 output, that is, the differential outputs of MR1 and MR2 (MR1-M
R2) shows that the noise component is sufficiently attenuated.

If the data can be read normally by the above retry (step 211), the CPU 6 assigns a substitute sector to the corresponding sector, that is, the defective sector in which the TA is detected, and reads the data read from the substitute sector. Is performed (step 212). Then, the CPU 6 sets the first read condition (offset, cut-off frequency of low-pass filter, burst value) switched in step 204 (normal retry), step 20
6 to 208 (first TA retry), the second read condition (AGC amplifier state, HPF state,
The state of the PLL circuit), the third read condition (the amplifier 21-) switched in step 210 (second retry).
The gains α1, α2 of 1, 21-2) are returned to the initial state, and the read operation (execution of the read command) is completed.

On the other hand, if the data cannot be read normally even in the second retry (step 211), the CPU
6 checks whether or not the switching settings of the gains α1 and α2 for the amplifiers 21-1 and 21-2 have been performed for all combinations (step 213). Here, from the initial state α1 = α2 = α (b1 = b2 = 0), α1 = α, α2
= Β (b1 = 0, b2 = 1) and further to the next combination α1 = β, α2 = α (b1 = 1, b2 = 0), the CPU 6 Assuming that the combination of the gains α1 and α2 for which the switching has not been set remains, the process returns to step 210 to switch and set the gain to the next combination of α1 and α2, and retry the read operation.

As described above, if the read is not correctly performed even if the switching setting of the gains α1 and α2 is performed for all combinations (steps 211 and 213),
The CPU 6 determines a data error and notifies a warning to the host device (step 214). And CPU6
Returns the first to third read conditions to the initial state and ends the read operation (execution of the read command).

In the first embodiment described above,
Although the case where the gain switching of the variable gain amplifiers 21-1 and 21-2 is performed at the time of the second TA retry has been described, it may be performed at the time of the normal retry or the first TA retry. When performing at the time of the first TA retry,
The second TA retry becomes unnecessary. Further, the gain may be switched so that the TA component is canceled only by detecting the occurrence of TA. [Second Embodiment] FIG. 5 is a block diagram showing a schematic configuration of a magnetic disk drive having a TA detecting / cancelling function according to a second embodiment of the present invention. The description is omitted here. In FIG. 5, the system of the DSMR head 1-1 is omitted for convenience of drawing.

The first difference between the configuration in FIG. 5 and the configuration in FIG. 1 is that a head channel 20 is provided instead of the head channel 2 in FIG. In this head channel 20, variable gain amplifiers 21-1 and 21-2 in FIG.
That is, instead of the variable gain amplifiers 21-1 and 21-2 which can be digitally switched and set to any of a plurality of predetermined types (two types in the first embodiment), a fixed range Variable gain amplifier 210- which can be switched to an arbitrary gain value in an analog manner
1, 210-2 are used.

The head channel 20 includes an amplifier 210-
D / A (digital / analog) converter 2 for converting gain switching control data D1 and D2 of a plurality of bits for designating the gain of 1, 210-2 into analog data
11-1 and 211-2 are newly provided. This D / A
The outputs of the converters 211-1 and 211-2 are supplied to the amplifiers 210-1 and 210-2 as gain switching setting signals. The head channel 20 is further provided with a bias voltage measuring circuit 212 for measuring the bias voltages VMR1 and VMR2 of the MR elements MR1 and MR2. The bias voltage measuring circuit 212 includes, for example, the head selecting circuit 23
The two outputs of the differential amplifier 22 selected by the above are measured. After the outputs are half-wave rectified by a half-wave rectifier, the peak-hold circuit is peak-held, and the peak-hold value is A / D (analog / digital). ) A
This is realized by / D conversion. Note that the bias voltage measurement circuit 212 can be provided on the read channel 3 side.

The second difference between the configuration in FIG. 5 and the configuration in FIG. 1 is that, for example, an E as a rewritable nonvolatile storage device is used.
EPROM (Electrically Erasable and Programmable
Read Only Memory) 10 is newly provided,
A control program 700 is stored in the ROM 7 instead of the control program 70 in FIG. EEP
The ROM 10 has an area for storing a gain ratio α′2 / α′1 described later for each MR head 1-i (i = 0, 1). In addition, the control program 700
The bias voltage of each of the MR elements MR1 and MR2 of the SMR head 1-i is measured, and for example, a gain ratio determined by the reciprocal of the bias voltage ratio is stored in the EEPROM 10, and the gain ratio is determined at the time of the second TA retry. A processing routine for setting the gain of the variable gain amplifiers 210-1 and 210-2 corresponding to (the gain ratio specific to the selected DSMR head 1-i) is included.

Next, the operation of the configuration shown in FIG. 5 will be described. First, the optimum gain ratio α′2 // of the MR elements MR1 and MR2
The processing for determining α′1 will be described with reference to the flowchart in FIG.

In this embodiment, each time the power of the magnetic disk device is turned on, the CPU 6 performs the following processing according to the control program 700 in the initialization processing performed at that time.

First, the CPU 6 controls the head channel 20 (by controlling the head selection circuit 23 therein) to obtain the DSMR head 1-i.
(I is 0 or 1), and a constant bias current (sense current) IB is supplied to the MR elements MR1 and MR2 of the DSMR head 1-i by the head channel 20.
The bias voltages of the MR elements MR1 and MR2 (the corresponding output voltages of the variable gain amplifiers 210-1 and 210-2 observed at the output side of the head selection circuit 23) VMR1 and VMR
2 is measured by the bias voltage measuring circuit 212 (steps 601 and 602). These bias voltages VMR1, VMR
MR2 sets the resistance values of MR elements MR1 and MR2 to RMR1 and RMR1.
MR2, gain α of variable gain amplifiers 210-1 and 210-2
Assuming that 1, α2 is the initial gain α, the initial gain is expressed as follows.

[0048] Next, the CPU 6 compares the ratio of the bias voltages VMR1 and VMR2 measured by the bias voltage measurement circuit 212 with the MR element M
The optimum gain ratio α′2 / α′1 of R2 and MR1 is determined and stored in a predetermined area of the EEPROM 10.
Old gain ratio for SMR head 1-i (initial value is 1)
Is updated to the obtained latest gain ratio (step 60).
3,604). The gain ratio α′2 / α′1 is determined by the resistance values RMR1 and RMR1 of the MR elements MR1 and MR2, as shown in the following equation.
It matches the ratio of RMR2.

[0049] As described above, in the present embodiment, the above processing is performed in the initialization processing when the power of the magnetic disk device is turned on. The reason is that the latest resistance values RMR1 and RMR2 are always obtained in consideration of the aging of the resistance values RMR1 and RMR2 of the MR elements MR1 and MR2 of each DSMR head 1-i. The above operation may be performed every fixed number of activations. In addition, the above operation may be performed at the stage of manufacturing the magnetic disk device. However, in this case, it is assumed that the resistance values RMR1 and RMR2 of the MR elements MR1 and MR2 do not change with time.

The CPU 6 calculates the gain ratio α'2 / α '
1 is determined and stored in the EEPROM 10 (steps 601 to 604).
-i is repeatedly executed (step 605). The reason is that the resistance values RMR1 and RMR of the MR elements MR1 and MR2.
This is because the ratio of 2 generally differs for each DSMR head 1-i.

Next, the read operation of the configuration of FIG. 5 will be described with reference to the flowchart of FIG. The processing in steps 701 to 709 is the same as the processing in steps 201 to 209 in the first embodiment, and a description thereof will not be repeated.

First, in reading using the DSMR head 1-0, normal reading cannot be performed because TA has occurred.
Even if a normal retry and further a first TA retry are performed, it is assumed that the data cannot be read correctly (steps 701 to 701).
709). In this case, the CPU 6 performs the second T described below.
Perform A retry.

First, when TA occurs, the resistance values of the MR elements MR1 and MR2 of the DSMR head 1-0 are RMR1 and RMR.
Changes from MR2. The MR elements MR1 and MR2 at this time
Are resistance values of β1 RMR1 and β2 RMR2, the variable gain amplifier 210-1 corresponding to the bias voltages of the MR elements MR1 and MR2 of the DSMR head 1-0 measured by the bias voltage measurement circuit 212 in the head channel 20. , 21
Output voltages 0-2) V'MR1 and V'MR2 are as follows.

V'MR1 = β1 RMR1 × IB × α V′MR2 = β2 RMR2 × IB × α Here, when β1 RMR1 and β2 RMR2 are significantly different, the noise component is also affected by the common mode removal characteristic of the differential amplifier 22. It may not be possible to read normally due to the normal retry as described above, or even the first TA retry, without being sufficiently attenuated.

Then, the CPU 6 determines the gain ratio α'2 / α'1 for the DSMR head 1-0 from the EEPROM 10.
And the D / A converter 211-1 has a gain α′1
Is output to the D / A converter 211-2 by outputting the gain switching control data D2 representing the gain α'2, whereby the gain variable amplifier 210- is output.
1, the gain of 210-2 is changed (step 710).
In the present embodiment, while maintaining the gain ratio α′2 / α′1, the value of α′2 is set so that the value of α′1 matches the initial gain α of the gain variable amplifier 210-1. I have.
Therefore, the switching of the gain of the variable gain amplifier 210-1 by the data D1 is not necessarily performed. Of course, while maintaining the gain ratio α′2 / α′1,
The value of α′2 is the initial gain α of the variable gain amplifier 210-2.
The value of α′1 may be set so as to match

As a result of the above gain changing process, the bias voltages of the MR elements MR1 and MR2 of the DSMR head 1-0 (the corresponding output voltages of the variable gain amplifiers 21-10 and 210-2) V'MR1 and V'MR2. Is as follows.

V′MR1 = β1 RMR1 × IB × α′1 V′MR2 = β2 RMR2 × IB × α′2 where α′2 / α′1 = RMR1 / RMR2 and β
1 and β2 are almost equal. Therefore, V 'MR1 and V'
It is possible to make MR2 substantially equal. in this case,
The noise component can be sufficiently attenuated by the common-mode removal characteristic of the differential amplifier 22 to eliminate TA and increase the possibility of normal reading. Moreover, the MR elements MR1, MR
Since an appropriate gain corresponding to the ratio of the resistance values of 2 can be set at one time, the gain can be eliminated by repeating the gain switching as in the first embodiment to eliminate the effect of noise. The time required for the TA retry can be shortened.

As a result of the above, when the data can be read normally (step 711), the CPU 6 performs a reassignment process of allocating a substitute sector to the corresponding sector and writing the read data to the substitute sector (step 71).
2).

In the second embodiment described above,
The case where the gain setting at the gain ratio α′2 / α′1 determined in advance is performed at the time of the second TA retry has been described, but may be performed at the time of the normal retry or the first TA retry. When performing at the time of the first TA retry, the second TA retry becomes unnecessary. Also, if TA occurrence is detected even without a read error,
In order to cancel the TA component, the gain ratio α′2
The gain may be set at / α′1.
In addition to this, the gain ratio of the variable gain amplifiers 210-1 and 210-2 is constantly set to (the latest) α′1 / α′2, and the amplifier is always operated in a state where the TA component can be canceled. It does not matter.

In the second embodiment, the gain ratio α '
Although 2 / α′1 has been described as being stored in the EEPROM 10, the bias voltages VMR1 and VMR2 and the bias voltage ratio VMR1 / VMR2 (= resistor) used to calculate the gain ratio α′2 / α′1 Ratio RMR1 / RMR2) or the variable gain amplifier 2 determined by the gain ratio α′2 / α′1.
The gains of 10-1 and 210-2 may be stored.

[0061]

As described in detail above, according to the present invention, T
When A or the like occurs, a pair of Ms forming the DSMR head
The gains of a pair of variable gain amplifiers provided between the output of the R element and the differential amplifier are individually switched and set. The difference in the amount of the TA component (noise component) caused by the variation of the differential amplifier can be eliminated, and the TA component can be canceled by the common-mode removal characteristic of the differential amplifier.

Further, according to the present invention, the bias voltage of each of a pair of MR elements forming the DSMR head is measured in advance, and when a TA or the like occurs, particularly when a read retry is performed due to the TA, the pair of MR elements is measured. Since the gain of a pair of variable gain amplifiers provided between the output of the MR element and the differential amplifier is switched so as to have a gain ratio determined by the reciprocal of the previously measured bias voltage ratio, Even if there are variations in the characteristics of the MR elements, the difference in the amount of the TA component (noise component) due to the variations in the characteristics can be eliminated in a short time. The TA component can be canceled.

Further, according to the present invention, the TA component can always be canceled by setting the gain ratio of the pair of gain variable amplifiers to a gain ratio that is constantly determined by the reciprocal of the bias voltage ratio. It can be operated in any state.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a schematic configuration of a magnetic disk drive having a TA detection / cancellation function according to a first embodiment of the present invention.

FIG. 2 is a flowchart for explaining an operation at the time of reading in the embodiment.

FIG. 3 is a diagram showing MR elements MR1 and MR2 according to the first embodiment;
Are different in MR characteristics between MR1 and MR2.
FIG. 9 is a waveform diagram showing an example in which a noise component is not sufficiently canceled even by the differential outputs (MR1-MR2) of MR1 and MR2 as a result of a difference in the amount of baseline shift caused by A.

4 is a diagram showing the gain (amplifier 21-2) on the MR2 side in the state of FIG.
Gain), MR1 and MR caused by TA
FIG. 9 is a waveform chart showing an example in which the difference in the baseline shift amount between the two is eliminated and the noise component is sufficiently canceled by the differential outputs (MR1-MR2) of MR1 and MR2.

FIG. 5 is a block diagram showing a schematic configuration of a magnetic disk drive having a TA detection / cancellation function according to a second embodiment of the present invention.

FIG. 6 is a diagram showing the MR elements MR2 and MR1 according to the first embodiment;
Is a flowchart for explaining a process for determining the optimum gain ratio α′2 / α′1 of FIG.

FIG. 7 is an exemplary flowchart for explaining the operation at the time of reading in the embodiment.

[Explanation of symbols]

1-0, 1-1 ... DSMR head (double stripe magnetoresistive head) 2,20 ... Head channel 3 ... Read channel 4 ... TA detection circuit (thermal asperity detection circuit) 6 ... CPU (gain switching control means) 7 ... ROM 8 HDC 10 EEPROM (non-volatile storage means) 21-1, 21-2, 210-1, 210-2 Variable gain amplifier 22 Differential amplifier (differential amplifier) 23 Head selection circuit 70, 700 ... Control programs 211-1 and 211-2 ... D / A converters 212 ... Bias voltage measurement circuits

Claims (9)

[Claims] 1. A pair of MRs for reproducing data from a disk
In a magnetic disk drive using a double-stripe magnetoresistive head having elements, gains for individually amplifying signals reproduced by the pair of MR elements of the double-stripe magnetoresistive head are individually switched in a plurality of stages. A head channel having a pair of settable variable gain amplifiers, a differential amplifier for differentially amplifying both output signals of the pair of variable gain amplifiers, and the pair of MR elements of the double stripe magnetoresistive head A thermal asperity detection circuit for detecting thermal asperity occurrence based on the signal reproduced by the above, and gain switching for individually switching gains of the pair of gain variable amplifiers according to thermal asperity occurrence detection by the thermal asperity detection circuit. A magnetic disk drive comprising a control unit. 2. A pair of MRs for reproducing data from a disk.
In a magnetic disk drive using a double-stripe magnetoresistive head having elements, gains for individually amplifying signals reproduced by the pair of MR elements of the double-stripe magnetoresistive head are individually switched in a plurality of stages. A head channel having a pair of settable variable gain amplifiers, a differential amplifier for differentially amplifying both output signals of the pair of variable gain amplifiers, and the pair of MR elements of the double stripe magnetoresistive head A thermal asperity detection circuit for detecting the occurrence of thermal asperity based on the signal reproduced by the method, and at the time of retry processing when a read error occurs, the thermal asperity detection circuit detects at least the thermal asperity occurrence by the thermal asperity detection circuit. The operation of individually switching the gains of variable gain amplifiers Magnetic disk apparatus characterized by comprising a gain switching control means for repeating the upper limit on the total combined until a read error is eliminated while changing. 3. A pair of MRs for reproducing data from a disk.
In a magnetic disk drive using a double-stripe magnetoresistive head having an element, an arbitrary signal within a certain range for amplifying signals reproduced by the pair of MR elements of the double-stripe magnetoresistive head, respectively. A head channel having a pair of variable gain amplifiers that can be individually switched and set to gain, a differential amplifier for differentially amplifying both output signals of the pair of variable gain amplifiers, and the double stripe magnetoresistive A bias voltage measuring circuit for measuring a bias voltage of each of the pair of MR elements of the head; and a bias voltage of each of the pair of MR elements of the double stripe magneto-resistive head in advance using the bias voltage measuring circuit. Is measured, and the gain of the pair of variable gain amplifiers is set at a gain ratio determined by the reciprocal of the bias voltage ratio. Magnetic disk apparatus characterized by comprising a gain switching control unit that. 4. A pair of MRs for reproducing data from a disk
In a magnetic disk drive using a double-stripe magnetoresistive head having an element, an arbitrary signal within a certain range for amplifying signals reproduced by the pair of MR elements of the double-stripe magnetoresistive head, respectively. A head channel having a pair of variable gain amplifiers that can be individually switched and set to gain, a differential amplifier for differentially amplifying both output signals of the pair of variable gain amplifiers, and the double stripe magnetoresistive A bias voltage measuring circuit for measuring a bias voltage of each of the pair of MR elements of the head; and detecting a thermal asperity occurrence based on signals reproduced by the pair of MR elements of the double stripe magnetoresistive head. A thermal asperity detecting circuit, and the bias voltage measuring circuit, The bias voltage of each of the pair of MR elements is measured, and is determined by the reciprocal of the ratio of the measured bias voltage of the pair of MR elements according to the detection of the occurrence of thermal asperity by the thermal asperity detection circuit. A magnetic disk drive comprising: gain switching control means for setting a gain of the pair of variable gain amplifiers with a gain ratio. 5. A pair of MRs for reproducing data from a disk.
In a magnetic disk drive using a double-stripe magnetoresistive head having an element, an arbitrary signal within a certain range for amplifying signals reproduced by the pair of MR elements of the double-stripe magnetoresistive head, respectively. A head channel having a pair of variable gain amplifiers that can be individually switched and set to gain, a differential amplifier for differentially amplifying both output signals of the pair of variable gain amplifiers, and the double stripe magnetoresistive A bias voltage measuring circuit for measuring a bias voltage of each of the pair of MR elements of the head; and detecting a thermal asperity occurrence based on signals reproduced by the pair of MR elements of the double stripe magnetoresistive head. A thermal asperity detecting circuit, and the bias voltage measuring circuit, The bias voltage of each of the pair of MR elements is measured in advance, and at the time of retry processing when a read error occurs, at least the condition of thermal asperity detection by the thermal asperity detection circuit is set as a condition.
A magnetic disk comprising: gain switching control means for setting the gain of the pair of variable gain amplifiers at a gain ratio determined by the reciprocal of the ratio of the measured bias voltage of the pair of MR elements. apparatus. 6. The pair of M measured by the gain switching control means using the bias voltage measurement circuit.
Non-volatile memory for storing the bias voltage of each of the R elements, the ratio of the bias voltage, the gain ratio determined by the reciprocal of the bias voltage, or the gain of the pair of variable gain amplifiers determined by the gain ratio 6. The memory according to claim 3, further comprising a storage unit, wherein the gain switching control unit sets a gain of the pair of variable gain amplifiers according to information stored in the nonvolatile storage unit. The magnetic disk device according to any one of the above. 7. A method for reproducing data from a disk.
A double-stripe magnetoresistive head having a pair of MR elements; and the pair of Ms of the double-stripe magnetoresistive head.
A pair of variable gain amplifiers for individually amplifying and setting a plurality of gains for individually amplifying the signals reproduced by the R elements, and a differential amplifier for differentially amplifying both output signals of the pair of variable gain amplifiers A head channel having an amplifier; and the first channel of the double stripe magnetoresistive head.
A thermal asperity canceling method applied to a magnetic disk drive comprising: a thermal asperity detecting circuit for detecting occurrence of thermal asperity based on signals reproduced by a pair of MR elements. At the time of read retry when occurrence is detected,
A thermal asperity cancellation method characterized by repeating the operation of individually switching the gains of a pair of variable gain amplifiers while changing the combination of gains until all the combinations are successfully retried. 8. A method for reproducing data from a disk.
A double-stripe magnetoresistive head having a pair of MR elements; and the pair of Ms of the double-stripe magnetoresistive head.
A pair of variable gain amplifiers each capable of individually switching and setting an arbitrary gain within a certain range for amplifying a signal reproduced by the R element;
A thermal asperity canceling method applied to a magnetic disk drive having a head channel having a differential amplifier for differentially amplifying both output signals of a pair of variable gain amplifiers. A pair of M
A thermal asperity canceling method, wherein a bias voltage of each of the R elements is measured, and a gain of the pair of variable gain amplifiers is set at a gain ratio determined by a reciprocal of the voltage ratio. 9. A method for reproducing data from a disc.
A double-stripe magnetoresistive head having a pair of MR elements; and the pair of Ms of the double-stripe magnetoresistive head.
A pair of variable gain amplifiers each capable of individually switching and setting an arbitrary gain within a certain range for amplifying a signal reproduced by the R element;
A thermal asperity is generated based on a head channel having a differential amplifier for differentially amplifying both output signals of a pair of variable gain amplifiers and a signal reproduced by the pair of MR elements of the double stripe magnetoresistive head. A thermal asperity canceling method applied to a magnetic disk drive provided with a thermal asperity detecting circuit for detecting the pair of Ms.
The bias voltage of each of the R elements is measured, and at the time of read retry when the thermal asperity detection circuit detects the occurrence of thermal asperity, a gain determined by the reciprocal of the ratio of the measured bias voltages of the pair of MR elements is used. A thermal asperity canceling method, wherein a gain of the pair of variable gain amplifiers is set by a ratio.