JPH11205317A - Clock synchronization multiplexer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain the multiplexer that takes synchronization with high accuracy and that hardly has data lost even on occurrence of clock interruption due to a failure of a network synchronization device itself. SOLUTION: When multiplexers 20a, 20b detect interruption of a clock of a master network synchronization device 1a, a remote alarm indication RAI signal is sent to the line and other multiplexers have a network synchronization device 1b slaved. The device 1b is provided with a RAI detection circuit 7 that detects the RAI signal through the line, and a clock interrupt output circuit that sends information of the clock detected by the RAI detection circuit 7 to the slave network synchronization device 1b. The RAI detection circuit 7 receives usually no clock from the slave network synchronization device 1b, but receives the clock from the slave 1b when receiving a notice of the interruption of the clock of the master network synchronization device 1a.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for synchronizing networks in a multiplexing apparatus connected to a private network or the like.

[0002]

2. Description of the Related Art FIG. 5 is a block diagram of a conventional multiplexing apparatus, in which 1a and 1b denote network synchronizers, 2a and 2b.
Is a clock detection circuit, 3a and 3b are synchronization circuits, 5b is a clock extraction circuit, 6a and 6b are line control circuits, 8 is an extracted clock output circuit, and 11 is an AIS (Alarm In).
(dication Signal) signal output circuit, 12
Is an AIS receiving circuit, and 30 is a line. Reference numeral 41a denotes a transmission-side multiplexer configured in this way, and 41b denotes a reception-side multiplexer.

Next, the operation will be described. When the clock detection circuit 2a detects that the clock from the network synchronizer 1a has been disconnected, the AIS output circuit 11
And outputs the AIS to the line 30. Multiplexer 41 on the receiving side receiving this signal AIS via line 30
In b, the AIS is detected by the AIS receiving circuit 12, and the clock from the clock output circuit 5b is stopped. The network synchronizer 1b that has received the detection of the clock stop generates the clock by itself and supplies the clock to the multiplexer 41b. Therefore, the multiplexer 41b can synchronize with the network synchronizer 1b. At this time, the signal transmitted from the multiplexer 41a is A
Because of the IS, all signals on the line 30 are disconnected.

[0004]

The conventional clock loss detection method is configured as described above, and when the main clock loss of the network is notified, the AIS signal is used and all signals are lost.
Since the signal becomes a 1 "bit signal, there is a problem that the normal signal is destroyed and the data communication cannot be continued. Further, in the method of using an empty byte not defined in the notification of the clock interruption, the corresponding empty byte will be When expanded, the signal needs to be changed, and there is a problem that the expansion is monitored and changed.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problem. Even if a network synchronizer fails and a clock is cut off, highly accurate synchronization can be achieved and multiplexing without data loss occurs. The aim is to obtain a device.

[0006]

SUMMARY OF THE INVENTION A clock synchronous multiplexing apparatus according to the present invention receives a clock from a network synchronizer in which the multiplexing apparatus is the main, synchronizes the clock, and transmits data to another multiplexing apparatus via a line. Then, the other multiplexer extracts the clock from the received data and synchronizes. When the clock is cut off, the other multiplexer receives the clock from the slave network synchronizer to which the other multiplexer belongs and synchronizes. When the multiplexer detects that the clock of the main network synchronization device has been cut off, the multiplexer includes a circuit for sending a RAI (Remote Alarm Indication) signal to the line. The multiplexing device includes the RA included in the line.
An RAI detection circuit for detecting an I signal, and a clock disconnection output circuit for transmitting a clock disconnection detected by the RAI detection circuit to a slave network synchronizer, usually not receiving a clock from the slave network synchronizer; When the main network synchronizer is notified of the clock interruption, the slave network synchronizer receives the clock.

Further, the multiplexing device includes a clock cutoff alarm output circuit for the control channel instead of the RAI circuit, and transmits the clock cutoff alarm signal to the other multiplexing devices using the control channel, Other multiplexers include a clock loss alarm receiving circuit that monitors a control channel and receives a clock loss alarm signal, instead of the RAI detection circuit.

Furthermore, the multiplexing device includes an RAI transfer circuit for transferring an RAI signal via a line to another next multiplexing device having no dependent network synchronizer when detecting a clock loss.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 An example of a clock synchronous multiplexing apparatus according to the present invention that achieves highly accurate synchronization and does not cause data loss will be described. FIG. 1 shows the first embodiment.
FIG. 2 is a block diagram showing a configuration of the device in FIG. In the figure, 1a is a main network synchronization device for generating a high-precision clock, 2a is a clock detection circuit for detecting a clock from the network synchronization device 1a, and 3a synchronizes inside the device based on the detected clock. When the clock detection circuit 2a detects that the clock has been cut off, the synchronizing circuit 4 and the RAI (Remote A
laim Indication) RAI output circuit that outputs a signal, 5
Reference numeral a denotes a clock extraction circuit that extracts a clock from a line and sends it to a synchronization circuit. Reference numeral 6a denotes a line control circuit that transmits and receives data to and from the line. 1b is a slave network synchronizer that generates a highly accurate clock, 2b is a clock detection circuit that detects a clock from the network synchronizer 1b, and 3b is based on a clock from a line or detected by the clock detection circuit 2b. 5b is a clock extracting circuit for extracting a clock from the line and sending it to a network synchronizer which is a slave to the synchronous circuit; 6b is a line control circuit for transmitting and receiving data to and from the line; Is the RA that detects the received RAI signal.
An I detection circuit 8 is an extraction clock output circuit for sending a clock detection signal to a slave network synchronization device, and constitutes another multiplexing device as 20b. Reference numeral 30 denotes a line connecting the two.

The operation of the apparatus having the configuration shown in FIG. 1 will be described.
If the main network synchronization device 1a is normal, the multiplexing device 2
In the case of 0a, the clock detection circuit 2a detects a clock, and the synchronization circuit 3a performs a synchronization operation of the device 20a based on the clock. On the other hand, in the other multiplexer 20b, the line 30
The clock from the multiplexing device 20a is extracted by the clock extraction circuit 5b based on the data transmitted and received above, and based on this, the synchronization operation of the device 20b is performed. The device 1b is notified that the clock is being detected. The slave network synchronizer 1b stops the clock transmission based on this notification. Thus, under normal conditions, the network is the main network synchronizer 1a.
The synchronous operation is performed based on this clock.

When an error occurs in the network synchronizer 1a and its clock is cut off, the clock detection circuit 2a of the multiplexer 20a detects it and causes the RAI output circuit 4 to make it.
The RAI output circuit 4 generates an RAI signal of a frame format determined by the standardization I431, and sends the signal to the line 30 by the line control circuit 6a. The standard frame format is composed of nine lines of 90 bytes, the first three bytes and nine lines are a transport overhead part, and the remaining 87 bytes are used for data transmission in a payload part. In the operation, the conventional AIS signal is set to all 1s except for the transport overhead part.
While the original data is destroyed, the RAI signal is I43
This is a signal of the frame format determined in 1 and all data on the line can be used. Defining a clock cut in an undefined byte of the transport overhead is inconvenient if expansion is required in the future due to standardization or the like. The other multiplexer 20b receives the RAI signal, and the RAI detection circuit 7 detects the RAI signal,
The network synchronizer 1b as a slave by the extracted clock output circuit 8
Notify the clock break. The slave network synchronizer 1b thereby starts sending a clock with high accuracy. The other multiplexing device 20b uses this clock as the clock detection circuit 2
b, and supplies the detected signal to the synchronization circuit 3b.
The synchronous operation of b is performed. Data transmission / reception to / from the line 30 is performed. The multiplexer 20a includes a line control circuit 6a
Based on this data transmission / reception, the clock extraction circuit 5a extracts a clock from the data and sends it to the synchronization circuit 3a, thereby establishing a synchronization operation. Thus, in the event of an abnormality, the network switches based on the clock of the slave network synchronizer 1b to perform the synchronization operation. At this time, the clock disconnection
Since it is notified by the I signal and is not an all-one signal like the AIS signal, data is normally transmitted and received and transmission is not interrupted.

Another device according to the present embodiment will be described. Although the device having the configuration shown in FIG. 1 has been described as a device for transmitting the RAI signal in the standard frame format, one of the control data is transmitted between the multiplexing devices by using a control channel separately used for management and the like. It is also possible to adopt a configuration in which the format of the clock interruption is defined and the notification is made. FIG. 2 is a block diagram showing the configuration. In FIG. 2, reference numeral 9 denotes an alarm output circuit to a control channel for sending a predetermined format to the control channel when a clock loss is detected, and 19 denotes a clock loss format signal from the control channel. This is an alarm detection circuit that sends a clock disconnection signal to the slave network synchronizer 1b in response to this. The operation of the device of this configuration differs from that of the device of FIG. 1 only in the parts related to the alarm output circuit 9 and the alarm detection circuit 19. That is, the alarm output circuit 9 and the alarm detection circuit 19 perform data transmission and reception on the control channel instead of the communication channel for data transmission and reception on the line. The operation of other parts is the same as that of the device having the configuration of FIG.
Detailed description is omitted.

In the configuration shown in FIG. 1 or FIG. 2, as indicated by the dotted line, instead of the subordinate network synchronization device 1b,
For example, N which can extract a clock with the same high precision
A TT line or the like may be used. In this case, naturally, it is not necessary to notify the clock disconnection signal of the main network synchronization device 1a to the outside, and it is only necessary to switch the clock extraction within the other multiplexer 20b. Similarly, the main network synchronization device 1
Instead of a, for example, an external line that can extract a clock with the same high precision may be used.

Embodiment 2 FIG. Not all multiplexing devices have a dependent network synchronizer. Therefore, a multiplexer without a network synchronizer cannot generate a clock for another. In the present embodiment, a system in which a multiplexer having no network synchronization device has a function of transferring an RAI signal equivalent, and a multiplexer having a network synchronization device that can finally back up, generates a clock at the time of backup is provided. explain. FIG. 3 is a block diagram showing a configuration of the device according to the present embodiment. In the figure, reference numeral 27 denotes an RAI transfer circuit for transferring an RAI signal to a lower-level multiplexer, 3c denotes a synchronization circuit, 5c and 5d denote clock extraction circuits, and 6c and 6d denote line control circuits. Reference numeral 20c denotes a multiplexer to which the network synchronization device 1b is assigned. Other elements of the same numbers are the same as those in the first embodiment.

The operation of the apparatus having the configuration shown in FIG. 3 will be described. The multiplexing device 20b normally operates as the multiplexing device 20a.
Clock extraction circuit 5b from the transmission data from
Are extracted and supplied to the synchronous circuit 3b. When the RAI detection circuit 7 receives the signal from the RAI output circuit 4 of the multiplexing device 20a, it sends out the RAI signal from the RAI transfer circuit 27 to the multiplexing device 20c. The multiplexing device 20c receives the clock from the slave network synchronizer 1b and starts the synchronization operation, similarly to the backup operation of the multiplexer to which the slave network synchronizer in the first embodiment belongs. . Then, in the multiplexer 20b, the line 30b
The clock extraction circuit 5c extracts a clock from the transmission data of (1) and starts a synchronous operation. With this data transmission,
The clock extracting circuit 5a of the multiplexer 20a extracts a clock from the data and performs a synchronous operation. In this way, the synchronization operation continues with the accuracy based on the clock of the slave network synchronization device 1b. Generally, the time accuracy of the network synchronizer is as good as about three digits as compared with a backup clock generation circuit built in the device, so that there is no need for fluctuation in synchronization. Also in the present embodiment, a control channel can be used instead of the RAI signal. FIG. 4 is a block diagram showing the configuration. In the figure, reference numeral 29 denotes a circuit for transferring a clock interruption alarm to a control channel. The operation of the device having this configuration is clear from the description of the operation of each circuit described above, and thus the description is omitted. As in the first embodiment, a clock may be obtained from another equivalent line or device with high accuracy in place of the main network synchronization device and the subordinate network synchronization device.

[0016]

According to the present invention, as in the case of abnormalities, the clock interruption is notified using the standard RAI signal or control channel, so that transmission is not interrupted due to data abnormalities, and future expandability is impaired. There is an effect that communication with good synchronization accuracy can be performed without being a factor.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a clock synchronous multiplexing device according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of another clock synchronous multiplexing device according to the first embodiment.

FIG. 3 is a block diagram illustrating a configuration of a clock synchronous multiplexing device according to a second embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of another clock synchronous multiplexing device according to the second embodiment.

FIG. 5 is a diagram illustrating a clock backup system of a conventional multiplexer.

[Explanation of symbols]

1a Primary network synchronizer, 1b Secondary network synchronizer, 2a, 2b Clock detection circuit, 3a, 3b, 3c
Synchronization circuit, 4 RAI output circuits, 5a, 5b, 5c,
5d clock extraction circuit, 6a, 6b, 6c, 6d network synchronization circuit, 7 RAI detection circuit, 8 extraction clock output circuit, 9 control channel alarm output circuit, 10 NTT line, 19 alarm reception circuit from control channel, 20a,
20b, 20c Multiplexer, 21a, 21b, 21c
Multiplexer, 27 RAI transfer circuits, 30 lines.

──────────────────────────────────────────────────の Continued on front page (51) Int.Cl. ⁶ Identification code FI H04Q 11/04 304

Claims (3)

[Claims] 1. A multiplexing device receives a clock from a main network synchronizer and synchronizes it, transmits data to another multiplexing device via a line, and the other multiplexing device receives a clock from the received data. Synchronizes, and when the clock is cut off, receives the clock from a subordinate network synchronizer to which the other multiplexing device is associated, synchronizes and notifies the line to the line, Detects that the clock of the main network synchronizer has been interrupted,
a multiplexer for transmitting the signal to the line, the other multiplexer includes an RAI detection circuit for detecting the RAI signal included in the line, and a clock synchronization device for detecting the clock interruption detected by the RAI detection circuit. And a clock disconnection output circuit for transmitting the clock to the slave network synchronizer. The clock of the slave network synchronizer is not normally received from the slave network synchronizer. And a clock synchronous multiplexing device. 2. The multiplexing device includes a clock loss alarm output circuit for a control channel instead of the RAI circuit, and transmits a clock loss alarm signal to another multiplexing device using the control channel. 2. The multiplexing apparatus according to claim 1, further comprising a clock loss alarm receiving circuit that monitors a control channel and receives the clock loss alarm signal, instead of the RAI detection circuit.
A clock synchronous multiplexing device as described. 3. The multiplexing device further includes an RAI transfer circuit for transferring an RAI signal via a line to another multiplexing device having no equivalent to the network synchronizer to which the multiplexing device is attached when detecting a clock loss. The clock synchronous multiplexer according to claim 1, wherein: