JPH11204725A - Memory module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To inexpensively improve a reliability of a memory module without being affected by noise and generated heat. SOLUTION: Eight memories 2 where boosting power circuits becoming noise generation sources are not provided are mounted on the surface 1a and the backside 1b of a module wiring board 1 and a power IC 3 where only the boosting power circuit is made into a different chip is mounted on the surface 1a. A wiring pattern is formed so that boosting power generated by the power 1C 3 is supplied to the eight memories 2. Thus, the power IC 3 being the circuit becoming the noise generation source is provided for the memory module MM independent of the memories 2. Thus, the malfunction of the memories 2 owing to noise can be reduced and the operation margin of the memory module MM can be improved greatly.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory module and, more particularly, to a technology effective when applied to a stable operation of a semiconductor integrated circuit device.

[0002]

2. Description of the Related Art According to studies made by the present inventor, memory modules used for extended memories such as personal computers and workstations are required to have a large capacity and a high speed in writing and reading data. For example, SOP (Small Outlin
e-Package (ePackage) -type resin-sealed package into a single chip DRAM (Dynamic Land)
The semiconductor integrated circuit device, which is an om Access Memory (om Access Memory) memory, is mounted on a module wiring board.

[0003] An example describing this type of memory expansion system in detail is August 30, 1990.
Published by Nikkan Kogyo Shimbun (published by Nikkan Kogyo Shimbun) and edited by Yasuji Suzuki (eds.), "Semiconductor MOS Memory and How to Use It," P114-P126. .

[0004]

However, it has been found by the present inventors that the above-mentioned memory module has the following problems.

That is, in a semiconductor integrated circuit device such as a DRAM memory, the power consumption of a power supply circuit, an interface circuit, and the like tends to increase with an increase in the operating speed. As a result, the heat generation of the semiconductor integrated circuit device itself increases. As a result, the refresh characteristics are deteriorated, and the performance of the memory module may be reduced. This increase in power consumption is, for example, due to Rambus
This has become prominent in semiconductor integrated circuit devices such as DRAMs that operate at high speed.

Further, in order to reduce the amount of heat generated by the semiconductor integrated circuit device, it is necessary to provide a heat radiation plate or the like for each package, and there is also a problem that the cost of the memory module is increased.

Further, in a semiconductor integrated circuit device formed into one chip, noise generated by a boosted power supply circuit for generating a boosted power supply to be supplied to a word line may adversely affect the operation of the semiconductor integrated circuit device. .

An object of the present invention is to provide a memory module which can be improved in reliability at low cost without being affected by noise or heat generation.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0010]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, the memory module of the present invention comprises:
At least one semiconductor integrated circuit device including a semiconductor memory, and an isolation circuit including an electronic circuit that adversely affects the operation of the semiconductor integrated circuit device among electronic circuits included in the semiconductor integrated circuit device; The printed circuit board has a semiconductor integrated circuit device and a separation circuit mounted thereon, and a printed wiring board on which a wiring pattern for performing predetermined wiring between the semiconductor integrated circuit device and the separation circuit is formed.

[0012] In the memory module of the present invention, the separation circuit includes a power supply circuit for generating an internal power supply supplied to all the semiconductor integrated circuit devices.

Accordingly, a power supply circuit serving as a noise generation source can be provided in the memory module separately from the semiconductor integrated circuit device, so that the noise resistance performance of the semiconductor integrated circuit device can be greatly improved.

In the memory module according to the present invention, the separation circuit includes an interface circuit for interfacing input / output data in all the semiconductor integrated circuit devices.

[0015] Thereby, the interface circuit is Ram
In the case of high-speed and large heat generation such as bus specifications, the interface circuit can be provided in the memory module separately from the semiconductor integrated circuit device, so that deterioration of characteristics such as refresh characteristics of the semiconductor integrated circuit device can be significantly reduced. Can be.

As described above, the operation margin of the memory module can be greatly improved.

[0017]

Embodiments of the present invention will be described below in detail with reference to the drawings.

(Embodiment 1) FIG. 1 is an explanatory view of mounting on a module wiring board on which a memory is mounted in a memory module according to Embodiment 1 of the present invention.

In the first embodiment, a memory module MM that is used as an extended memory of a personal computer or the like and has a predetermined memory configuration is provided with a module wiring board (printed wiring board) 1 on which electronic components are mounted. I have.

The module wiring board 1 is a double-sided mounting board, and electronic components such as memories to be described later are mounted on the front surface 1a and the back surface 1b of the module wiring substrate 1. Here, the module wiring board 1 may be a single-sided mounting board.

Further, on one of the long sides of the module wiring board 1, a predetermined number of module I / O terminals MT are provided along the longitudinal direction of the module wiring board 1. The front surface 1a and the back surface 1b of the module wiring board 1
Are formed, and each land and module I / O terminal MT are electrically connected to a predetermined connection destination by these wiring patterns.

Then, the surface 1a of the module wiring board 1
In the vicinity of the corner on one long side of the above, for example, a capacitor C which is a chip component for removing noise of a power supply voltage supplied to the memory module MM is mounted.

Next, on the front surface 1a and the back surface 1b of the module wiring board 1, for example, SOP (Small O
The memory (semiconductor integrated circuit device) 2 of a DRAM composed of an U.S.A. package (U.S.A. package) is mounted vertically four in the longitudinal direction of the module wiring board 1.

Further, these memories 2 are not provided with a circuit serving as a noise generating source, for example, a boosting power supply circuit for generating a boosting power supply to be supplied to a word line, and only this boosting power supply circuit is provided on a separate chip. A power supply IC (separation circuit, power supply circuit) 3 which is a semiconductor integrated circuit device also formed of an SOP type package is mounted near the center of one short side of the front surface 1a of the module wiring board 1.

Further, the module wiring board 1
The wiring pattern is formed such that the boosted power generated by the power supply IC 3 mounted on the memory a is supplied to all eight memories 2 mounted on the front surface 1a and the back surface 1b. In other words, the power supply IC 3 has eight memories 2
Will be shared.

Thus, in the first embodiment, the malfunction of the memory 2 due to noise is reduced by providing the power supply IC 3 which is a circuit serving as a noise source in the memory 2 separately from the memory 2. And the operating margin of the memory module MM can be greatly improved.

Further, since a booster power supply circuit is not required for the memory 2, the area of the semiconductor chip can be reduced, so that each memory 2 can be downsized.

However, since the power supply IC 3 must supply boosted power to all eight memories 2, it is necessary to design the power supply IC 3 to secure a necessary and sufficient power supply.

Although one power supply IC 3 is used for the eight memories 2 here, one power supply IC 3 is mounted on each of the front surface 1 a and the back surface 1 b of the module wiring board 1, and the four memories 2 are provided. In this case, a single power supply IC 3 may be used to supply boosted power.

Further, according to the first embodiment, the above-described memory 2 is not provided with the boost power supply circuit. However, for example, while the memory 2 (FIG. 1) is provided with the boost power supply circuit, The boosting power supply circuit may be deactivated by inputting the control signal described above, and the boosting power may be supplied by the power supply IC.

In the first embodiment, the boosting power supply circuit described above is used as a circuit serving as a noise generation source.
Although provided as C3 (FIG. 1), the circuit provided in the power supply IC3 may be a circuit other than the boosting power supply circuit as long as it is a circuit that becomes a noise generation source. For example, a substrate potential supplied to a memory cell is generated. A circuit serving as a noise generation source, such as a substrate potential generation circuit for generating a precharge potential used for precharging a bit line or a precharge power supply circuit used for precharging a bit line, may be provided in the power supply IC 3.

(Embodiment 2) FIG. 2 is an explanatory view of mounting a module wiring board on which a memory is mounted in a memory module according to Embodiment 1 of the present invention, and FIG. 3 is an explanatory view of connection between a memory and an interface circuit in a memory module. FIGS. 4A and 4B are explanatory diagrams of wiring between the memory and the interface circuit in the memory module.

According to the second embodiment, as shown in FIG.
It is a bus specification.

Also in this case, similarly, the rectangular module wiring board 1 on which electronic components such as a memory (semiconductor integrated circuit device) 2a are mounted is a double-sided mounting board, and the front and back surfaces 1a and 1b of the module wiring board 1 are provided. The memory 2a composed of four SOP type packages is mounted on the module wiring board 1 in the longitudinal direction. Further, the module wiring board 1 may be a single-sided mounting board.

Further, on one of the long sides of the module wiring board 1, a predetermined number of module I / O terminals MT are provided along the longitudinal direction of the module wiring board 1. The front surface 1a and the back surface 1b of the module wiring board 1
Are formed, and each land and module I / O terminal MT are electrically connected to a predetermined connection destination by these wiring patterns.

The surface 1a of the module wiring board 1
In the vicinity of the corner on one long side of the above, for example, a capacitor C which is a chip component for removing noise of a power supply voltage supplied to the memory module MM is mounted.

The memory 2a mounted on the module wiring board 1 is not provided with an interface circuit of Rambus specification, and is a semiconductor integrated circuit device having the same SOP type package in which this interface circuit is formed as a separate chip. The interface IC (separation circuit, interface circuit) 4 is the surface 1a of the module wiring board 1.
Are mounted at the central portion near the module I / O terminal MT.

Further, the interface IC 4 mounted on the front surface 1a is shared as an interface of eight memories 2a similarly mounted on the front surface 1a and the back surface 1b.

When the interface ICs 4 are provided individually, as shown in FIG. 3, since this interface circuit performs parallel / serial conversion, eight I / Os are provided between the interface IC 4 and the memory 2a. A signal line is required.

For this reason, for example, when the memory module MM has 8 I / Os, it is necessary to connect as many as 64 signal lines only between data lines between the memory 2a and the interface IC 4, which is difficult to realize. turn into.

Therefore, as shown in FIG. 4, all the memories 2a are operated at the same time, and each memory 2a takes charge of only a part of the I / O.

For example, when the connection between each memory 2a and the interface IC 4 is made by two signal lines, the number of signal lines between the eight memories 2a and the interface IC 4 is only 16. . Here, FIG. 4 shows four memories 2a and one interface IC 4
It shows the connection relationship with.

In the Rambus-specification memory module MM, sufficient power dissipation is required because most of the power consumption is consumed by the above-described interface circuit. However, the interface circuit is provided as an interface IC 4 separately from the memory 2a. Thus, it is only necessary to take measures such as providing a heat radiation plate only for the interface IC 4.

Further, the memory 2a and the interface IC
4 can be separated from the memory 2a as an interface circuit serving as a heat source, so that a decrease in refresh characteristics due to heat can be significantly reduced.

Thus, according to the second embodiment, the interface circuit generating a large amount of heat is connected to the interface IC.
By providing the memory module MM separately from the memory 2a as 4, the characteristic deterioration in the memory module MM such as the refresh characteristic can be significantly reduced.

Further, since no heat countermeasures such as heat radiating plates are required for each memory 2a, the memory module MM
Cost can be reduced.

Further, in the case of the second embodiment, the signal delay in the output circuit of the memory 2a is feared by providing the interface circuit as the interface IC 4 externally.
Designed to drive only the internal interface circuit, the memory 2a can eliminate the speed penalty by reducing the drive load.

In the second embodiment, Rambus
Although the memory module MM of the specification has been described, the configuration of the memory module in which an interface circuit is individually provided as an interface IC is not limited to the Rambus specification. In this case, it is possible to greatly reduce the characteristic deterioration and to reduce the cost of the memory module.

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the above embodiments, and various modifications may be made without departing from the gist of the invention. Needless to say, it can be changed.

For example, in the first and second embodiments, a case has been described in which either the power supply IC or the interface IC is individually mounted. For example, as shown in FIG. And both the power supply IC 3 and the interface IC 4 may be mounted.

As a result, the operation margin of the memory module MM can be greatly improved, and the deterioration of characteristics of the memory module MM such as the refresh characteristic can be greatly reduced. In addition, since each memory 2a does not need a heat countermeasure such as a heat radiating plate, the cost of the memory module MM can be reduced.

In addition, there may be an example in which a complicated test is performed on the memory module by individually mounting a memory test IC including a test circuit for testing the memory module on the module wiring board.

Further, in the first and second embodiments, the description has been given of the memory module.
Significantly improved operating performance of electronic devices that use semiconductor integrated circuit devices, such as memory cards used as temporary storage memory in personal computers and DRAMs, such as IC cards that are high-performance cards, etc. can do.

According to the first and second embodiments, the memory, the power supply IC, and the interface IC
Type package, for example, TSOP (Thi
nSmall Outline Package), S
OJ (Small Outline J-leaded
Package), FPG (Flat Package)
e Glass) or a flip chip for electrically connecting a semiconductor chip directly to an electrode portion of a module wiring board.

[0055]

Advantageous effects obtained by typical ones of the inventions disclosed by the present application will be briefly described as follows.
It is as follows.

(1) According to the present invention, by providing a separation circuit such as a power supply circuit as a noise generation source in a memory module separately from a semiconductor integrated circuit device, the noise resistance performance of the semiconductor integrated circuit device is greatly improved. Can be improved.

(2) According to the present invention, a separation circuit such as an interface circuit which generates a large amount of heat is provided in a memory module separately from a semiconductor integrated circuit device.
Deterioration of characteristics such as refresh characteristics of the semiconductor integrated circuit device can be significantly reduced, and the semiconductor integrated circuit device does not need to take measures for heat dissipation such as a heat sink.

(3) Further, in the present invention, by providing the power supply circuit and the interface circuit in the memory module as separate circuits separately from the semiconductor integrated circuit device, the noise resistance performance of the semiconductor integrated circuit device is greatly improved. And deterioration of characteristics such as refresh characteristics can be greatly reduced.

(4) According to the above (1) to (3), the operating margin of the memory module can be greatly improved, and the cost of the memory module can be significantly reduced.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of mounting on a module wiring board on which a memory is mounted in a memory module according to a first embodiment of the present invention;

FIG. 2 is an explanatory view of mounting a module wiring board on which a memory is mounted in a memory module according to a second embodiment of the present invention;

FIG. 3 is an explanatory diagram of connection between a memory and an interface circuit in a memory module.

FIG. 4 is an explanatory diagram of wiring between a memory and an interface circuit in the memory module.

FIG. 5 is an explanatory view of mounting a module wiring board on which a memory is mounted in a memory module according to another embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Module wiring board (printed wiring board) 1a Front surface 1b Back surface 2 Memory (semiconductor integrated circuit device) 2a Memory (semiconductor integrated circuit device) 3 Power supply IC (separation circuit, power supply circuit) 4 Interface IC (separation circuit, interface circuit) MM Memory module MT module I / O terminal C capacitor

Claims (4)

[Claims] At least one semiconductor integrated circuit device comprising a semiconductor memory, and an electronic circuit which adversely affects the operation of the semiconductor integrated circuit device among electronic circuits constituting the semiconductor integrated circuit device. An isolation circuit; and a printed wiring board on which the semiconductor integrated circuit device and the isolation circuit are mounted and on which a wiring pattern for performing predetermined wiring between the semiconductor integrated circuit device and the isolation circuit is formed. Memory module. 2. The memory module according to claim 1, wherein said separation circuit is a power supply circuit for generating an internal power supply supplied to all of said semiconductor integrated circuit devices. 3. The memory module according to claim 2, wherein said power supply circuit comprises a boosted power supply circuit for generating a boosted power supply supplied as a word line potential. 4. The memory module according to claim 1, wherein said separation circuit is an interface circuit for interfacing input / output data in all said semiconductor integrated circuit devices.