JPH11204463A - Semiconductor chip cutting-off method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To form an etching groove so as to provide correct controllability and high reproducibility. SOLUTION: In cutting off a laser semiconductor chip formed on the surface of a wafer 10, a V-shaped groove 100 is formed as a cutting marker on the upper surface of the laser semiconductor chip by etching so that each of bottom lines 112, 122, 132, 142 and 152 viewed from right above the V-shaped groove is parallel to the direction in which the wafer, and the laser semiconductor chip is cut along the V-shaped groove by cleaving.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for cutting out a semiconductor device formed on a wafer.

[0002]

2. Description of the Related Art A method for cutting out a semiconductor element of this kind is as follows.
A laser semiconductor element having a window structure is disclosed in, for example, a document: Japanese Patent Application No. 9-33075.
According to the method disclosed in this document, an etching groove is formed outside a region of a semiconductor element, and a semiconductor element is cut out by cleavage using the etching groove.
The etching groove is formed parallel to the orientation flat of the wafer.

[0003]

However, the method for cutting out a semiconductor device described in this document has the following problems. First, the sectional shape of the etching groove is U
The bottom of the groove has a flat portion with a width of about 10 μm. When cleaving is performed using this etching groove, it is not clear where a flat portion of about 10 μm is broken.
In a laser semiconductor device having a window structure,
If the thickness of the window portion is large, various problems occur.
That is, when the thickness of the window portion is large, the scattering loss of the laser light until the laser light is emitted from the window portion increases. Therefore, a laser beam with a sufficient output cannot be obtained. In addition, problems such as deformation of the field pattern of the laser beam occur. Therefore, when the thickness of the window portion is on the order of microns, the thinner the film, the better.

Therefore, an error occurs in the cleavage position in the range of about 10 μm, and the film thickness of the window changes, so that this cutting method has problems in controllability and reproducibility of cutting in practical use.

Therefore, in cutting out a semiconductor device, preferably a laser semiconductor device having a window structure, there has been a demand for an appearance of a cutting method having accurate controllability and high reproducibility.

[0006]

According to the present invention, a semiconductor device formed on a wafer is cut out by forming a V-groove on the upper surface of the semiconductor device as a cut-out marker. Is formed by etching so that the bottom line portion viewed from directly above is parallel to the direction in which the wafer is easily cleaved, and the semiconductor element is cleaved along the V-groove.

With this configuration, the bottom of the V-groove is pointed, and the extending direction of the bottom coincides with the direction in which the wafer is easily cleaved. Is the position of the point at the bottom of the V-groove. Therefore,
Compared to the conventional case where the bottom of the etching groove has a U-shape, the position at which cracks start can be controlled more accurately, and high reproducibility can be secured.

In practicing the present invention, preferably, V
The extending direction of the bottom line viewed from directly above the groove is preferably a direction parallel or perpendicular to the orientation flat of the wafer.

According to this structure, the cleavage line of the wafer and the planned cutting line of the semiconductor element are parallel or perpendicular to each other, so that the semiconductor element can be cut accurately and reliably along the planned cutting line.

In practicing the present invention, preferably, the V-groove is provided over a region of the semiconductor element and a region outside the semiconductor element, and the performance of the semiconductor element is not impaired in the semiconductor element region. The V-groove is formed at a notch depth at which the V-groove is easily cleaved.
In the extending direction of the bottom line portion of the groove and the bottom line portion of the V groove in a region outside the semiconductor element, it is desirable that the bottom line portions of these V grooves are on the same straight line.

Since the V-groove is formed so as to have a cutting depth which does not impair the performance of the semiconductor element,
The cut depth of the groove does not reach the layer that plays an important role in the performance of the semiconductor device. Therefore, the important layer is not damaged or contaminated by the etching action of the etching solution. In addition, since the bottom line of the groove with a shallow depth of cut and the bottom line of the groove with a deep depth of cut are formed on the same straight line, it is necessary to align the mask with the groove with a deep depth of cut, that is, the wide groove. This eliminates the need for mask alignment of narrow width grooves, which was conventionally difficult due to fine lines. Further, in order to facilitate cleavage, it is necessary to increase the cut depth of the groove. To achieve this, in the case of the present invention, it is possible to increase the width of the V-groove.

In the embodiment of the present invention, the V-groove
The bottom line portion of at least one V groove in the region outside the semiconductor element is provided in at least one region outside the semiconductor device.
It is preferable that the two V-grooves are formed on the same straight line in the extending direction of the bottom line portion.

According to this structure, even if a V-groove is not formed in the semiconductor element region, a deep cut groove is first cracked at the time of cleavage, and a portion having no cut groove is subsequently formed on the same straight line. Crack. As a result, accurate cutting can be performed even if there is no V groove in the region of the semiconductor element. Therefore, it is not necessary to set the depth of the V-groove so as not to reach an important layer of the semiconductor element.

In practicing the present invention, when the wafer is formed of an InP-based material, the V-groove is preferably formed using an etchant having a mixing ratio of hydrochloric acid to phosphoric acid of 4: 1. .

With this configuration, a predetermined V groove can be reliably formed.

In practicing the present invention, preferably, when the wafer is formed of a GaAs-based material, the V-groove is formed by using a mixed etchant of hydrochloric acid and phosphoric acid or a sulfuric acid-based etchant. Is good.

With this configuration, a predetermined V groove can be reliably formed.

In practicing the present invention, it is preferable that the semiconductor device is a laser semiconductor device having a window structure.

With this configuration, the thickness of the window portion of the laser semiconductor element can be formed as thin as possible and with high precision.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. In the drawings, the size, shape, and arrangement of each component are only schematically shown to an extent that the present invention can be understood, and numerical conditions described below are merely examples. Please understand that.

The present invention is a method for cutting out semiconductor elements formed on the wafer 10 by using V-grooves.

In particular, the present invention will be described by taking a laser semiconductor device having a window structure formed on the surface of a wafer as a preferred example of a semiconductor device. Note that the cutting method using the V-groove of the present invention is not limited to the laser semiconductor element, and can be applied to all kinds of semiconductor elements formed on a wafer.

Before describing the embodiment of the present invention, the results of a cleavage experiment performed on a V-groove will be described.

First, the configuration of the V-groove used in this cleavage experiment will be described. FIG. 1 is a configuration diagram of a V-groove.

FIG. 1A is a schematic view of a microscope photograph when the V-groove of the present invention is viewed from above. FIG.
The hatched portion in (A) indicates a flat portion of the wafer other than the V groove.

This figure shows a micrograph in which the V-groove is enlarged at a magnification of 486 times using a Nomarski microscope. Arrows on the drawing indicate <110> and <−110>. Note that <−110> is the Miller index (−110).
The vertical vector of the plane is shown, and −1 of <−110> represents one bar. This notation method will be used hereinafter. To facilitate understanding, FIG. 5 shows a relationship between an orientation flat (hereinafter, referred to as an orientation flat), which is one crystal plane of the wafer, and a Miller index, for reference.

FIG. 1B is a microphotograph showing a cross section taken along a line DD of FIG. 1A. FIG. 1C is an enlarged perspective view of a V-groove 100 formed on the surface of the wafer 10 as viewed obliquely from above. Note that the hatched portion in FIG.
Is shown. This V-groove 100 is shown in FIGS.
As shown in FIG. 1B and FIG.
10, an adjacent region 120, a narrow V groove 130, an adjacent region 140, and a V groove 150 having the same width as the V groove 110.

The wide V-groove 110 is composed of two slopes 114 (one slope in FIG. 1) having a predetermined inclination angle θ with respect to the (001) plane and a bottom line 112. The inclination angle θ is uniformly determined by the combination of the wafer material and the etchant. The adjacent area 120 is the bottom line 1
22 and two slopes 124. The narrow V-groove 130 includes a bottom line 132 and two slopes 134 having a predetermined inclination angle θ with respect to the (001) plane. The adjacent region 140 includes a bottom line portion 142 and two slope portions 144. The wide V-groove 150
It comprises a bottom line portion 152 and two slope portions 154 having a predetermined inclination angle θ with respect to the (001) plane.

Here, the bottom lines 112, 122, 132,
Reference numerals 142 and 152 mean a straight line portion where the two slopes forming the V-shaped groove 100 coincide with each other, that is, a straight line portion forming the bottom of the V-shaped groove 100. The bottom line portions 112, 122, 132, 142, 152 formed at the bottom of the V-groove 100
When viewed from directly above the groove, they are on the same straight line. But,
When the bottom lines 112, 122, 132, 142, and 152 are viewed from the side or from diagonally above, they are not on the same straight line. Therefore, if the bottom line viewed from directly above the V-groove 100 is parallel or perpendicular to the direction in which the wafer is easily cleaved, the bottom line is on the same line in which the wafer 10 is easily cleaved.

The adjacent regions 120 and 140 are facets formed by etching at the joint between the wide V-groove and the narrow V-groove, that is, a single crystal plane.

Next, with reference to FIGS. 2, 3A to 4D and 4A to 4D, a method of forming a V groove 100 on the wafer 10 using the mask pattern 14 will be described. Will be described.

FIG. 2 shows a mask pattern 14 for forming a V-groove 100 on the wafer 10 by photolithographic etching.
FIG. As shown in FIG. 2, the mask pattern 14 includes a wide (W2) mask portion 14a, a narrow (W1) mask portion 14b, and a mask portion 14c having the same width (W2) as the mask portion 14a. Consists of The narrow (W1) mask portion 14b is a mask portion for forming a V groove provided in a region of a semiconductor element described later. On the other hand, the wide (W2) mask portion 14a and the mask portion 14c having the same width (W2) as the mask portion 14a are mask portions for forming a V groove 100 provided in a region outside the semiconductor element described later. . The hatched portions in FIG. 2 indicate the mask patterns 14.

FIGS. 3A to 3D are views showing a process of forming a V-groove in a cross section taken along the line BB of FIG.

FIGS. 4A to 4D are views showing a process of forming a V-groove in a cross section taken along the line CC of FIG.

FIGS. 2, 3A-3D and FIG.
In (A) to (D), for example, In having a thickness of 450 μm is used.
An insulating film 12 (Si) is formed on a wafer 10 made of a P-based material by a CVD method (a thermal CVD method, a plasma CVD method, an optical CVD method, etc.).
₃ N ₄ film or SiO ₂ film). After this,
A resist film 11 is applied on the insulating film 12. Here, the reason for applying the resist film 11 on the insulating film 12 is as follows.
This is to prevent the peeling of the resist film due to the etchant when the wafer is etched using the resist film as a mask. It is considered that direct etching is possible if the resist is strong against acid. However, in this case, since the mask pattern 14 having a particularly narrow portion is used, the resist film in the narrow portion is easily peeled off by the etchant. Therefore, here, a method of etching a wafer using an insulating film as a mask is used.

A mask pattern 14 shown in FIG. 2 is put on the resist film 11 (FIG. 3A and FIG. 4).
(A)). The mask pattern 14 is formed by attaching a Cr metal to one piece of quartz glass by sputtering to form a region through which light does not pass (a hatched portion in FIG. 2). Further, light is transmitted through the portion where the Cr metal is not attached. Next, ultraviolet rays are irradiated on the resist film 11 through the mask pattern 14 by photolithography. Then
The resist film 11 that has become soluble upon exposure to light is removed (FIGS. 3B and 4B). Subsequently, the insulating film 12 is etched using hydrofluoric acid (HF) or buffered hydrofluoric acid (BHF) using the resist film 11 remaining as a mask as a mask, and a mask pattern is transferred to the insulating film 12 (FIG. C) and FIG. 4 (C)). Thereafter, when the resist film 11 is peeled off with an organic solvent or the like, the transfer onto the insulating film 12 by the pattern of FIG. 2 is completed. And V-groove 100
The wafer 10 is wet-etched at 20 ° C. using an etchant required for forming the wafer, which is determined according to the material of the wafer, in this case, the mixture ratio of hydrochloric acid to phosphoric acid is 4: 1. Then, the unmasked wafer 10 is etched by the etchant, and the wafer 10
V-groove 100 is formed thereon (FIGS. 3D and 4).
(D)).

Next, the following cleavage experiment was performed on a wafer formed by using such a V-groove forming method.

In this experiment, the wider width W2 of the V-groove (see FIG. 1A) was 500 μm, 200 μm, and 100 μm.
And for the case of 50 μm, force was applied by hand to break these wafers. As a result, in each case,
As shown in FIG. 5, it was cleanly broken from the bottom line of the V groove. FIG.
FIG. 2 is a view showing a (−110) plane of FIG. 1A, wherein the wafer 10 is cleaved cleanly along a bottom line portion of a V-shaped groove and split into two;
It is a figure showing a and 10b. This figure is a simulated microphotograph of the same Nomarski microscope shown in FIGS. 1 (A) and 1 (B).
It is a mimetic diagram of a groove, and a shaded portion shows a (-110) plane.
In addition, in FIG. 5, 20f and 20g show that each of the sections 10a and 10b
The points corresponding to the bottom lines of are shown. Also, 10a-
Reference numerals 1 and 10b-1 denote crack lines or edges formed by breaking the sections 10a and 10b. This edge is a clean linear crack line having substantially no irregularities.

Therefore, as a result of this experiment, FIG.
(A), FIG. 1 (B), FIG. 1 (C) and FIG. 5 reveal the following.

(1) When the mixed etchant of hydrochloric acid and phosphoric acid is used as an InP-based material, a V-shaped groove having a constant shape is always formed. Therefore, the relationship between the width W of the V-groove and the etching depth D in this case is such that the slope of the V-groove is (001).
Assuming that the angle between the plane and the plane is θ (see FIGS. 5 and 6B), it can be approximately expressed by the following conditional expression (1).

D = (W / 2) · tan θ (1) When an etchant having a mixing ratio of hydrochloric acid and phosphoric acid of 4: 1 is applied to the InP-based material, θ = 35.3 °. ,
A (211) plane is formed.

(2) The vertical length of the side etched portion of the narrow V-groove, ie, the slope portion 134, is shorter than the vertical length of the slope portions 114, 154 of the wide V-groove. That is, in the case of a narrow V-groove, the vertical length of the slope portion 134 corresponding to the width, that is, the bottom line portion 13 of the V-groove
Etching stops when it reaches 2.

(3) V-grooves 110, 130, 1 having different widths
When 50 is connected, the bottom line 1 of the V-groove viewed from directly above
12, 122, 132, 142, 152 are always on the same straight line regardless of the narrow width of the V-groove. But,
A plurality of bottom line portions 112, 122, 13 of V grooves having different widths
2, 142, and 152 have different bottom line portions except that the bottom line portion 112 and the bottom line portion 152 have the same depth. In short, as shown in FIG. 1B, bottom lines 112 and 132 or 132 of adjacent V-grooves having different widths.
And 152, the ends of the bottom line portion are connected to each other via the adjacent regions 120 and 140.

(4) When a mixed etchant of hydrochloric acid and phosphoric acid or a sulfuric acid-based etchant is used for the GaAs material, the low index surface of the V-groove, ie, the slope portion 114, 1 is used.
34 and 154 are (111) planes.

<First Embodiment> Next, a case where the V-groove according to the first embodiment of the present invention is applied to cutting of a laser semiconductor device having a window structure will be described.

FIG. 6A shows a V-shaped groove 100 according to the present invention.
FIG. 6B is a top view showing an example in which the present invention is applied to cutting of the laser semiconductor element 20 having a window structure, and FIG. 6B shows a cross-section cut along line EE in FIG. FIG.

FIG. 6B shows the laser semiconductor device 20.
Are provided on the upper surface of the wafer 10 with the cladding layer 20a and the active layer 2
0b, the cladding layer 20c, and the contact layer 20d in this order. Further, the laser semiconductor element 20 has two window portions 22 extending inside the laser semiconductor element 20 in parallel with each other.

In FIG. 6A, the width t 1 of the region of the laser semiconductor element in the V-groove direction is actually the resonator length of the laser semiconductor element 20. The width t2 of the region of the laser semiconductor element in a direction orthogonal to the V-groove direction is the chip width of the laser semiconductor element 20. Further, the width t3 of the laser semiconductor element region in a direction orthogonal to the V-groove direction is the width of the ridge portion of the laser semiconductor element 20. Here, the ridge portion is a convex portion formed on the top of the laser semiconductor element 20 for narrowing the injection current into the active layer 20b and confining light.

FIG. 7 is a diagram showing an orientation flat, which is a single crystal plane of a wafer, by a Miller index and a view for explaining the relationship with the orientation flat of the wafer.

Here, the material of the wafer 10 is Ga
An example of an As-based material will be described. And this wafer 1
The laser semiconductor element 20 is formed on the surface of the laser diode 0. A V-groove 100 is formed by etching on the upper surface of the laser semiconductor element 20, particularly on the upper surface of the window 22, as a marker for cutting out. This etching is performed so that the bottom line portions 112, 122, 132, 142, and 152 viewed from directly above the V-groove 100 are parallel to the direction in which the wafer is easily cleaved. The etchant used in this etching is a mixed etchant of hydrochloric acid and phosphoric acid, or a sulfuric acid-based etchant. When this etchant is used for a wafer 10 of a GaAs material, V
The low index plane constituting the groove 100 is the (111) plane.

In this case, the direction in which the wafer 10 is easily cleaved corresponds to, for example, a direction parallel or perpendicular to the orientation flat 10c, which is a cleavage reference line of the wafer 10. The direction parallel or perpendicular to the orientation flat is easily cleaved due to the crystal structure. Therefore, for example, when laminating the laser semiconductor element on the surface of the wafer, the planned cut lines L1 and L2 (FIG. 6A) of the laser semiconductor element 20 are, for example, parallel or perpendicular to the orientation flat 10c. You need to do that. Then, the insulating film 12 is formed on the wafer 10 made of, for example, a GaAs material on the predetermined cut lines L1 and L2 of the laser semiconductor element 20 by the CVD method. Thereafter, a resist film 11 is applied on the insulating film 12.
Then, a mask pattern 14 is formed on the resist film 11.
(FIG. 2) and mask alignment (FIG. 3 (A) and FIG. 4 (A)). Hereinafter, the process of forming the V-groove has already been described, and thus will not be described.

Since the depth of the V-groove 100 is reduced by etching the region corresponding to the narrow portion 14b of the mask pattern 14, the V-groove portion is provided in the region of the laser semiconductor element. I do. The wide portions 14a, 1 of the mask pattern 14
By etching the region corresponding to FIG.
The V-groove portion is provided in a region outside the laser semiconductor element because the cutting depth of the groove becomes deep.

Further, in this case, when the mask pattern of the narrow W1 is, for example, 0.5 μm, it is difficult to align the mask of the mask pattern 14 because the mask pattern is too thin. However, the narrow W1 mask pattern is connected to the wide W2 mask pattern. Therefore, if the mask alignment is performed using the wide W2 mask pattern, the narrower mask alignment is completed at the same time, so that it is unnecessary to perform the mask alignment with the narrower width W1.

Further, as described above, the bottom line portion 132 as viewed from directly above the V groove 130 in the region of the laser semiconductor element.
And V-groove 11 viewed from directly above a region outside the laser semiconductor element
0, 120, 140, 150 bottom line portions 112, 122,
The bottom line portions 132, 112, 122, 142, 15 viewed from directly above these V grooves along the extending direction of the 142, 152.
2 are collinear. In this case, the V-shaped groove 100 is provided over a region of the laser semiconductor element and a region outside the laser semiconductor element. Here, the region of the laser semiconductor element is a semiconductor element body to be cut out of the laser semiconductor elements 20 stacked on the surface of the wafer 10,
That is, it is a region surrounded by the planned cutout lines L1 and L2 and the planned scribe lines L3 and L4 (the thick hatched portion in FIG. 6A). The scheduled scribe lines L3 and L4 are scheduled lines for cutting and breaking a high-precision portion that does not require cutting using a scriber. The region outside the laser semiconductor element refers to a region other than the region of the laser semiconductor element.

Here, the depth D2 (FIG. 1B) of the V-groove 130 in the region of the laser semiconductor element is formed with a cut depth that does not impair the performance of the semiconductor element. For example, the depth of cut is such that it does not reach the clad layer 20c (FIG. 6B) which is important for the function of the laser semiconductor element 20. The depth D of the V-groove 100 can be arbitrarily set by adjusting the widths W1 and W2 of the mask pattern 14 using the conditional expression (1). For example, if the narrower width W1 of the mask pattern 14 is 0.5 μm, the depth D2 of the V-groove is 0.34 μm according to the conditional expression (1). Therefore, in the structure of a normal laser semiconductor device, FIG.
As shown in FIG.
Physical damage to the surface of the cladding layer 20c,
Alternatively, there is no process damage such as contamination by an etching solution.

The depth D1 of the V-groove in a region outside the laser semiconductor element is formed so that the V-groove 100 can be easily cleaved. Since this region is an unnecessary portion of the laser semiconductor element 20, for example, a V-shaped groove 11 having a deep cut depth D 1 is provided so as to be easily cleaved when an external force is applied.
0,150 may be formed.

By applying an external force such as, for example, warping the laser semiconductor element 20 along the V-groove 100 thus obtained, cleavage can be performed precisely at a predetermined line.

According to this structure, the bottom of the V-groove is pointed and coincides with the direction in which the wafer is easily cleaved. Compared to the case of a character shape, the position of the start of cracking can be controlled accurately, and high reproducibility can be secured. In addition, since the cleavage line of the wafer and the planned cut line of the laser semiconductor element are parallel or perpendicular to each other, the laser semiconductor element can be cut accurately and reliably along the planned cut line. In addition, since the V-groove is formed so as to have a notch depth that does not impair the performance of the laser semiconductor element, the notch depth of the V-groove may reach a layer that plays an important role in the performance of the laser semiconductor element. Absent. Therefore,
Critical layers are not damaged or contaminated by the etching action of the etching solution. In addition, since the bottom line of the groove with a shallow depth of cut and the bottom line of the groove with a deep depth of cut are formed on the same straight line, it is necessary to align the mask with a groove with a deep depth of cut, that is, a wide groove. This eliminates the need for mask alignment of narrow width grooves, which was conventionally difficult due to fine lines. Further, in order to facilitate cleavage, it is necessary to increase the cut depth of the groove. To achieve this, in the case of the present invention, it is possible to increase the width of the V-groove. However, if the width of the groove is widened in the conventional technique, the U-shaped bottom surface is widened, and there is a problem that a specific error of the cleavage position increases.

<Second Embodiment> Next, an example in which the V-groove according to the second embodiment of the present invention is applied to a laser semiconductor device having a window structure will be described.

FIG. 8 is a circuit diagram of a V-type control device according to a second embodiment of the present invention.
It is a top view which shows the example which applied the groove | channel to the laser semiconductor element which has a window structure.

The V-groove according to the second embodiment of the present invention is characterized in that the V-groove 130 in the region of the laser semiconductor element according to the first embodiment is not formed. The other configuration is the same, and the description is omitted here. As shown in FIG. 8, the width t1 of the semiconductor element region in the V-groove direction is actually the resonator length of the laser semiconductor element 200. Also,
Width t2 of the semiconductor element region in a direction perpendicular to the V-groove direction
Is the chip length of the laser semiconductor device 200. Also,
The width t3 of the semiconductor element region in the direction orthogonal to the V-groove direction is
The width of the ridge portion of the laser semiconductor device 200 is shown.

As shown in FIG. 8, the V-groove of the present invention has a bottom line portion of at least one V-groove outside the laser semiconductor element and a bottom line portion of at least one V-groove viewed from directly above. It is formed on the same straight line along the existing direction. Here, the bottom line portions of at least one V groove and the bottom line portions of at least one V groove viewed from directly above the region outside the semiconductor element are, for example, the bottom line portions 112 and 122 and the bottom line portions 142 and 142.
152. That is, in this case, the bottom line portions 112 and 122 of the V groove viewed from directly above and the bottom line portion 1 of the V groove viewed from directly above
42 and 152 are formed on the same straight line in the extending direction.

With this configuration, in addition to the effects obtained in the first embodiment, V
Even if a groove is not formed, a deep cut groove is broken first at the time of cleavage, and a portion without a cut groove is subsequently broken on the same straight line during cleavage, so that even if there is no V groove in the semiconductor element region, it is accurate. Can be cut out. Therefore, it is not necessary to set the depth of the V-groove so as not to reach an important layer of the semiconductor element.

In the first and second embodiments,
As the V-groove formation conditions, an etchant having a mixing ratio of hydrochloric acid to phosphoric acid of 4: 1 for InP-based material and GaAs
Two examples in which a mixed etchant of hydrochloric acid and phosphoric acid or an etchant of sulfuric acid are applied to s-based materials have been described. However, the conditions under which the V-groove of the present invention is formed are not limited to these two examples, and other combinations in which the V-groove is formed may be used.

[0065]

As is apparent from the above description, according to the present invention, since the bottom of the V-shaped groove is pointed, the cross section of the bottom of the etching groove is formed like a conventional etching groove. Compared to the case of a U-shape, the position at which cracks start can be controlled more accurately, and high reproducibility can be ensured.

[Brief description of the drawings]

FIG. 1 (A) is a mimic photo of a micrograph when the V-groove of the present invention is viewed from above, and FIG. 1 (B) is a side view showing a partial DD cross section of FIG. 1 (A). (C) is an enlarged perspective view of the V-groove viewed from obliquely above.

FIG. 2 is a diagram showing a mask pattern for forming a V groove.

3 (A) to 3 (D) are views showing a process of forming a V-groove in a BB section of FIG. 2;

FIGS. 4A to 4D are views showing a process of forming a V-groove in a cross section taken along the line CC of FIG. 2;

FIG. 5 is a microphotograph showing the (-110) plane of FIG. 1 (A).

FIG. 6A is a top view showing an example in which the V-groove according to the first embodiment of the present invention is applied to cut out of a laser semiconductor element, and FIG. 6B is an EE view of FIG. It is sectional drawing.

FIG. 7 is a diagram showing a relationship between a wafer orientation flat and a Miller index.

FIG. 8 is a top view showing an example in which the V-groove according to the second embodiment of the present invention is applied to a laser semiconductor device.

[Explanation of symbols]

 10: Wafer 10a, 10b: Broken wafer 10c: Orientation flat 10a-1, 10b-1: Cracked edge 11: Resist film 12: Insulating film 14: Mask pattern 14a, 14c: Wide mask portion 14b: Narrow mask portion 20: laser semiconductor elements stacked on wafer 20a, 20c: clad layer 20b: active layer 20d: contact layer 20e: bottom line of V-groove 20f, 20g: corresponding to bottom line of broken wafer Point 22: Window 100: V-groove 110, 150: Wide V-groove 112, 122, 132, 142, 152: Bottom line 114, 124, 134, 144, 154: Slope 120, 140: Adjacent area 130: Narrow V-groove 200: Laser semiconductor element stacked on wafer L1, L2: Planned cut-out line L3, L4: Planned Clive line

Claims (7)

[Claims] When a semiconductor element formed on a wafer is cut out, a V-groove is formed on a top surface of the semiconductor element as a cut-out marker, and a bottom line viewed from directly above the V-groove is easily cleaved on the wafer. A method for cutting out a semiconductor element, comprising: etching the semiconductor element so as to be parallel to the direction; and cleaving the semiconductor element along the V groove. 2. The method for cutting a semiconductor device according to claim 1, wherein the extending direction of the bottom line portion as viewed from directly above the V-groove is a direction parallel or perpendicular to an orientation flat of the wafer. A method for cutting out a semiconductor element, comprising: 3. The method for cutting a semiconductor device according to claim 2, wherein the V-groove is provided over a region of the semiconductor device and a region outside the semiconductor device. The V-groove is formed at a notch depth that does not impair performance, and in a region outside the semiconductor element, the V-groove is formed at a notch depth that is easily cleaved, and the bottom line portion of the V-groove in the semiconductor element region and The bottom line portions of the V-grooves in the region outside the semiconductor element extend along the extending direction of the bottom line portions of these V-grooves.
A method for cutting out a semiconductor element, which is on the same straight line. 4. The method according to claim 2, wherein the V-groove is provided in a region outside the semiconductor device, and a bottom line portion of at least one of the V-grooves in the region outside the semiconductor device. Is formed on the same straight line along the extending direction of the bottom line portion of the at least one V-groove. 5. The method for cutting out a semiconductor device according to claim 2, wherein when the wafer is formed of an InP-based material, the V
A method for cutting out a semiconductor element, wherein the groove is formed using an etchant having a mixing ratio of hydrochloric acid to phosphoric acid of 4: 1. 6. The method for cutting a semiconductor device according to claim 2, wherein the V-groove is formed of a mixture of hydrochloric acid and phosphoric acid when the wafer is formed of a GaAs-based material. A method for cutting out a semiconductor element, wherein the semiconductor element is formed by using an etchant of (1) or a sulfuric acid-based etchant. 7. The method for cutting out a semiconductor device according to claim 1, wherein said semiconductor device is a laser semiconductor device having a window structure.