JPH11203165A - Test and debug system for parallel computer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance the efficiency of solving problems and to evaluate the validity of test results of repeated tests by recording information such as a process state and a memory state on a log file when communication occurs at a node and rewriting the process state and the memory state which are exchanged in inter-node communication. SOLUTION: An inter-node communication acquisition item list 30 of a parameter file which indicates data (item) that is acquired by inter-node communication, a data acquiring log production) device 10 for the inter-node communication, a communication log file 40 that is outputted by an inter-node communication data acquiring log production) device and an inter-node communication reexecuting device 20 which is given by inter-node communication data acquisition (log file) are shown. Information acquisition processing such as a process state and a memory state to a specific node is performed. When communication occurs at a node, information such as the process state and memory state is recorded on a log file and the process state and the memory state and the like which are exchanged in inter-node communication are freely rewritten.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION In a parallel program operating on a parallel computer, each node transfers an operation result (process state, memory state, etc.) processed by its own node to another node, or an operation processed by another node. When the result is received by the own node, communication processing is performed between the nodes.

[0002] The present invention relates to a parallelization test, an investigation, a reproduction test, and a repetition test using a log file of a process state and a memory state in a parallel program operating on a parallel computer. Things.

[0003]

2. Description of the Related Art In a conventional test method for a parallel program of a parallel computer, a parallel program is executed several times, and operation results output to a log file or the like are compared to confirm validity. In this test method, there is no test for verifying the validity of the intermediate result for confirming the final result of the communication processing of the parallel program execution, and no test method exists.

When a problem occurs in the execution of a parallel program in a parallel computer, there is no means for referring to the state of communication between nodes, and as a means for debugging, an output for outputting the memory contents of a variable in statement units of a program is used. A statement must be added to the program, the result must be output and the problem must be solved, and it is difficult to solve the problem when the problem is not reproducible due to the process state and the memory state in the inter-node communication processing.

[0005]

In the above-described conventional test / debugging method for a parallel computer, information obtained during the process is obtained only in the state of the memory in which the operation is finally completed (final operation result of the variable). It was not possible to control the timing of the process state and the memory state of inter-node communication. Therefore, there is no means for evaluating the efficiency of problem solving and the validity of test results in repeated tests.

According to the present invention, an apparatus for acquiring a process state and a memory state of inter-node communication as means for solving problems efficiently, and an apparatus for analyzing the acquired result and freely rewriting the process state and the memory state, etc. The purpose of the present invention is to improve the efficiency of problem solving and to evaluate the validity of test results in repeated tests.

[0007]

In order to achieve the above object, the present invention provides a process for acquiring information such as a process status and a memory status for a specific node, and a process status and a memory when communication occurs in the node. It consists of a process for recording information such as the status in a log file, and a process for freely rewriting the process status and the memory status, etc., which are transferred between nodes.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described with reference to the drawings.

FIG. 1 is a system configuration diagram of the present invention.
1 is an overall device, 30 is an inter-node communication acquisition item list of a parameter file indicating data (items) to be acquired by inter-node communication, 10 is an inter-node communication data acquisition (log creation) device, and 40 is an inter-node communication data A communication log file output by the acquisition (log creation) device. Reference numeral 20 denotes an inter-node communication re-executing device provided by inter-node communication data acquisition (log file).

FIG. 2 shows a control flow of the inter-node communication data acquisition (log creation) apparatus. 100 is an item input device for recording a state occurring in inter-node communication, 140
An inter-node communication acquisition item list file; 110, an initialization process of an inter-node communication log file; 120, a process of recording a process status, a memory status, and the like in an inter-node communication log file 150 when inter-node communication occurs; 1
Reference numeral 30 denotes a process for ending the recording in the 150 inter-node communication log file.

FIG. 3 is an example of an inter-node communication acquisition item list file for specifying inter-node communication data to be obtained by inter-node communication. In the present file example, whether or not to acquire is designated for each node, and the data to be acquired (processor state, memory state, node number to communicate, message between nodes, etc.) is given as item data.

FIG. 4 shows a recording example of an inter-node communication log file obtained by inter-node communication. This file example is
Source node number, destination node number, communication start time,
Communication time, program execution address, processor status, memory status, etc. are recorded.

FIG. 5 shows a control flow of the inter-node communication re-execution device. Reference numeral 200 denotes an input device of an inter-node communication acquisition item list file 280 representing an item for recording a state occurring in inter-node communication, 210 denotes an initialization process of an inter-node communication log file, and 220 denotes an obtained by inter-node communication. 290: Input processing of a communication log file between nodes; 230: Open processing of a log file for newly recording a communication log between nodes; 240: Input from a source node when communication occurs to a designated node specified by a file of 280 The process 250 updates the process status and the memory status, etc., with data provided from the communication log file instead of the received information. The process 250 records the process status, the memory status, etc., in the inter-node communication log file 300 when inter-node communication occurs. The process 260 is a process for ending the recording in the 300 node communication log file. 300 the determination process of designating the end of the test, 270 represents a branch processing for executing the repeat test again.

[0014]

As described above, according to the present invention, the process state and the memory state of the inter-node communication which cannot be obtained by the test method in the parallel computer can be recorded on a node-by-node basis. The analysis of this record facilitates the elucidation of the event that has occurred between the nodes. Further, it is possible to control the process state and the memory state of the inter-node communication, and it is possible to repeatedly supply the same data to a specific node. Thus, the debugging efficiency of the parallel computer is improved.

[Brief description of the drawings]

FIG. 1 shows a system configuration diagram of the present invention.

FIG. 2 shows a control flow of an inter-node communication data acquisition (log creation) apparatus.

FIG. 3 shows an example of an inter-node communication acquisition item list file.

FIG. 4 shows an example of information recorded in an inter-node communication log file.

FIG. 5 shows a control flow of the inter-node communication re-execution device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Inter-node communication data acquisition / setting processing device, 10 ... Inter-node communication data acquisition (log creation) device, 20 ... Inter-node communication re-execution device, 30-31 ... Inter-node communication acquisition item list file, 40-43 ... Node-to-node communication log file, 100-130 ... process, 200-220 ... process,
300-310 ... processing.

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Shigenori Tanji 2-4-1, Ichibancho, Aoba-ku, Sendai, Miyagi Prefecture Inside Hitachi Tohoku Software Co., Ltd.

Claims (1)

[Claims] In a test / debugging method in a parallel computer, a processor state and a memory state taken over between nodes are recorded in a log file, and a record given by the recorded log file is used to execute communication between nodes of the parallel computer. A test / debugging method characterized by the ability to perform analysis, repetitive testing, and reproduction testing in the same environment.