JPH11195777A - Solid-state image-pickup device of amplification type and reading pixel signal therefrom - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a solid-state image-pickup device of an amplification type capable of reducing a capacitive after-image and noise, while providing a large amplitude for a pixel signal and improving its dynamic range. SOLUTION: A vertical scanning line operating circuit 10 of the solid-state imaging device includes an intermediate potential generation circuit 10B. The intermediate potential circuit 10B supplies an intermediate potential to a vertical scanning line 2 to apply a bias voltage to signal detector for a selective pixel. The supply of the intermediate potential is carried out through a resetting metal-insulator-semiconductor(MIS) FET, and the intermediate potential is set at a level corresponding to a threshold voltage of the FET. Since the intermediate potential causes the threshold voltage of resetting MIS FETs for non-selected pixels to be increased due to substrate effect, a leak current can be prevented from flowing from the vertical scanning line 2 to the signal detector. As a result, the threshold voltage of the resetting MIS FET can be set low, and thus the width of a pixel signal can be made large in the signal detector.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an amplification type solid-state imaging device and a pixel signal reading method. In particular, the present invention provides a reset MISFET (Metal Insulator S
The present invention relates to an amplifying solid-state imaging device that performs bias injection from a vertical scanning line through a semiconductor field effect transistor and a method of reading out pixel signals from the device.

[0002]

2. Description of the Related Art Amplification type solid-state imaging devices in which a plurality of pixels each having a four-transistor structure are arranged in a matrix are known. One pixel includes a photoelectric conversion element and a transfer MOSFET (M
etal Oxide Semiconductor Field Effect Transisto
r), four transistors of a signal amplification MOSFET, an address signal MOSFET and a reset MOSFET are arranged.

[0003] The photoelectric conversion element is formed of a photodiode that converts an optical signal into an electric signal. The transfer MOSFET extracts a signal detected by the photoelectric conversion element to a signal detection unit. The signal amplification MOSFET is electrically connected to the vertical signal line, amplifies the signal of the signal detection unit, and outputs the amplified signal to the vertical signal line. The address signal MOSFET has a gate electrode connected to a horizontal scanning line (address signal line), a source region connected to a signal amplification MOSFET, and a drain region connected to a vertical scanning line. Selection or non-selection of a pixel is performed by a signal. Reset MOSFET
Electrically connects a source region to a signal detection unit and a drain region to a vertical scanning line. This reset MOSF
The ET performs a reset operation of the signal detection unit and a reset operation by injecting a bias into the photoelectric conversion element in a pixel signal reading operation described below.

In the pixel signal reading operation of the amplification type solid-state imaging device, first, a reset operation of a signal detection unit is performed. In this reset operation, a circuit power supply potential, for example, 3.3 V is supplied to the vertical scanning line connected to the selected pixel, and the potential of the signal detection unit of the selected pixel is held at a high potential. The circuit operation potential supplied to the vertical scanning line is supplied to the signal detection unit through the reset MOSFET.

Next, a read operation of a pixel signal is performed. In this pixel signal read operation, the signal charge obtained by the photoelectric conversion element is supplied to a signal detection unit to perform voltage conversion.This voltage change is current-amplified by a signal amplification MOSFET, and the amplified signal is converted into a vertical signal. The signal is sent to the signal detection circuit through the wire.

Next, a reset operation by bias injection of the photoelectric conversion element is performed. In the reset operation of the photoelectric conversion element, first, a vertical scanning line is set to a circuit reference potential, for example, 0V.
And the reset MOSFET and the transfer MOSFET are brought into conduction. The circuit reference potential supplied to the vertical scanning line is supplied to the photoelectric conversion element through the signal detector, and the potential of the photoelectric conversion element is held at the circuit reference potential. Next, in a state where the transfer MOSFET is maintained in a non-conductive state, when a circuit power supply potential, for example, 3.3 V, is supplied to the vertical scanning line, the potential of the photoelectric conversion element is kept at the circuit reference potential, and The potential rises to the circuit power supply potential, and the signal charge of the signal detection unit becomes empty.

In this state, finally, the potential of the photoelectric conversion element is initialized. Initialize the photoelectric conversion element by using the transfer MO
This is performed by bringing only the SFET into a conductive state and discharging the reset electric charge of the photoelectric conversion element to the vertical scanning line through the signal detection unit.

Such an operation is performed for each horizontal scanning line by the number of pixels arranged in the vertical direction.

[0009]

In the above-mentioned amplification type solid-state imaging device, the following points are not considered.

In the pixel signal reading operation, in the reset operation of the signal detection unit, the circuit power supply potential supplied to the vertical scanning line is supplied to the signal detection unit through the reset MOSFET. Since there is a drop corresponding to the threshold voltage of the reset MOSFET, a potential obtained by subtracting the threshold voltage from the circuit power supply potential is supplied to the signal detection unit. The potential supplied to this signal detection unit determines the amplitude of the pixel signal to be read out. To improve the dynamic range, the threshold voltage of the reset MOSFET is as low as possible, and the potential supplied to the signal detection unit is The higher is preferred.

In the read operation of the pixel signal, the circuit power supply potential supplied to the vertical scanning line is supplied to the signal amplification MOSFET through the address signal MOSFET. Similarly, since there is a drop corresponding to the threshold voltage of the address signal MOSFET, to prevent the voltage drop on the vertical scanning line side of the signal amplifier MOSFET and to expand the operating range of the signal amplifier MOSFET,
MO for signal amplification, with MOSFET threshold voltage as low as possible
It is preferable that the potential supplied to the SFET is as high as possible.

On the other hand, in order to suppress the capacitive image lag, it is necessary to make the potential of the photoelectric conversion element uniform every time. The suppression of the capacitive image lag can be realized by resetting the photoelectric conversion element by bias injection. That is, the reset operation is performed from the vertical scanning line to the reset MOSFET, the signal detector, and the transfer MOSFET.
The circuit reference potential is supplied to the photoelectric conversion element through each of the ETs (bias injection), and thereafter, the charge of the photoelectric conversion element is discarded through the transfer MOSFET (bias discharge).

However, when the threshold voltage of the reset MOSFET is set low in order to improve the dynamic range described above, the leakage current when the reset MOSFET is non-conductive increases. At the same time, if the threshold voltage of the address signal MOSFET is set low in order to expand the operating range of the signal amplification MOSFET, the leakage current when the address signal MOSFET is off is increased. Since the reset operation of the photoelectric conversion element is performed for all pixels connected to the horizontal scanning line, the total leak current is considerably large,
The leak current accumulated in the signal detection unit of the non-selected pixel leaks to the photoelectric conversion element. The leak current leaking to the photoelectric conversion element becomes noise. Further, in the read operation of the pixel signal, a malfunction occurs in the signal amplification MOSFET, and a change occurs in the pixel signal.

The inventor of the present application has studied a method of applying a boosted potential from a booster circuit to the gate electrode of the reset MOSFET in order to set the threshold voltage of the reset MOSFET low. However, the booster circuit requires a considerable occupied area in a circuit that gradually and repeatedly boosts the circuit power supply potential, and there is a problem that the element area of the amplification type solid-state imaging device is significantly increased. Furthermore, it is necessary to manufacture a high-breakdown-voltage reset MOSFET and a high-breakdown-voltage address signal MOSFET in consideration of the withstand voltage of the gate insulating film for the MOSFET operating at the circuit power supply voltage, which complicates the manufacturing of the amplification type solid-state imaging device. Problem arises.

The present invention has been made to solve the above problems. SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide an amplification type solid-state imaging device capable of reducing a capacitive afterimage and reducing noise while increasing the amplitude of a pixel signal and improving a dynamic range.

It is a further object of the present invention to provide an amplification type solid-state imaging device which can reduce the fluctuation of the pixel signal while preventing the malfunction of the reading operation of the pixel signal.

Still another object of the present invention is to provide an amplification type solid-state imaging device which can simplify the structure and the manufacturing.

Still another object of the present invention is to provide an image signal reading method which can achieve the above object.

[0019]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a photoelectric conversion element for converting an optical signal into an electric signal, and a signal detection unit for detecting a signal amount converted by the photoelectric conversion element. , A signal amplification transistor that amplifies the signal detected by the signal detection unit and outputs the signal to a vertical signal line, and a reset MISF that injects a bias from the vertical scanning line to the signal detection unit
In an amplification type solid-state imaging device in which pixels having ET are arranged in a matrix, an intermediate potential higher than a circuit reference potential and lower than a circuit power supply potential is supplied to a vertical scanning line, and the pixel is supplied from the vertical scanning line through a reset MISFET. And an intermediate potential generating circuit for injecting a bias into the signal detecting section.

Preferably, the pixel comprises a signal amplifying MISFET constituting a signal amplifying transistor and a reset MISFET.
A transfer MISFET for extracting a signal from the photoelectric conversion element to the signal detector, a signal amplification MISFET, and an address signal MISFET connected to each of the vertical scanning lines to select a pixel.
And a four-transistor structure including: The intermediate potential generating circuit preferably supplies an intermediate potential corresponding to the threshold voltage of the reset MISFET to the vertical scanning line. Most preferably, 0V is used as the circuit reference potential, 3.3V is used as the circuit power supply potential, and 0.3-0.7V is used as the intermediate potential.
The threshold voltage of the SFET is set to 0.3-0.7V.

In the amplification type solid-state image pickup device thus configured, bias injection (reset operation of the photoelectric conversion element) is performed at the intermediate potential by the intermediate potential generating circuit. In the selected pixel, a bias is injected from the vertical scanning line to the signal detection unit through the reset MISFET in a conductive state, and the photoelectric conversion element is reset based on the bias charge injected into the signal detection unit. Since the potential of the photoelectric conversion element is reset to a potential substantially equal to the circuit reference potential, capacitive afterimage can be prevented. On the other hand, in the non-selected pixels, the intermediate potential is supplied to the vertical scanning line, so that the apparent threshold voltage of the reset MISFET at the time of non-conduction increases due to the substrate effect, and the vertical scanning line moves to the signal detection unit from the vertical scanning line. Leakage current can be prevented. That is, the bias injection can be sufficiently performed in the selected pixel, and the leak current can be prevented in the non-selected pixel, so that the threshold voltage itself of the reset MISFET can be set low. As a result, the reset MISFET
When the readout signal is supplied to the signal detection unit through the gate (the reset operation of the signal detection unit is performed), the current drop due to the threshold voltage can be reduced, so that the detection potential width (the amplitude of the pixel signal) is sufficient in the signal detection unit. And the dynamic range can be improved. Similarly, in the pixel signal reading operation, the threshold voltage of the address signal MISFET can be lowered, so that the amount of power supply to the signal amplification MISFET can be increased and the operation range of the signal amplification MISFET can be expanded.

Further, in the amplification type solid-state imaging device,
Since the threshold voltage of each of the reset MISFET and the address signal MISFET can be lowered, it is not necessary to boost each of them, so that a booster circuit can be eliminated and a low voltage operation can be realized. Furthermore, as a result of realizing low-voltage operation, the same gate insulating film of the MISFET for reset and the MISFET for address signal can be used as the gate insulating film of the other MISFET for low-voltage operation. Can be simplified in structure and manufacturing.

Further, in the amplification type solid-state imaging device,
The intermediate potential supplied from the intermediate potential generation circuit is for reset
Since the voltage is set to be equal to the threshold voltage of the MISFET, the potential of the signal detection unit can be effectively reset to the circuit reference potential by bias injection.

Further, according to the present invention, in the above-mentioned pixel signal reading method for an amplification type solid-state imaging device, a circuit power supply potential is supplied to a vertical scanning line, and a reset MISFET of a selected pixel is provided.
Through which the signal detection unit is held at a high potential to perform a reset operation of the signal detection unit, and based on a signal obtained by the photoelectric conversion element, a potential change of the signal detection unit is amplified by a transistor for signal amplification. A pixel signal reading step of reading the read signal through a vertical signal line, and supplying an intermediate potential higher than the circuit reference potential and lower than the circuit power supply potential to the vertical scanning line, and detecting a pixel signal from the vertical scanning line through a reset MISFET. Performing a bias injection into the unit and performing a reset operation of the photoelectric conversion element.

In the amplification type solid-state imaging device configured as described above, as described above, the reading operation of the image signal which can reduce the generation of noise while improving the dynamic range can be realized.

[0026]

Embodiments of the present invention will be described below. FIG. 2 is a schematic block diagram illustrating an overall configuration of the amplification type solid-state imaging device according to Embodiment 1 of the present invention.
The amplification type solid-state imaging device includes a pixel region 1, a vertical scanning line operation circuit 10, and a signal detection circuit 20. The pixel area 1 includes a plurality of vertical scanning lines (drain lines) 2, a plurality of vertical signal lines 3, and a plurality of horizontal scanning lines (address signal lines).
4. Although not shown, a plurality of reset signal lines, a plurality of transfer gate signal lines, and a plurality of pixels P are arranged.

The plurality of vertical scanning lines 2 extend in the vertical direction, and are respectively arranged in the horizontal direction. The plurality of vertical signal lines 3 extend in the vertical direction and are arranged in the horizontal direction, similarly to the vertical scanning lines 2. The plurality of horizontal scanning lines 4 intersect with the vertical scanning lines 2, extend in the horizontal direction, and are arranged in the vertical direction. The pixels P are arranged at intersections between the vertical scanning lines 2 and the vertical signal lines 3 and the horizontal scanning lines 4, and the plurality of pixels P are arranged in a matrix.

FIG. 3 is an equivalent circuit diagram of one pixel P, and FIG.
3 is a sectional structural view showing a specific structure of each element of the pixel P. FIG. As shown in FIG. 3, the pixel P includes a photoelectric conversion element PD,
MISFETT1 for transfer, MISFETT2 for signal amplification, reset
MISFETT3, MISFETT4 for address signal, signal detection unit S
And has a four-transistor structure.

The photoelectric conversion element PD is formed by a photodiode for converting an optical signal into an electric signal. As shown on the left side in FIG. 4, the photodiode is configured such that the p-type well region 32 is used as an anode region and the n-type semiconductor region 34 formed on the main surface portion of the p-type well region 32 is used as a cathode region. . As shown in FIG. 4, the amplification type solid-state imaging device mainly includes a p-type semiconductor substrate 31, and a p-type well region 32 is formed on the p-type semiconductor substrate 31 for the purpose of constructing a complementary transistor. .

The transfer MISFETT1, as shown in FIG.
One semiconductor region is connected to the cathode region of the photoelectric conversion element PD, the other semiconductor region is connected to the gate electrode of the MISFET T2 for signal amplification through the signal detection unit S, and the gate electrode is connected to a transfer gate terminal (transfer gate signal line) TG. Connect to
The transfer MISFETT1 takes out the signal detected by the photoelectric conversion element PD to the signal detection unit S. MISFETT1 for transfer
Represents a p-type well region 3 as shown in the central portion in FIG.
2, a channel formation region, a gate insulating film 33,
It comprises a gate electrode 35 and a pair of n-type semiconductor regions 34 used as a source region and a drain region.

As shown in FIG. 3, the signal amplification MISFETT2 has a source region connected to the vertical signal line 3, and a drain region connected to the source region of the address signal MISFETT4.
The signal amplification MISFETT2 amplifies the image signal of the signal detection unit S, and outputs the amplified image signal to the vertical signal line 3.
The image signal output to the vertical signal line 3 is detected by the signal detection circuit 20 shown in FIG. MISF for signal amplification
As shown on the right side of FIG. 4, the ETT 2 includes a channel forming region formed by the p-type well region 32 and a gate insulating film 3.
3, a gate electrode 35, and a pair of n-type semiconductor regions 34 used as a source region and a drain region.

The address signal MISFET T4 has a gate electrode connected to the horizontal scanning line 4 and a drain region connected to the vertical signal line 2, as shown in FIG. MISFET for address signal
T4 selects or deselects a pixel P by a horizontal scanning signal transmitted to the horizontal scanning line 4. In addition, for address signals
The MISFET T4 supplies a circuit operating potential from the vertical scanning line 2 to the signal amplifying MISFET T2 in a pixel signal read operation. The MISFET T4 for an address signal is, as shown in the center portion in FIG. 4, a pair of channels used as a channel forming region formed by a p-type well region 32, a gate insulating film 33, a gate electrode 35, a source region and a drain region. It is composed of an n-type semiconductor region 34.

As shown in FIG. 3, the reset MISFET T3 has a source region connected to the signal detecting portion S, a drain region connected to the vertical scanning line 2, and a gate electrode connected to a reset terminal (reset signal line) RS. I do. This reset MI
The SFETT3 performs a reset operation of the signal detection unit S of the pixel P and a reset operation of the photoelectric conversion element PD by bias injection in an image signal reading operation. MISFET for reset
T3 is a channel forming region formed by the p-type well region 32 and the gate insulating film 3 as shown in the center portion in FIG.
3, a gate electrode 35, and a pair of n-type semiconductor regions 34 used as a source region and a drain region.

The transfer MISFETT constituting these pixels P
1. The four transistors of the MISFETT2 for signal amplification, the MISFETT3 for reset, and the MISFETT4 for address signal are all formed by the same manufacturing process and have substantially the same structure. For example, when a 0.7 μm process is employed in the manufacturing process of the amplification type solid-state imaging device, the gate length of the reset MISFET T3 is particularly 0.7 μm, which is the minimum processing size.
The threshold voltage of the reset MISFET T3 is set to 0.3-0.7V. MISFET for address signal
T4 is similarly formed.

FIG. 1 is a detailed equivalent circuit diagram of the vertical scanning line operation circuit 10 shown in FIG. The vertical scanning line operation circuit 10 includes a driver circuit 10A arranged for each vertical signal line (DR) 2 and the driver circuit 10A and the vertical signal line 2
And an intermediate potential generating circuit 10B arranged between the two.

The driver circuit 10A selects the vertical scanning line 2 and supplies a circuit power supply potential to the vertical scanning line 2. The operation of the driver circuit 10A is controlled by a scanning control signal DRG supplied to the vertical scanning line operation circuit 10. As shown in FIG. 1, the driver circuit 10A includes inverter circuits 11 and 12 connected in two stages in series. The final-stage inverter circuit 12 can supply a circuit power supply potential, for example, 3.3 V, to the vertical scanning line 2. Although the number of inverter circuit stages of the driver circuit 10A is not limited to two, in the case of an even number stage, if the scanning control signal DRG has a high potential, the inverter circuit 1
The output of 0A also has a high potential, and if the scanning control signal DRG has a low potential, the output of the inverter circuit 10A also has a low potential, so that the input and the output are aligned.

As shown in FIG. 1, the intermediate potential generating circuit 10B includes a transmission circuit 13, an inverter circuit 1
4, resistance elements 15 and 16 constituting a divided resistor, a capacitance element 17 for charging and discharging an intermediate potential, and a switching MISFET 18 for controlling supply of the intermediate potential. The transmission circuit 13 has a scanning control signal DRG
When the transmission circuit 13 is conducting, the transmission circuit 13 is controlled by the driver circuit 10A.
Is supplied to the vertical scanning line 2.
In the intermediate potential generating circuit 10B, the vertical scanning line 2
During the supply of the circuit power supply potential to the circuit element 1, the circuit power supply potential which is the output of the driver circuit 10A is generated at the intermediate potential by the divided resistors of the resistance elements 15 and 16, and this intermediate potential is
7 is charged. The intermediate potential is a circuit reference potential, for example,
The potential is higher than 0 V and lower than the circuit power supply potential, for example, 3.3 V, and is preferably set to a potential corresponding to the threshold voltage of the reset MISFET T3 (or the address signal MISFET T4). As described above, in the present embodiment, the threshold voltage of the reset MISFET T3 is set to 0.3 to 0.7 V, so that the intermediate potential is set to 0.3 to 0.7 V in the same manner. When the transmission circuit 13 is not conducting, the driver circuit 1
The output of 0A becomes the circuit reference potential, but the MISFET for the switch
18 becomes conductive, and the intermediate potential charged in the capacitor 17 is discharged to the vertical scanning line 2.

Next, the image signal reading operation of the amplification type solid-state imaging device configured as described above will be described with reference to FIG. FIG. 5 is a timing chart showing the operation timing of each element in the image signal reading operation.

(1) First, a reset operation of the signal detection unit S of the pixel P is performed. In this reset operation, in the selected pixel P located at the intersection of the selected vertical scanning line 2 and the selected horizontal scanning line 4, the reset MISFET T3 becomes conductive, and the circuit power supply potential from the vertical signal line 2 to the signal detection unit S, and the signal detection unit S is held at a high potential (see FIGS. 2 and 3). The vertical scanning line 2 is supplied with a circuit power supply potential from the driver circuit 10A shown in FIG. 1 through the intermediate potential generation circuit 10B, and this circuit power supply potential is supplied to the signal detection unit S through the reset MISFET T3 of the selected pixel P. The high potential supplied to the signal detection unit S is the reset MISF
Despite the threshold voltage drop of ETT3, reset MI
Since the threshold voltage of the SFET T3 is set low, the signal detection unit S is held at a sufficiently high high potential.

(2) Next, a pixel signal read operation is performed. This pixel signal reading operation is performed by supplying a pixel signal (signal charge) obtained by the photoelectric conversion element PD to the signal detection unit S through the transfer MISFET T1, and detecting a potential change of the signal detection unit S accompanying the supply of the image signal. The current is amplified by the MISFET T2 for signal amplification, and the amplified image signal is transmitted to the signal detection circuit 20 through the vertical signal line 3. Since the threshold voltage of the address signal MISFET T4 can be apparently increased by the substrate bias effect when the address signal is not selected, a leak current can be prevented. In other words, MISFET for address signal
Since the threshold voltage of T4 can be set low, the amount of current supplied from the vertical scanning line 2 to the signal amplification MISFET T2 can be increased, and the operating range of the signal amplification MISFET T2 can be expanded.

(3) Next, a reset operation by bias injection of the photoelectric conversion element PD is performed. This photoelectric conversion element PD
In the reset operation, the vertical scanning line operation circuit 1
0 in the intermediate potential generating circuit 10B.
The reset MISFETT3 and the transfer MISFETT1 are made conductive while the intermediate potential charged to the MISFETT3 is supplied to the vertical scanning line 2. The intermediate potential supplied to the vertical scanning line 2 is supplied to the photoelectric conversion element PD through the signal detection unit S, and the potential of the photoelectric conversion element PD is held substantially at the circuit reference potential. The intermediate potential supplied to the vertical signal line 2 is higher than the circuit reference potential and lower than the circuit power supply potential, as described above.
In particular, in the present embodiment, a potential corresponding to the threshold voltage of the reset MISFET T3 is used as the intermediate potential, so that 0 V corresponding to the circuit reference potential obtained by subtracting the threshold voltage of the reset MISFET T3 is equal to 0 V. Through the photoelectric conversion element PD.

At this time, in the non-selected pixel P, the intermediate potential is supplied to the vertical scanning line 2, so that the threshold voltage of the reset MISFET T3 is equivalent to the intermediate potential due to the body effect, and apparently, Rise. Therefore, the unselected pixel P
In this case, the leakage current leaking from the reset MISFET T3 in the non-conductive state can be prevented.

(4) Then, when a circuit power supply potential, for example, 3.3 V is supplied to the vertical scanning line 2 while the transfer MISFET T1 is kept in a non-conductive state, the potential of the photoelectric conversion element PD is held at the circuit reference potential. In this state, the potential of the signal detection unit S rises to the circuit power supply potential, and the signal charge of the signal detection unit S becomes empty.

In this state, finally, the photoelectric conversion element P
The potential of D is initialized. Initialization of the photoelectric conversion element PD
Only the transfer MISFET T1 is turned on, and the photoelectric conversion element P
This is performed by discharging the reset electric charge of D to the vertical scanning line 2 through the signal detection unit S. As aforementioned,
In the non-selected pixels P, the leakage current from the vertical scanning line 2 through the reset MISFET T3 to the signal detection unit S is prevented, so that the leakage current from the signal detection unit S to the photoelectric conversion element PD can be prevented. As a result, the transfer MISFETT
The threshold voltage of 1 can be set as low as the threshold voltage of the reset MISFET T3, and the amplification type solid-state imaging device can realize low voltage operation.

(5) When the reset operation of the photoelectric conversion element PD ends, the pixel signal reading operation ends for one pixel P. In the amplification type solid-state imaging device, such a pixel signal reading operation is performed by the number of pixels arranged in the vertical direction for each horizontal scanning line.

As described above, in the amplification type solid-state imaging device according to the present embodiment, the intermediate potential generation circuit 10
B, bias injection is performed at an intermediate potential, and the selected pixel P
Is reset to a potential substantially equal to the circuit reference potential, and the photoelectric conversion element PD is reset based on the bias-injected potential of the signal detection unit S. Therefore, capacitive afterimages can be prevented. On the other hand, in the non-selected pixel P, the apparent threshold voltage of the reset MISFET T3 at the time of non-conduction can be increased by the substrate effect due to the intermediate potential,
Leakage current from the vertical scanning line 2 to the signal detection unit S can be prevented. That is, since the bias injection can be sufficiently performed in the selected pixel P and the leak current can be prevented in the non-selected pixel P, the threshold voltage itself of the reset MISFET T3 can be set low. As a result, when the readout signal is supplied from the vertical scanning line 2 to the signal detection unit S through the reset MISFET T3 (when the pixel is reset), the current drop due to the threshold voltage can be reduced. The detection potential width (amplitude of the pixel signal) can be sufficiently secured, and the dynamic range can be improved.

Similarly, in the read operation of the pixel signal,
Since the threshold voltage of the address signal MISFETT4 can be reduced, the amount of power supply to the signal amplification MISFETT2 can be increased, and the operating range of the signal amplification MISFETT2 can be expanded.

Further, in the amplification type solid-state imaging device,
Since the threshold voltage of each of the reset MISFETT3 and the address signal MISFETT4 can be reduced,
There is no need to boost the ET, eliminating the need for a booster circuit and realizing low voltage operation. Further, as a result of realizing low-voltage operation, the same gate insulating film as the other low-voltage operation MISFETs can be used for the reset MISFETT3 and the address signal MISFETT4. Can be simplified in structure and manufacturing.

Further, in the amplification type solid-state imaging device,
Since the intermediate potential supplied from the intermediate potential generating circuit 10B is set to be equivalent to the threshold voltage of the reset MISFET T3, the potential of the signal detection unit S can be effectively reset to the circuit reference potential by bias injection.

Further, in the amplification type solid-state imaging device,
As described above, it is possible to realize an image signal reading operation capable of reducing the generation of noise while improving the dynamic range.

The present invention is not limited to the above embodiment. In particular, the above-described intermediate potential generation circuit 10B can be freely modified.

[0052]

According to the present invention, it is possible to provide an amplification type solid-state imaging device capable of increasing the amplitude of a pixel signal and improving a dynamic range, reducing capacitive afterimages and reducing noise. Further, the present invention can provide an amplifying solid-state imaging device capable of reducing a fluctuation of a pixel signal while preventing a malfunction of a reading operation of the pixel signal. Further, the present invention can provide an amplification type solid-state imaging device which can simplify the structure and the manufacturing.
Further, the present invention can provide an image signal reading method that can obtain these effects.

[Brief description of the drawings]

FIG. 1 is a detailed equivalent circuit diagram of a vertical scanning line operation circuit of an amplification type solid-state imaging device according to Embodiment 1 of the present invention.

FIG. 2 is a schematic block diagram illustrating an overall configuration of an amplification type solid-state imaging device.

FIG. 3 is an equivalent circuit diagram of a pixel.

FIG. 4 is a cross-sectional structural view showing a specific structure of each element of a pixel.

FIG. 5 is a timing chart showing the operation timing of each element in the image signal reading operation.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Image area 2 Vertical scanning line 3 Vertical signal line 4 Horizontal scanning line 10 Vertical scanning line operation circuit 10A Driver circuit 10B Intermediate potential generating circuit 11, 12, 14 Inverter circuit 13 Transmission circuit 15, 16 Resistance element 17 Capacitance element 18 For switching MISFET 20 signal detection circuit P pixel PD photoelectric conversion element T1 MISFET for transfer T2 MISFET for signal amplification T3 MISFET for reset T4 MISFET for address signal

Claims (4)

[Claims] A photoelectric conversion element that converts an optical signal into an electric signal; a signal detection unit that detects an amount of the signal converted by the photoelectric conversion element; and a vertical signal that amplifies the signal detected by the signal detection unit. In an amplification type solid-state imaging device in which pixels having a signal amplification transistor that outputs a signal to a line and a reset MISFET that injects a bias from a vertical scanning line to the signal detection unit are arranged in a matrix, the voltage is higher than a circuit reference potential. An amplification type comprising: an intermediate potential generating circuit that supplies an intermediate potential lower than a circuit power supply potential to the vertical scanning line, and injects a bias from the vertical scanning line to a signal detection unit of a pixel through a reset MISFET. Solid-state imaging device. 2. The method according to claim 1, wherein the pixel comprises a signal amplification MISFET constituting the signal amplification transistor, and a reset MISF.
4 including an ET, a transfer MISFET for extracting a signal from the photoelectric conversion element to the signal detection unit, the signal amplifying MISFET, and an address signal MISFET connected to each of the vertical scanning lines and selecting the pixel. An amplification-type solid-state imaging device having a transistor structure. 3. The amplifying solid-state imaging device according to claim 1, wherein the intermediate potential generating circuit supplies an intermediate potential corresponding to a threshold voltage of the reset MISFET to a vertical scanning line. 4. A photoelectric conversion element for converting an optical signal into an electric signal, a signal detection unit for detecting an amount of the signal converted by the photoelectric conversion element, and a vertical signal for amplifying the signal detected by the signal detection unit. A pixel signal reading method of an amplification type solid-state imaging device in which pixels having a signal amplification transistor that outputs a signal to a line and a reset MISFET that performs a bias injection from a vertical scanning line to the signal detection unit are arranged in a matrix, Supplying a circuit power supply potential to the vertical scanning line, holding the signal detection unit at a high potential through the reset MISFET of the selected pixel, and performing a reset operation of the signal detection unit, and a signal obtained by the photoelectric conversion element. A pixel signal reading step of amplifying a potential change of the signal detection unit by the signal amplifying transistor and reading out the amplified signal through a vertical signal line, based on a circuit reference potential. Supplying an intermediate potential higher than the circuit power supply potential to the vertical scanning line, performing bias injection from the vertical scanning line to the signal detection unit of the pixel through the reset MISFET, and performing a reset operation of the photoelectric conversion element. A pixel signal reading method for an amplification type solid-state imaging device, comprising: