JPH11191737A - Reference voltage changeover switch and voltage division circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the accuracy and the stability served voltage while suppressing feed-through current and the decline of circuit integration. SOLUTION: Each of operational amplifiers AH, AL has an operational output in response to a non-inverted input and an inverted input or it outputs a voltage difference between the non-inverted input and the inverted input. The operational output is given to a gate of a driver transistor(TR) and a voltage output of a reference voltage changeover switch is negatively fed back to the non-inverted input or the inverted input. Even when a size of driver TRs TP10, TN10 is small and their on-resistance (r) is high, the accuracy and the stability of served voltage are enhanced by the negative feedback.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switch for switching connection to one or more reference voltages, and more particularly to a reference voltage switch for an A / D converter having a ladder resistor and a D switch using the same. / A converter.

[0002]

2. Description of the Related Art FIG. 1 is a circuit diagram of a conventional R-2R type D / A converter.

In FIG. 1, an n-digit binary digital signal D of D1 to Dn is input to a switch control circuit 5. D1 is LSB (least significan
t bit), and Dn is the most significant bi
t).

The switch control circuit 5 individually turns on and off the reference voltage changeover switches SW of the changeover switch group 3 according to the binary digital signal D. By turning on and off in this manner, the connection state of the reference voltage VrefH and the reference voltage VrefL to the ladder resistor 1 is set. Also, the resistor R constituting the ladder resistor 1
The voltage is divided according to the electrical resistance ratio (the resistance value is also assumed to be R), a plurality of output voltages having different voltages are selectively set according to the value of the binary digital signal D, and output to the analog voltage output Vout. Is done. Specifically, the switch control circuit 5 changes the reference voltage VrefL from the reference voltage VrefL.
The changeover switch group 3 is controlled so that an analog voltage output Vout of a voltage up to refH, which is proportional to the value of the binary digital signal D, is set. In this way,
The binary digital signal D is an analog voltage output Vout
Is D / A converted.

Japanese Unexamined Patent Publication No. Hei 6-112833 discloses a MOS (metal oxide) used for a reference voltage switch SW in an R-2R type D / A converter as shown in FIG.
semiconductor) A technique relating to a transistor is disclosed. Due to the threshold voltage of the MOS transistor, the range of the reference voltages VrefH and VrefL can be narrowed.
Techniques for solving the problem that a transistor cannot be used and the problem that it is difficult to set the channel width of the MOS transistor are disclosed.

In JP-A-6-112833, first, a P-channel MOS transistor is used on the reference voltage VrefH side, and an N-channel MOS transistor is used on the reference voltage VrefL side, so as to suppress the above problem. .

Alternatively, the above problem is suppressed by using an analog switch composed of a P-channel MOS transistor and an N-channel MOS transistor on either side of the reference voltage VrefH and the reference voltage VrefL.

[0008]

However, in the R-2R type D / A converter of FIG. 1, not only such a problem but also an on-resistance r is added to the reference voltage switch SW.
There is a problem that the D / A conversion accuracy is reduced due to the existence of. Further, the present invention is not limited to the R-2R type D / A converter, and is not limited to such a reference voltage switch S.
When W is used, various problems occur because the on-resistance r exists in the reference voltage switch SW. It is desirable that the on-resistance r of the reference voltage switch SW is originally zero.

In the R-2R type D / A converter shown in FIG. 1, 2 is connected in series to a reference voltage switch SW.
Reference voltage changeover switch SW for one resistor R
Is added. Therefore, ΔR− (2R +
r)｝, and the D / A conversion accuracy is reduced.
Further, in order to suppress the on-resistance r, it is necessary to increase the channel width of the MOS transistor used for the reference voltage changeover switch SW and increase the transistor size, thereby increasing the cell area, which causes a problem in terms of the degree of integration. is there. or,
Even if the channel width is increased in this manner, the ON resistance r still exists to a considerable extent, and this does not solve the fundamental problem of such D / A conversion accuracy.

Further, as described above, the reference voltage VrefH
A P-channel MOS transistor is used on the side, and an N-channel MOS transistor is used on the reference voltage VrefL side. Then, in this case, when the channel width is increased and the on-resistance r is suppressed, the through current generated at a minute timing when both the P-channel MOS transistor and the N-channel MOS transistor are turned on increases.

As described above, the P-channel M is provided on either side of the reference voltage VrefH and the reference voltage VrefL.
An analog switch composed of an OS transistor and an N-channel MOS transistor is used. Then, also in this case, if the channel width is increased and the on-resistance r is suppressed, there is a problem that a through current generated at a minute timing when both analog switches are turned on increases.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional problems, and a reference voltage changeover switch capable of improving accuracy and stability of a voltage to be provided while suppressing a reduction in integration degree and a through current. And a voltage dividing circuit.

[0013]

First, a reference voltage changeover switch according to a first aspect of the present invention includes a driver power supply for supplying the reference voltage to the output of the switch, and a switch power supply for the driver power supply. The electrical conduction state has a driver transistor controlled by a voltage applied to a gate, a plus input and a minus input, and a calculation output for outputting a voltage corresponding to a voltage difference between these inputs, and the calculation output is the aforementioned An operational amplifier connected to the gate of the driver transistor, the reference voltage is input to the minus input, and the voltage output of the switch is connected to the plus input so as to perform negative feedback; and The arithmetic output is cut off, and a signal to be applied to the gate of the driver transistor is generated. By which is adapted and a connection cutoff circuit for turning off the electrical conduction state of the voltage output to the power driver of the driver transistor by is obtained by solving the above problems.

Next, a voltage dividing circuit according to a second invention of the present application is:
A ladder resistor is provided, and a reference voltage supplied to the ladder resistor is divided according to an electrical resistance ratio of a resistor constituting the ladder resistor, so that a plurality of output voltages having different voltages can be selectively obtained. In the voltage dividing circuit described above, the above-mentioned problem can be solved by switching the supply state by the reference voltage switch of the first invention.

Hereinafter, the operation of the present invention will be briefly described.

First, the operation of the reference voltage switch according to the first invention of the present application will be described.

Negative feedback control is performed so that the voltage output of the reference voltage changeover switch matches the reference voltage input to the voltage input of the reference voltage changeover switch, and the voltage output is controlled with extremely high accuracy. Therefore, the voltage of the voltage output is not affected by the on-resistance r of the MOS transistor used. As if M
The voltage output can be provided without using the on-resistance r of the OS transistor. Further, in terms of the accuracy of the voltage of the voltage output, there is no problem even if the on-resistance r of the MOS transistor used is large. Therefore, it is possible to suppress the channel width of the MOS transistor and reduce the transistor size. This is advantageous in terms of the degree of integration.

Further, in the present invention, the function as the reference voltage changeover switch is based on the connection cutoff circuit. The connection cutoff circuit cuts off the operation output to the gate and generates a signal to be applied to the gate of the driver transistor, and the signal causes the voltage output of the driver transistor to the driver power supply to be electrically conductive according to the signal. It has the function to turn off. When the switch is turned off in this way, the connection of the voltage output of the reference voltage switch to the voltage input of the reference voltage of the reference voltage switch is turned off.

Here, in the present invention, since there is no problem in the accuracy of the voltage of the voltage output as described above,
The ON resistance r of the MOS transistor used can be increased. Further, the connection cutoff circuit and other MOS transistors used in the reference voltage switch of the present invention have no problem in terms of the accuracy of the voltage of the voltage output even if the on-resistance r is large. Therefore, if the on-resistance r is not reduced, in the present invention, a through current generated at the time of switching of a MOS transistor, such as a driver transistor, is small.

As described above, according to the first aspect of the present invention, it is possible to improve the accuracy and stability of a voltage to be provided while suppressing a decrease in integration degree and a through current.

The embodiment of the reference voltage switch according to the first invention is not particularly limited. For example, as in the second invention, a ladder resistor is provided, and a reference voltage supplied to the ladder resistor is divided according to an electric resistance ratio of a resistor constituting the ladder resistor, and a plurality of voltages having different voltages are divided. The present invention may be implemented in a voltage dividing circuit that can selectively obtain an output voltage. That is, the state of the supply of the reference voltage to the ladder resistor may be switched by the reference voltage switch of the first aspect.

According to the second aspect of the present invention as well, it is possible to improve the accuracy and stability of the voltage to be provided while reducing the degree of integration and suppressing the through current.

[0023]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below in detail with reference to the drawings.

The first and second aspects of the present invention are applied to the above-described reference voltage switch SW of the R-2R D / A converter shown in FIG.
It is an embodiment and a second embodiment.

FIG. 2 is a circuit diagram around the reference voltage switch SW in these embodiments.

In FIG. 2, the digital signal DINi
The switch control circuit 5 responds to the binary digital signal D of D1 to Dn by the reference voltage switch S.
This signal is output to W, and is a signal indicated by a dashed line in FIG. In the reference voltage switch SW, the two reference voltage switches of the first invention are applied. Hereinafter, one of these reference voltage switches is referred to as a first reference voltage switch, and the other is referred to as a second reference voltage switch.
In these first and second reference voltage changeover switches, the voltage output is shown by two resistors R connected in series in FIG. 1 and by a resistor 2 in FIG.
The output to the resistor of the ladder resistor 1 shown by R.

Note that the power supply voltage V is higher than the reference voltage VrefH.
It is assumed that DD is higher. It is also assumed that the ground GND is lower than the reference voltage VrefL. That is, (power supply voltage VDD)> (reference voltage VrefH)> (reference voltage V
refL)> (ground GND).

First, in the first reference voltage switch, the driver power supply of the first invention corresponds to the power supply VDD. The driver transistor corresponds to P-channel MOS transistor TP10. The operational amplifier corresponds to the operational amplifier AH. The connection cutoff circuit corresponds to a circuit mainly including an N-channel MOS transistor TN11 and an N-channel MOS transistor TN12.

In such a first reference voltage changeover switch, when the digital signal DINi is in the H state, the N-channel MOS transistor TN11 is turned on, the P-channel MOS transistor TP12 is turned off, and the operational amplifier is turned off. The output of AH is output to the gate of P-channel MOS transistor TP10. If the voltage output of the first reference voltage switch is smaller than the reference voltage VrefH, the operational amplifier AH
Output of the P-channel MOS transistor TP1
The ON state of 0 is strengthened. When the ON state of the driver power supply having a voltage higher than the reference voltage VrefH is strengthened, the voltage output increases.

Similarly, when the digital signal DINi is in the H state, on the other hand, when the voltage output of the first reference voltage switch is larger than the reference voltage VrefH, the output of the operational amplifier AH becomes high, The ON state of MOS transistor TP10 is weakened. Reference voltage V
When the ON state of the driver power supply having a voltage higher than refH is weakened, the voltage output decreases.

As described above, when the digital signal DINi is in the H state, the operational amplifier AH and the P-channel MOS transistor TP1
0 performs negative feedback control of the voltage output in a complex manner.

On the other hand, when the digital signal DINi is in the L state in the first reference voltage switch, the N-channel MOS transistor T
N11 is turned off, and the P-channel MOS transistor T
P12 is turned on. Therefore, the output of the operational amplifier AH is cut off with respect to the gate of the P-channel MOS transistor TP10, and the output of the P-channel MOS transistor T
The gate of P10 is set to the H state, and the P-channel MOS transistor TP10 is turned off.

Next, in the second reference voltage switch, the driver power supply of the first invention corresponds to the ground GND. The driver transistor corresponds to N-channel MOS transistor TN10. The operational amplifier corresponds to the operational amplifier AL. The connection cutoff circuit mainly includes a P-channel MOS transistor TP11 and an N-channel MOS transistor.
This corresponds to the configuration including the transistor TN12.

In such a second reference voltage switch, when the digital signal DINi is in the L state, the P-channel MOS transistor TP11 is turned on, the N-channel MOS transistor TN12 is turned off, and the operational amplifier is turned off. The output of AL is output to the gate of N-channel MOS transistor TN10. When the voltage output of the second reference voltage switch is lower than the reference voltage VrefL, the output of the operational amplifier AH becomes lower, and the N-channel MOS transistor TN1
The ON state of 0 is weakened. When the ON state with respect to the ground GND whose voltage is lower than the reference voltage VrefL is weakened, the voltage output increases.

Similarly, when the digital signal DINi is in the L state, while when the voltage output of the first reference voltage switch is higher than the reference voltage VrefL, the output of the operational amplifier AH becomes higher, The ON state of MOS transistor TN10 is strengthened. Reference voltage Vr
When the on state with respect to the ground GND having a voltage lower than efL is strengthened, the voltage output decreases.

As described above, when the digital signal DINi is in the L state, the operational amplifier AL and the N-channel MOS transistor TN1
0 performs negative feedback control of the voltage output in a complex manner.

On the other hand, when the digital signal DINi is in the H state in the second reference voltage switch, the P-channel MOS transistor T
P11 is turned off, and the N-channel MOS transistor T
N12 is turned on. Therefore, the output of the operational amplifier AL is cut off with respect to the gate of the N-channel MOS transistor TN10, and the output of the N-channel MOS transistor T
The gate of N10 becomes L state, and the N-channel MOS transistor TN10 is turned off.

As described above, the reference voltage switch SW of FIG. 2 composed of the first reference voltage switch and the second reference voltage switch is a digital signal D.
When INi is in the L state, the reference voltage V
Supply a voltage equal to refL. On the other hand, when the digital signal DINi is in the H state, a voltage equal to the reference voltage VrefH is supplied as a voltage output. As described above, the reference voltage switch SW switches the voltage equal to the reference voltage VrefH or the reference voltage Vref according to the digital signal DINi.
It supplies one of the voltages equal to refL and operates as a changeover switch.

Here, the reference voltage switch SW
Is the reference voltage VrefH or the reference voltage Vref input to the voltage input of the reference voltage switch.
N, negative voltage feedback control is performed, and the voltage output is controlled with extremely high accuracy. Therefore, the voltage of the voltage output is not affected by the on-resistance r of the MOS transistor used. Therefore, in terms of the accuracy of the voltage of the voltage output, there is no problem even if the on-resistance r of the MOS transistor to be used is increased. Therefore, in the present embodiment, the first invention and the second invention can be effectively applied, and the accuracy and stability of the voltage to be provided can be improved while suppressing the reduction in the integration degree and the through current.

The P-channel MOS transistor TP11 shown in FIG.
From the output of the operational amplifier AL to the ground GND via
Provided to prevent current from flowing. The current may be large. Similarly, the N-channel MOS transistor TN11 is provided to prevent a current from flowing from the power supply VDD side to the output of the operational amplifier AH via the P-channel MOS transistor TP12. The current may be large. Here, a transfer gate may be used as the P-channel MOS transistor TP11 and the N-channel MOS transistor TN11 having such a role.

When one of the P-channel MOS transistor TP10 and the N-channel MOS transistor TN10, which is a driver transistor, is turned on, the other is always turned off. This corresponds to the reference voltage Vref
This is for selectively supplying L or the reference voltage VrefH. In addition, this is to make it difficult for a through current to flow, and to prevent an unintended resistance from being connected to the ladder resistance 1.

When the P-channel MOS transistor TP10 and the N-channel MOS transistor TN10 are switched at the timing when both the P-channel MOS transistor TP10 and the N-channel MOS transistor TN10 are turned off, the through current is further increased. Can be suppressed.

However, the reference voltage switch S
Since the accuracy of the voltage output of W is less affected,
Channel MOS transistor TP10 and N-channel MO
The ON resistance r of the S transistor TN10 can be increased. If the on-resistance r is large, the above-mentioned through current is also small, so that it is not necessary to provide the timing for turning off both as described above. In some cases,
There is no problem if both of them are turned on for a short time at the time of the switching. Further, by not providing a circuit for providing the timing of turning off both, the overall circuit area can be reduced.

The second embodiment of the present application uses the circuit shown in FIG. This circuit is configured in a portion indicated by reference numeral A in the upper right of FIG. 1, that is, a portion supplying the reference voltage VrefL.

In FIG. 3, the voltage at the connection point between N-channel MOS transistor TN20 and resistor 2R is represented by voltage G
And When the voltage G is higher than the reference voltage VrefL, the output of the operational amplifier A1 increases, the ON state of the N-channel MOS transistor TN20 is strengthened, and the voltage G is lower because the voltage of the ground GND is lower than the reference voltage VrefL. Become. On the other hand, when the voltage G is smaller than the reference voltage VrefL, the output of the operational amplifier A1 becomes smaller, the ON state of the N-channel MOS transistor TN20 is weakened, and the voltage G becomes larger.

As described above, the operational amplifier A1 and the N-channel MOS transistor TN20 perform negative feedback control of the voltage G in a complex manner. Therefore, the voltage accuracy and stability of the voltage G are improved.

Conventionally, in a portion indicated by a symbol A, a wiring resistance (parasitic resistance) for supplying a reference voltage VrefL as a voltage G.
Are indicated by resistors B1 and B2 in FIG. The wiring resistance can be as large as several Ω, which affects the D / A conversion accuracy and may not be ignored. Further, since the current of the voltage G or the reference voltage VrefL changes according to the binary digital signal D, the supplied voltage G or the reference voltage VrefL fluctuates due to the wiring resistance, which affects the D / A conversion accuracy. give. By using the circuit of FIG. 3, it is possible to operate as if there is no wiring resistance described above, and it is possible to suppress such a problem relating to conversion accuracy.

[0048]

According to the first and second aspects of the present invention, it is possible to improve the accuracy and stability of a voltage to be provided while suppressing a reduction in integration degree and a through current.

Consider a case where the first and second inventions are applied to a D / A converter and an A / D converter. Conventionally, in FIG. 1, for example, the resistance value of the resistor R is set to 0.8
If kΩ and the on-resistance r of the MOS transistor are 10 ohms, the linearity error will be about 0.2 to 0.3 LSB. However, when the present invention is applied, such an influence of the on-resistance r is eliminated, and the linearity error is reduced to 0.1.
It can be expected to be less than LSB. According to the present invention,
Since the accuracy can be increased in this manner, it is possible to reduce the resistance value of the resistor R to increase the speed and to further increase the number of conversion bits.

Also, as in the above-described embodiment, the driver transistors of two or more reference voltage changeover switches are:
Even when the present invention is provided for one reference voltage supply point, application of the present invention makes it unnecessary to reduce the on-resistance r of the driver transistor and can suppress a through current. For this reason, a circuit for providing a timing for turning off both of these driver transistors can be eliminated, and the overall circuit area can be reduced.

In the first and second inventions, it is not necessary to suppress the on-resistance r of the MOS transistor.
There is no need to increase the size of the S transistor. Thus M
Since a small OS transistor can be used, an operational amplifier or the like is newly used in the present invention, but the cell area can be reduced as a whole.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an example of an R-2R type D / A converter.

FIG. 2 shows a first embodiment to which the first invention and the second invention of the present application are applied.
Circuit diagram of the reference voltage changeover switch according to the embodiment and the second embodiment

FIG. 3 is a circuit diagram of a characteristic portion of the second embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Ladder resistance 3 ... Switch group 5 ... Switch control circuit SW ... Reference voltage switch R ... Resistor TP10, TN10 ... Driver transistor AH, AL, A1 ... Operational amplifier VrefH, VrefL ... Reference voltage

Claims (2)

[Claims] 1. A reference voltage switch for switching connection to a reference voltage, comprising: a driver power supply for supplying the reference voltage to an output of the switch; and an electrical conduction state of the switch output with respect to the driver power supply. A driver transistor controlled by a voltage applied to the gate; and a plus input and a minus input, and a calculation output for outputting a voltage corresponding to a voltage difference between these inputs. The calculation output is connected to the gate of the driver transistor. Along with
An operational amplifier connected to the minus input to receive the reference voltage, a voltage output of the switch being connected to the plus input so as to perform negative feedback, and an operational amplifier for shutting off the operational output to the gate and the driver transistor A connection cut-off circuit for generating a signal to be applied to the gate of the driver transistor and turning off the electrical conduction state of the switch output to the driver power supply of the driver transistor by the signal. Changeover switch. 2. A ladder resistor comprising a ladder resistor, a reference voltage supplied to the ladder resistor is divided according to an electrical resistance ratio of a resistor constituting the ladder resistor, and a plurality of output voltages having different voltages are selected. 2. A voltage dividing circuit according to claim 1, wherein the supply state is switched by the reference voltage switch according to claim 1.