JPH11191580A - Semiconductor wafer inspecting device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor wafer inspecting device having a constitution, which can perform the inspecting measurement for all product chips only by the simple setting by one time of series operation, regardless of the arrangement and the sizes of the product chip and a test element group(TEG) on a semiconductor wafer. SOLUTION: A semiconductor wafer inspecting device inspects a semiconductor wafer 10, wherein a product chip and a TEG chip are provided. In this case, an inspection control part 15 properly combines the wafer-stage moving scanning for the integral number of times of the product-chip size and the wafer moving scanning for each offset value by the presence of the TEG chips in a unit block, that is to say, for each integral number of times of the TEG chip size for every combination of the integral number of times of each TEG chip size, when the plural kinds of the TEG chips are present.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer inspection apparatus, and more particularly, to a semiconductor wafer inspection apparatus formed for the purpose of inspecting the quality of manufacturing processes, circuits, elements, etc. in addition to product chips.
The present invention relates to a semiconductor wafer inspection apparatus for inspecting and measuring a product chip of a semiconductor wafer provided with an EG (Test Element Group) chip.

[0002]

2. Description of the Related Art FIGS. 5 and 6 are plan views of a semiconductor wafer provided with a TEG chip.

The semiconductor wafer 50 shown in FIG. 5 has a product chip (chip indicated by a white frame) 51 and a TEG chip (chip indicated by a hatched frame) 52 of the same size. Yes, the semiconductor wafer 60 of FIG.
The product chip 61 and the TEG chip 62 have different sizes.

FIGS. 7 and 8 are explanatory views showing the configuration of a unit block of the semiconductor wafer shown in FIGS. 5 and 6. FIG. Here, the unit block refers to a unit area formed by combining a product chip and a TEG chip. In FIGS. 5 and 6, each area divided by a thick frame in the chip area is a unit block. .

The unit block shown in FIG. 7 has a horizontal block size of BX1 and a vertical block size of B.
Y1. In addition, product chips (1) to (5) and TEG
The size of the chip is the same as that of the chip (6), and the chip size in the horizontal direction is a and the chip size in the vertical direction is b.

The unit block shown in FIG. 8 has a horizontal block size of BX2 and a vertical block size of B.
Y2. In addition, product chips (7), (8), (1)
0) indicates that the horizontal chip size is a and the vertical chip size is b, but the TEG chips (9), (11),
All of (12) have different chip sizes. TE
The G chip (9) has a horizontal chip size of c, a vertical chip size of b, a TEG chip (11) has a horizontal chip size of a, a vertical chip size of d, and a TEG chip (12) has The chip size in the horizontal direction is f, and the chip size in the vertical direction is e.

[0007] The TEG chip is formed for the purpose of inspecting the quality of the manufacturing process, circuits, elements, and the like, and the like.
No test measurement is performed on the chip. Therefore, in order to improve the efficiency of the inspection and measurement of the product chip and avoid the damage of the circuit of the TEG chip, it is necessary to exclude the TEG chip and sequentially measure only the product chip.

[0008] Methods of controlling the order of measurement of chips to be measured in a semiconductor wafer inspection apparatus are roughly classified into two types. First, an external control device that controls the measurement order is used, the measurement order is set by a program in the external control device, and the inspection measurement is performed in a measurement order based on an instruction from the external control device according to the contents of the program. How to do
The second is a method in which the measurement order is set in the semiconductor wafer inspection apparatus itself, and the inspection measurement is performed while moving the chip position to be measured according to the measurement order.

FIG. 9 is a block diagram showing a connection relationship between a semiconductor wafer inspection device and an external control device.

As shown in FIG. 9, a semiconductor wafer inspection device 91 and an external control device 92 are connected by a connection wiring 93, and necessary control signals are transmitted and received from the external control device 92 to the semiconductor wafer inspection device 91. In this way, the test measurement is performed by the tester while moving the chip position to be measured. Therefore, in this case, a control program for controlling the measurement order is incorporated in the external control device 92. By creating a control program for each wafer shape (for each product), the operation of the stage of the semiconductor wafer inspection apparatus 1 can be arbitrarily controlled, so that product chips and TEG chips are arranged in any layout. It is possible to measure even a wafer that has been damaged. Normally, a tester for inspecting and measuring the functions of the chip such as electrical characteristics is also used as the external control device 92, and a product inspection program and a measurement order control program are combined and used in the tester.

FIG. 10 is an explanatory view showing the configuration of a conventional semiconductor wafer inspection apparatus provided with a measurement order control mechanism.

The semiconductor wafer inspection apparatus shown in FIG. 10 includes a chuck stage 11 on which a wafer 10 is placed and which moves and scans in a horizontal direction to change the position of a measurement chip.
A stage control unit 13 for controlling the movement scanning of the chuck stage 11; a probing unit 12 for inputting an electric signal to the measurement chip and detecting an output signal;
A prober control unit 14 for controlling the input and output of the signals, and an inspection control unit 15 for controlling the stage control unit 13 and the prober control unit 14 based on preset measurement conditions. An input signal to the probing unit 12 is controlled by a tester (not shown).

In the semiconductor wafer inspection apparatus of FIG. 10, the chip size in the X direction (horizontal direction: a direction in which a column is changed in the same row) and the Y direction (vertical direction: a direction in which a row is changed in the same column) And wafer size,
The direction of the wafer, the reference chip position (measurement start position of the wafer), the measurement order, and the like are set in the inspection control unit 15 in advance, and the inspection measurement is performed according to the measurement order. However, since the positioning of the probing unit 12 by the stage operation at the time of measurement needs to be performed with extremely high accuracy, continuous measurement can be performed in a single series of operations by using regularly arranged chips. Limited to groups. That is, it is extremely difficult at the present time to continuously and accurately measure a group of chips arranged irregularly in one series of operations, and it is expected that high integration of circuits will continue in the future. It is unlikely that such a measurement would be easy. Therefore, the measurement method using the semiconductor wafer inspection apparatus in FIG. 10 can be classified into the following two measurement methods.

The first measurement method is a method of performing measurement for each chip position of each block. For example, FIGS. 5 and 7
In the case of the semiconductor wafer shown in (1), the product chips at the positions of the chips (1) and (4) in each block are sequentially measured in the first series of operations, and the chips (2), The product chip at the position of (5) is sequentially measured, and the product chip at the position of the chip (3) of each block is sequentially measured by the third series of operations, but at the position of the chip (6) of each block. The probe of the probing unit 12 is not dropped on the TEG chip on the wafer, and the measurement is not performed.
In the case of the semiconductor wafer shown in FIGS.
Product chips at the position of chip (7) in each block are sequentially measured in the first series of operations, and product chips at the position of chip (8) in each block are sequentially measured in the second series of operations. The product chip at the position of the chip (10) of each block is sequentially measured by a series of operations, and the TEG at the position of the chip (9), (11), (12) of each block is measured.
No tip is measured.

In any case, in order to make the operation of the stage in one series of operations regular, the measurement of the product chips of the wafer is performed in three steps.
G chips are excluded from the measurement.

The second measurement method is a method of measuring a product chip by using a utility program of a semiconductor wafer inspection apparatus and registering the position of a TEG chip not to be measured before measurement beforehand. is there.

FIG. 11 is a flowchart showing an operation sequence in the case where measurement is performed by the second measurement method using the semiconductor wafer inspection apparatus of FIG. Note that the horizontal arrangement of chips is referred to as a row, and the vertical arrangement is referred to as a column.

After the measurement of one product chip is completed,
It is determined whether the chip is the last chip to be measured in the row (step S111). If the chip is not the last chip to be measured in the row, the column position of the measurement target in the same row is shifted to the next column by one column. (Step S112), and the next chip is measured (Step S11).
6).

If the chip for which measurement has been completed is the last chip to be measured in the row, it is further determined whether the chip is the last chip to be measured in the column (step S113). If it is the chip to be measured, the measurement for that wafer is terminated. On the other hand, if the chip is the last chip to be measured in the row and not the last chip to be measured in the column, the movement data up to the position of the next chip is loaded (step S114). The position is moved to the next row by one row, and the column position of the measurement target is moved to the column position of the first measurement target chip in the next row (step S115), and the next chip is measured (step S115). S116).

FIG. 12 is an explanatory diagram schematically showing an example of a stage moving operation when measurement is performed by the second measurement method using the semiconductor wafer inspection apparatus of FIG.

In this second measurement method, the product chip size and T
When the EG chip size is the same, all the product chips can be measured by one series of operations based on the chip positions registered in advance. T without measurement
At the position of the EG chip, control is performed so that the needle of the probing unit 12 is not dropped on the wafer. Therefore, even when the TEG chip size is an integral multiple of the product chip size, it is possible to measure all the product chips by one series of operations.

[0022]

However, each measuring method of each of the above-described conventional semiconductor wafer inspection apparatuses includes:
Each had the following problems.

In the case of the semiconductor wafer inspection apparatus shown in FIG. 9, an external control unit 92 controls the measuring order of product chips.
Must be prepared for each wafer shape (each product). That is, even if the product is the same product chip and TEG on the wafer
If the arrangement of the chips is different, a separate control program is required for each, and a great deal of time and effort is required to create the control program, and storage and use of the control program are complicated.

In the case of the first measurement method using the semiconductor wafer inspection apparatus shown in FIG. 10, the measurement can be performed regardless of the arrangement of the product chip and the TEG chip. Since the number of times is increased, a plurality of measurement preparations are required, and an extra measurement time is required.
In other words, an alignment time for adjusting the measurement accuracy of the prober and a positioning time for the measurement start position are required for each measurement start, divided into a plurality of times. Therefore, the efficiency of the measurement is reduced, which is a factor of raising the product cost. Furthermore, by being divided into multiple wafer measurements,
A wafer map or the like used for checking the pass / fail state and the failure classification state on a wafer becomes a plurality of pieces of information for each wafer, and a dedicated information processing device is required to view the information as one piece of information.

In the case of the second measurement method using the semiconductor wafer inspection apparatus shown in FIG. 10, when the product chip size differs from the TEG chip size as in the case of the semiconductor wafer shown in FIGS. Unless is a multiple of the product chip size, the measurement for all the product chips cannot be performed unless the series of operations for measurement is performed a plurality of times.

The present invention has been made in view of the above problems, and has as its object to provide a product chip on a semiconductor wafer and a T chip.
An object of the present invention is to provide a semiconductor wafer inspection apparatus having a configuration in which inspection and measurement of all product chips can be performed only by simple setting in a single series of operations, regardless of the arrangement and size of EG chips.

[0027]

According to a semiconductor wafer inspection apparatus according to the present invention, a semiconductor wafer provided with a plurality of unit blocks each comprising a combination of a product chip and a TEG chip is placed and a product chip to be measured is mounted. Chuck stage in which the product chip is moved and scanned in the row direction or column direction to change the position of the product chip, a measurement position management memory in which the chip size and position of the product chip and the TEG chip are registered, and the registered product Chip and TE
Based on the chip size and position of the G chip, measurement order determination means for determining the measurement order of product chips, current position detection means for detecting the position of the current measurement target, and the position of the current measurement target according to the measurement order. A relative positional relationship calculating means for calculating a relative positional relationship with the position of the next measurement position,
Based on the calculated relative positional relationship, it is determined whether or not it is necessary to perform a moving scan for each integral multiple of the chip size of the TEG chip in the row direction or the column direction, and a block control signal is generated according to the determination result. A block control unit that performs a moving scan that combines a moving scan for each integral multiple of the chip size of the product chip and a moving scan for each integral multiple of the chip size of the TEG chip in the row direction or the column direction in accordance with the block control signal. A stage control unit for generating a moving scanning control signal to instruct; a motor for moving and scanning the chuck stage according to the moving scanning control signal; a probing unit for inputting and outputting electric signals to and from a product chip; And a prober control unit for controlling the input and output of signals. The wafer stage movement scanning for each integral multiple of the size and the offset value due to the presence of the TEG chip in the unit block, that is, the wafer stage movement scanning for each integral multiple of one chip size of the TEG chip, are appropriately combined and controlled. It is possible to measure only the product chip in the shortest path by one series of operations.

When there are a plurality of types of TEG chips, the block control means determines whether or not it is necessary to perform moving scanning for each combination of an integer multiple of the chip size of one or more types of TEG chips in the row or column direction. The stage control unit performs a determination and generates a block control signal according to the determination result.The stage control unit performs a moving scan for each integral multiple of the chip size of the product chip in the row direction or the column direction according to the block control signal. It is preferable to generate a moving scan control signal for instructing a moving scan that combines moving scans for each combination of an integer multiple of one or more types of TEG chips.

[0029]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor wafer inspection apparatus according to the present invention performs a wafer stage movement scan for every integral multiple of a product chip size and a unit block in an inspection measurement of a semiconductor wafer provided with a product chip and a TEG chip. And the wafer stage movement scanning for each offset value due to the presence of the TEG chip, that is, for each integral multiple of the TEG chip size or for each combination of the multiple TEG chip sizes when there are a plurality of types of TEG chips. By providing the means, the measurement is performed only on the product chip in the shortest path by one series of operations.

Hereinafter, embodiments of a semiconductor wafer inspection apparatus according to the present invention will be described with reference to the drawings.

FIG. 1 is an explanatory diagram showing the configuration of a semiconductor wafer inspection apparatus according to an embodiment of the present invention.

The semiconductor wafer inspection apparatus according to the present invention comprises:
A chuck stage 11 on which a wafer 10 is placed and which moves and scans in a horizontal direction to change a measurement chip position.
A stage controller 13 for controlling the entire movement scan of the chuck stage 11, and an offset value due to the presence of a TEG chip in a unit block, that is, an integer multiple of the TEG chip size (including one chip size).
Or each T when there are a plurality of types of TEG chips
A block control unit 16 that controls stage movement scanning for each combination of an integer multiple of the EG chip size, and a probing unit 1 that inputs an electric signal to the measurement chip and detects an output signal.
2, a prober control unit 14 for controlling the input and output of signals of the probing unit 12, an inspection control unit 15 for controlling the stage control unit 13, the prober control unit 14, and the block control unit 16 based on preset measurement conditions. It is composed of The block control unit 16 is connected to the stage control unit 13.

The most different point of the semiconductor wafer inspection apparatus according to the present invention from the conventional semiconductor wafer inspection apparatus is that the stage control unit 13 for controlling the whole movement scan of the chuck stage 11 is based on the existence of the TEG chip in the unit block. A block control unit 16 that controls stage movement scanning for each offset value, that is, for each integral multiple of the TEG chip size or for each combination of multiple TEG chips when there are a plurality of types of TEG chips is added. It is.

As described above in the description of the conventional semiconductor wafer inspection apparatus, the stage control section 13 can normally only control the moving scan for every integral multiple of the product chip size. Therefore, the semiconductor wafer inspection apparatus according to the present invention, by adding the block control unit 16 to the stage control unit 13, performs the moving scan for each integral multiple of the product chip size and the offset value due to the presence of the TEG chip in the unit block. Every, ie
The stage movement scan is controlled by combining the stage movement scan with each integer multiple of the TEG chip size or the combination of each integer multiple of each TEG chip size when there are a plurality of types of TEG chips, and the shortest path by one series of operations is controlled. This makes it possible to measure only the product chip.

FIG. 2 is a block diagram showing a configuration of the stage controller 13 and the block controller 16 of the semiconductor wafer inspection apparatus according to the present invention.

The block control unit 16 controls the offset value in the X direction (direction in which the column is changed in the same row) due to the presence of the TEG chip in the unit block, that is, T
An in-block X-direction controller 20 for controlling stage movement scanning for each integral multiple (including one) of one chip size in the X direction of the EG chip;
Stage movement scanning is controlled for each offset value in the Y direction (direction in which a row is changed in the same column) due to the presence of the EG chip, that is, for each integral multiple (including one) of one chip size in the Y direction of the TEG chip. In-block Y-direction control unit 21 and in-block position control that controls in-block X-direction control unit 20 and in-block Y-direction control unit 21 according to the relative positional relationship between the current measurement position and the next measurement position. The inspection control section 15 is connected to the measurement position management memory 35 of the inspection control section 15.

The measurement position management memory 35 includes a position of a product chip to be measured, a position of each unit block including the product chip, a layout in each unit block, an X direction (horizontal direction) and a Y direction (vertical direction). Manages information registered in advance about the chip size, wafer size, wafer orientation, reference chip position (wafer measurement start position), product chip measurement order, and the like of the product chip and TEG chip.

The stage control section 13 has an X address section 31 for managing the X address of the current measurement position (address).
And a Y address section 32 for managing the Y address of the current measurement position (address), an intra-block X-direction control signal and an intra-block Y-direction control signal from the intra-block X-direction controller 20 and the intra-block Y-direction controller 21. An X / Y controller 3 for generating an X-direction control signal and a Y-direction control signal indicating a moving distance in the X direction and the Y direction for moving and scanning from the current measurement position to the next measurement position based on the signal.
0, an X motor driving unit 33 that drives a motor that moves and scans the chuck stage 11 in the X direction based on the X direction control signal, and drives a motor that moves and scans the chuck stage 11 in the Y direction based on the Y direction control signal. The inspection control unit 15 includes a Y-motor driving unit 34 and is connected to the measurement position management memory 35 of the inspection control unit 15.

The stage controller 13 and the block controller 16 of the semiconductor wafer inspection apparatus according to the present invention shown in FIG.
Is as follows.

The X address section 31 and the Y address section 32 constantly detect the current measurement position, and the X / Y controller section 3
Notify 0. The information on the current measurement position is further notified to the in-block position control unit 22.

The in-block position control unit 22 calculates the relative positional relationship between the current measurement position and the next measurement position from the information on the current measurement position and the information registered in the measurement position management memory 35. , In the unit block, for stage movement scanning from the current measurement position to the next measurement position.
For each offset value due to the presence of the EG chip, ie, TE
If stage movement scanning is required for each integral multiple of the G chip size or for each combination of multiples of the TEG chips when there are a plurality of types of TEG chips, the stage movement scanning is required in the X and Y directions. The stage movement scanning is notified to the intra-block X-direction control unit 20 and the intra-block Y-direction control unit 21, respectively. In response to this notification, the intra-block X-direction controller 20 and the intra-block Y-direction controller 2
Reference numeral 1 denotes an X-direction control signal in a block and a Y-direction in a block for instructing stage movement scanning for each offset value due to the presence of a TEG chip required for stage movement scanning from the current measurement position to the next measurement position. Control signal X
/ Y controller section 30. On the other hand, for the stage movement scan from the current measurement position to the next measurement position, T
When the stage movement scanning for each offset value due to the presence of the EG chip is not required, an X-direction control signal in a block and a Y-direction control signal in a block for notifying this are transmitted to the X / Y controller section 30.

When the X / Y controller 30 receives the in-block X-direction control signal and the in-block Y-direction control signal, the X / Y controller 30 sends the corresponding X-direction control signal and Y-direction control signal to the X motor drive unit 33 and the Y motor drive Each is transmitted to the unit 34. When the stage movement scanning for each offset value due to the existence of the TEG chip in the unit block is required for the stage movement scanning from the current measurement position to the next measurement position, the received X-direction control in the block is received. Based on the signal and the in-block Y direction control signal, the X direction,
An X motor control unit 3 outputs an X direction control signal and a Y direction control signal for instructing stage movement scanning required in the Y direction.
3. Transmit to the Y motor drive unit 34, respectively. That is, stage movement scanning for each offset value due to the presence of the TEG chip in the unit block is combined with stage movement scanning for each integral multiple of the product chip size as necessary, and the resultant stage movement scanning is instructed. X
The direction control signal and the Y direction control signal are transmitted to the X motor drive unit 33,
Each is transmitted to the Y motor drive unit 34.

On the other hand, when the stage movement scanning for each offset value due to the presence of the TEG chip is not required for the stage movement scanning from the current measurement position to the next measurement position, X in the block notifying the fact is provided. X direction, Y direction according to the direction control signal and the Y direction control signal in the block
An X-direction control signal and a Y-direction control signal for instructing stage movement scanning for each integral multiple of the product chip size required in the direction are transmitted to the X motor drive unit 33 and the Y motor drive unit 34
To each.

The moving scan of the chuck stage 11 is performed in accordance with the instructions of the X direction control signal and the Y direction control signal as described above. When performing inspection and measurement on a product chip of a semiconductor wafer having no TEG chip, stage control scanning for each offset value due to the presence of the TEG chip is not necessary. Stage control scanning is performed by the control unit 13 and the measurement position management memory 35.

FIG. 3 is a flowchart showing the procedure of stage movement scanning when the inspection and measurement of a product chip on a wafer is performed by the semiconductor wafer inspection apparatus according to the present invention, which is different from the conventional example shown in FIG. , A determination and a process regarding an operation in a unit block including a TEG chip are added. FIG. 4 is an explanatory diagram showing a moving scanning path when the semiconductor wafer inspection apparatus according to the present invention performs inspection measurement on the semiconductor wafers shown in FIGS. 6 and 8, and FIG. The case where the inspection is performed on the semiconductor wafer shown in FIG. 8 will be described. The operation of each component of the semiconductor wafer inspection apparatus according to the present invention will be described with reference to FIG.

Before starting the inspection, necessary information is registered in the measurement position management memory 35 provided in the inspection control unit 15. Here, the necessary information includes the position of the product chip to be measured, the position of each unit block including the product chip, information on the layout in each unit block, and the like. Specifically, the product chips p1, p in FIG.
2,. . . , P12,. . . , P24, the positions of the unit blocks B1 to B8, the vertical and horizontal block sizes BX2, BY2 in FIG. 8, and the vertical and horizontal chip sizes a, b, which determine the layout in each unit block.
Register c, d, e, f, wafer size, wafer direction, reference chip position which is the position of the product chip at which measurement is started, and the like.

Based on the above information, the inspection control unit 15 determines the measurement order of the product chips, the measurement order for each unit block, and the measurement order of the product chips in the unit blocks, and manages the measurement position according to the measurement order. The necessary information is read out from the memory 35 for use in controlling the stage movement scanning. Here, it is assumed that the measurement is performed according to the order of the measurement paths shown in FIG. The last product chip in each measurement row refers to the last product chip in the arrow direction of the measurement path in each measurement row.

After the inspection and measurement of the electrical characteristics of a certain product chip are completed, the operation for performing the moving scan of the stage 11 is started.

First, it is determined whether or not the product chip whose measurement has been completed immediately before is the last product chip in the measurement row (step S31). This determination is made by comparing the current measurement position detected by the X address section 31 and the Y address section 32 with the position of each product chip registered in the measurement position management memory 35 by the X / Y controller section 30. Do. In FIG. 6, chips p2, p3, p
9, p10, p18, p19, p23 and p24 correspond to the last product chip in each measurement row.

If the product chip is not the last product chip in the measurement row, it is further determined whether or not it is the measurement row in the unit block to which the product chip belongs, that is, the last product chip in the block measurement row. (Step S32). This determination is made by comparing the current measurement position detected by the X address unit 31 and the Y address unit 32 with the layout in each unit block registered in the measurement position management memory 35 by the in-block position control unit 22. Performed by In FIG. 6, chips P5, P7, P1
1, P12, P14, P16, P20, and P21 are not the last product chips in each measurement row, but correspond to the last product chips in each block measurement row.

When the product chip is not the last product chip in the block measurement row, the column position of the object to be measured is moved by one chip size a of the product chip in the direction in which the column is changed in the same row (step). S3
3), measure the next product chip (step S4)
0). In FIG. 6, the chips P1, P4, P6, P8, P1
3, P15, P17, and P22 correspond to product chips that are not the last product chips in each block measurement row. This operation is performed as follows. First, the in-block position control unit 22 determines the offset due to the presence of the TEG chip for stage movement scanning from the current measurement position to the next measurement position, based on the relative positional relationship between the current measurement position and the next measurement position. The in-block X-direction control signal and the in-block Y-direction control signal notifying that stage movement scanning for each value is not required are transmitted to the X / Y controller unit 30. The X / Y controller 30 performs the next measurement from the current measurement position based on the relative positional relationship between the current measurement position and the next measurement position according to the intra-block X-direction control signal and the intra-block Y-direction control signal. An X-direction control signal and a Y-direction control signal for instructing the movement scan for each integral multiple of the product chip size required for the stage movement scan to the position are set to X.
By transmitting the signals to the motor driving unit 33 and the Y motor driving unit 34, the moving scan of the chuck stage 11 is performed.

If the product chip is the last product chip in the block measurement row, an offset due to the presence of the TEG chip in the same direction is added to one chip size a of the product chip in the direction in which the column is changed in the same row. The column position of the measurement target is moved by the value (one chip size of the TEG chip), that is, by adding c or f which is the TEG chip size in the same direction (step S3).
4), measure the next product chip (step S4)
0). This operation is performed as follows. First, the in-block position control unit 22 determines the stage movement scanning required in the X direction and the Y direction from the relative positional relationship between the current measurement position and the next measurement position. When each of them is notified to the inside Y-direction control unit 21, the intra-block X-direction control unit 20,
The intra-block Y-direction controller 21 controls the intra-block X-direction to instruct stage movement scanning for each offset value due to the presence of the TEG chip required for stage movement scanning from the current measurement position to the next measurement position. A signal and an intra-block Y-direction control signal are transmitted to the X / Y controller 30. The X / Y controller unit 30 further performs a stage movement scan from the current measurement position to the next measurement position with respect to the movement scan specified by the intra-block X-direction control signal and the intra-block Y-direction control signal. An X-direction control signal and a Y-direction control signal for instructing a moving scan obtained by adding a moving scan for each integral multiple of the required product chip size are transmitted to the X motor driving unit 33 and the Y motor driving unit 34, respectively. Thus, the required chuck stage 1
One moving scan is performed.

On the other hand, when the product chip is the last product chip in the measurement row, it is further determined whether the product chip is the last chip in the measurement column (step S35). This determination is made by the X address section 31
The X / Y controller unit 30 compares the current measurement position detected by the Y address unit 32 with the position of each product chip registered in the measurement position management memory 35. In FIG. 6, only the chip P24 is the last product chip in the measurement row and the last product chip in the measurement column.

If the product chip is the last product chip in the measurement row and the last product chip in the measurement column, that is, if it is the last measurement chip P24, the measurement on the wafer is completed. I do. The wafer whose measurement has been completed is stored from the chuck stage 11 to a predetermined storage location, and the next wafer is moved onto the chuck stage 11.

If the product chip is the last product chip in the measurement row but is not the last product chip in the measurement column, the in-block position control unit 22 moves from the measurement position management memory 35 to the next measurement chip position. (Step S36), and based on the relative positional relationship between the current measurement position and the next measurement position, the stage movement scanning required in the X direction and the Y direction is performed by the in-block X-direction control unit 20, the in-block Notify to the Y-direction control unit 21 respectively. In response to this notification, the intra-block X-direction controller 2
0, the intra-block Y-direction controller 21 controls the intra-block X to instruct the stage movement scanning for each offset value due to the presence of the TEG chip required for the stage movement scanning from the current measurement position to the next measurement position. Direction control signal and Y direction control signal in block, or TEG for stage movement scanning from current measurement position to next measurement position
The intra-block X-direction control signal and the intra-block Y-direction control signal for notifying that stage movement scanning for each offset value due to the presence of a chip is not required are transmitted to the X / Y controller unit 30. The X / Y controller 30 transmits an X-direction control signal and a Y-direction control signal corresponding to the intra-block X-direction control signal and the intra-block Y-direction control signal to the X motor driving unit 33 and the Y motor driving unit 34, respectively. Thereby, the moving scan of the chuck stage 11 is performed so as to move the row position and the column position of the measurement target to the position of the next product chip to be measured (step S3).
7). Then, the next product chip is measured (step S
40). The product chips are chips P2, P3, P9, P
In the case of 10, P18, P19, and P23, the next measurement chips are chips P3, P4, P12, P13,
P21, P22, and P24.

As described above, the inspection and measurement of the next measurement chip is performed by moving and moving the chuck stage 11 in accordance with the position of the product chip for which the inspection and measurement have been completed. Upon completion, the process returns to the beginning of the flowchart again, and the same procedure is repeated until the measurement of all the product chips is completed.

As described above, the semiconductor wafer inspection apparatus according to the present invention performs wafer stage movement scanning for each integral multiple of one chip size of a product chip, and for each offset value due to the presence of a TEG chip in a unit block, ie, for each offset value. And the wafer stage movement scanning for each integral multiple of one chip size of the TEG chip, and controlling the combination appropriately, it is possible to measure only the product chip in the shortest path by one series of operations.

[0058]

According to the semiconductor wafer inspection apparatus of the present invention, in the inspection and measurement of the semiconductor wafer provided with the product chip and the TEG chip, the wafer stage movement scanning for every integral multiple of the product chip size and the unit block And the wafer stage movement scanning for each offset value due to the presence of the TEG chip, that is, for each integral multiple of the TEG chip size or for each combination of the multiple TEG chip sizes when there are a plurality of types of TEG chips. Means, a wafer stage movement scan for each integral multiple of one chip size of a product chip and an offset value due to the presence of a TEG chip in a unit block, that is, one of the TEG chips
The wafer stage movement scanning for each integral multiple of the chip size is controlled in combination as appropriate, so that only the product chips can be measured in the shortest path by one series of operations. Therefore, it is possible to reduce the alignment time for adjusting the measurement accuracy of the prober and the positioning time for the measurement start position as compared with the case where the measurement is divided into a plurality of times, thereby improving the measurement efficiency and reducing the product cost. it can.

Also, a wafer map or the like used to check the pass / fail status and the fault classification status on the wafer is collected into one piece of information for each wafer, and is used exclusively to combine the measurement results when the measurement is divided into a plurality of times. The information processing device is unnecessary, and the development cost and labor are unnecessary.

Further, the control program for controlling the wafer measurement can be simplified, and the number of TEG chips on the wafer or whether or not the TEG chips are provided is one for each product type, regardless of the arrangement. It is sufficient to prepare only the types of programs, so that the time and labor for creating the control program can be reduced, and the storage and use of the control program can be simplified.

In particular, when the ratio and type of TEG chips formed on a wafer are large, that is, when used in the development line until the production technology of new product chips is fully established or in a test line that monitors the process, It is valid.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram showing a configuration of a semiconductor wafer inspection apparatus according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a stage controller 13 and a block controller 16 of the semiconductor wafer inspection apparatus according to the present invention.

FIG. 3 is a flowchart showing a procedure of stage movement scanning when inspection measurement is performed on a product chip on a wafer by the semiconductor wafer inspection apparatus according to the present invention.

FIG. 4 is an explanatory diagram showing a moving scanning path when the semiconductor wafer inspection apparatus according to the present invention performs inspection measurement on the semiconductor wafer shown in FIGS. 6 and 8;

FIG. 5 is a plan view of a semiconductor wafer provided with a TEG chip.

FIG. 6 is a plan view of a semiconductor wafer provided with a TEG chip.

FIG. 7 is an explanatory diagram showing a configuration of a unit block of the semiconductor wafer of FIG. 5;

FIG. 8 is an explanatory diagram showing a configuration of a unit block of the semiconductor wafer of FIG. 6;

FIG. 9 is a block diagram showing a connection relationship between a semiconductor wafer inspection device and an external control device.

FIG. 10 is an explanatory diagram showing a configuration of a conventional semiconductor wafer inspection apparatus provided with a measurement order control mechanism.

FIG. 11 is a flowchart showing an operation sequence when measurement is performed by the second measurement method using the semiconductor wafer inspection device of FIG. 10;

FIG. 12 is an explanatory view schematically showing an example of a stage moving operation in a case where measurement is performed by the second measurement method using the semiconductor wafer inspection apparatus of FIG. 10;

[Explanation of symbols]

Reference Signs List 10 semiconductor wafer 11 stage (chuck stage) 12 probing unit 13 stage control unit 14 prober control unit 15 inspection control unit 16 block control unit 20 in-block X-direction control unit 21 in-block Y-direction control unit 22 in-block position control unit 30 X / Y controller unit 31 X address unit 32 Y address unit 33 X motor drive unit 34 Y motor drive unit 35 Measurement position management memory 91 Semiconductor wafer inspection device 92 External control device 93 Connection wiring a X direction of product chip (row direction) Size b Size of product chip in Y direction (column direction) c, f Size of TEG chip in X direction (row direction) d, e Size of TEG chip in Y direction (column direction) BX1, BX2 Size of unit block in X direction BY1, BY2 Unit block size in Y direction p1 to p24 Chip number B1~B8 block number (1) to (5), (7), (8), (10) a product chip (6), (9), (l0), (11) TEG chip

Claims (2)

[Claims] 1. A semiconductor wafer provided with a plurality of unit blocks each comprising a combination of a product chip and a TEG chip is mounted, and a row direction or a column of the product chip is used to change a position of the product chip to be measured. Chuck stage in which movement scanning in the direction is performed, a measurement position management memory in which the chip size and the position of the product chip and the TEG chip are registered, and the registered chip size and the position of the product chip and the TEG chip. A measuring order determining means for determining a measuring order of the product chip, a current position detecting means for detecting a position of a current measuring object, and, according to the measuring order, a position of the current measuring object and a next measuring position. A relative position relation calculating means for calculating a relative position relation with the position, based on the calculated relative position relation A block control unit that determines whether or not the moving scan is necessary for each integral multiple of the chip size of the TEG chip in the row direction or the column direction, and generates a block control signal according to the determination result; According to a block control signal, the moving scan in which the moving scan for each integral multiple of the chip size of the product chip in the row direction or the column direction is combined with the moving scan for each integral multiple of the chip size of the TEG chip. A stage controller that generates a moving scanning control signal to instruct; a motor that moves and scans the chuck stage in response to the moving scanning control signal; a probing unit that inputs and outputs electric signals to and from the product chip; A prober control unit for controlling input / output of electric signals of the probing unit. Doha inspection apparatus. 2. The semiconductor wafer inspection apparatus according to claim 1, wherein, when a plurality of types of the TEG chips are present, the block control unit controls one or more types of the TEG chips in the row direction or the column direction. A determination is made as to whether or not the moving scan is required for each combination of an integral multiple of the chip size, and a block control signal is generated in accordance with the determination result. Accordingly, the movement in which the movement scan in each of the integral multiples of the chip size of the one or more types of the TEG chips is combined with the movement scan in each of the integral multiples of the chip size of the product chip in the row direction or the column direction. A semiconductor wafer inspection apparatus for generating a moving scanning control signal for instructing scanning.