JPH11187028A - Atm exchanging device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To increase capacity and to reduce time for waiting cell transfer with the increase of capacity by covering cells outputted from a buffer to the signals of respectively different wavelength and wavelength-multiplexing this output with the same transmitting timing to transmit. SOLUTION: Cells stored in buffers B1 to BN are the cells of electric signals, converted into the cells of optical signals by electrooptical converters E/O1 to E/ON at the time of transferring and transferred to a desired address module AM1 . At this time, respectively different wavelengths are assigned to respective address modules AM1 to AMN and the converters E/O1 to E/ON convert the cells outputted from buffers B1 to BN to the cells of the optical signals of respectively different wavelengths. Then, the cells of the optical signals to be transferred are given optical wavelength multiplexing by an optical multiplexer 50 and transferred to one bus 6. Thereby, cell transfer delay time is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an ATM (Asynchronou).
s Transfer Mode). The present invention relates to a technology for increasing the capacity of an ATM switching device.

[0002]

2. Description of the Related Art In an ATM, various types of information are divided into fixed-length packets called cells and transferred. The destination of the cell is displayed, and the ATM switching device performs a switching connection for transferring the cell to a desired output line according to the destination.

A conventional ATM switching device will be described with reference to FIG. FIG. 4 is a diagram showing a configuration of a 4 × 4 basic switch in a conventional ATM switching device. FIG. 4 shows the configuration of an input buffer type basic switch in the configuration of the basic switch. In FIG. 4, reference numeral 60 denotes a cross point for transferring an ATM cell to a desired output.
Reference numerals -1 to 20-4 denote input buffers for temporarily storing cells arriving from the input lines 1-1 to 1-4, which are input data highways, and reference numeral 70 denotes an arbitration circuit for controlling cell competition. Reference numerals 2-1 to 2-4 denote output lines as output highways.

The cross point 60 is provided with the address filter 44 so that information in the header is read and
Cells can be transferred to desired output lines 2-1 to 2-4.

However, in this conventional ATM switching device,
The cells arriving from the input lines 1-1 to 1-4 are temporarily stored in the input buffers 20-1 to 20-4. If the destinations of these cells are the same, the arbitration circuit 70 performs arbitration work. Do. Such a conventional AT
In the M switching device, the processing time of the arbitration circuit 70 increases as the switch size increases, and it is difficult to increase the speed and capacity of the ATM switching device.

FIG. 5 is a diagram showing a large-scale ATM switching device using a plurality of ATM switching devices. A plurality of ATM switching devices as shown in FIG. 4 are used as basic switches, and FIG. In the case of configuring such a large-scale ATM switching device, the number of links increases with an increase in the number of basic switches, and the wires themselves become entangled with each other and become complicated. It is difficult to increase the capacity of the device.

Accordingly, the applicant of the present application has filed Japanese Patent Application No. 9-274.
No. 723, Japanese Patent Application No. 9-313359, Japanese Patent Application No. 9-33
No. 3263 (both not disclosed at the time of filing of the present application) proposed an ATM switching apparatus shown in FIGS. 6 and 7 are block diagrams of the AMT switching device of the prior application. The ATM switching apparatus shown in FIGS. 6 and 7 does not require an arbitration circuit for controlling the whole system,
Each access module synchronizes with synchronization information and a clock signal generated from the synchronization module 30 and autonomously transmits and receives cells via the bus 6. This is effective in increasing the capacity and speed as compared with the ATM switching apparatus shown in FIGS. 4 and 5, and can flexibly cope with an increase or decrease in the number of input / output lines.

In particular, in the example shown in FIG. 7, the use of both time division multiplexing and optical wavelength multiplexing simplifies the configuration of the signal frame and simplifies the synchronization circuit, and also enables the output of the number of optical wavelengths. Only the number of ports is sufficient, and the same wavelength can be used in each access module, so that the device cost can be reduced.

FIG. 8 is a diagram showing a communication status of the ATM switching device shown in FIG. In the ATM switching device shown in FIG. 6, an access module connected to a bus in a ring is
As shown in (1), cell transfer between each module is realized using time slots. Between each module, cells are transmitted and received on the bus 6 only at the timing assigned in each time slot. These transmission or reception timings are realized by synchronous control between the modules.

[0010]

As described above, in the example of the ATM switching apparatus shown in FIG.
->B->C->D->A-> ..., and receive D->D->D->
Perform in the order of C → C →. Here, access module i
Assuming that the cell transfer time required to transfer cells from the access module j to the access module j is t _i → _j and the number of access modules is N, the waiting time T _Wait for transferring from the access module i to the access module j is T _Wait = N × (N−1) × t _i → _j .

In the case of FIG. 6, four access modules are connected by a bus.
The next access timing is after a transfer time of 12 cells.
Also in the example shown in FIG. 7, when cell transfer is performed once for the same reason as in FIG. 6, the next access timing is after 12 cell transfer time.

As described above, the cell transfer rate is limited by the number of access modules. 6 and 7
In the above configuration, the bus speed becomes a bottleneck, and the limitation of the bus speed limits the capacity of the ATM switching device. Therefore, even if the configurations shown in FIGS. 6 and 7 are used, there is a restriction on speeding up due to the increase in capacity.

The present invention has been made in view of such a background, and it is possible to increase the capacity and shorten the cell transfer waiting time accompanying the increase in the capacity.
It is an object to provide a TM switching device. The present invention
AT that can flexibly respond to changes in the number of input / output lines
It is an object to provide an M switching device. SUMMARY OF THE INVENTION An object of the present invention is to provide an ATM switching device that can keep the device cost low.

[0014]

SUMMARY OF THE INVENTION The present invention is applied to an ATM switching apparatus which does not require contention control between access modules and can perform autonomous processing with a simple configuration. The main feature of the present invention is to reduce the cell transfer waiting time due to the increase in capacity by using wavelength multiplexing. As a result, cell transfer from one access module to all access modules can be performed within the same transmission timing, so that the cell transfer standby time can be reduced.

That is, the present invention relates to an ATM switching apparatus, which comprises N access modules each accommodating N (N is a natural number) inputs, a signal line connecting the N access modules, and an N switch. Synchronizing means for synchronizing the access modules, the synchronizing means for sequentially setting the reception timing from the signal line for the N access modules, and Means for sequentially setting transmission timing to said signal line addressed to an access module.
M switching device.

Here, it is a feature of the present invention that a maximum of N different wavelengths are allocated to the N access modules, and the transmission timing and the reception timing are set in the same time slot. The access module comprises: a buffer for storing the cells arriving at the N inputs in accordance with header information, respectively; storing means for converting cells output from the buffer into signals of different wavelengths; Means for wavelength multiplexing the output of the converting means at the same transmission timing for transmission. At this time, it is preferable that the access module includes a filter that inputs the wavelength-multiplexed cell and extracts a cell of a signal of a wavelength assigned to the access module.

The buffer stores electric signal cells, the converting means includes means for converting the electric signal cells into optical signal cells, and the filter comprises:
The apparatus may include means for inputting an optical wavelength multiplexed cell and extracting a cell of an optical wavelength allocated to the cell, and means for converting a cell of an optical signal extracted by the extracting means into a cell of an electric signal. desirable. At this time, it is preferable that the signal line is an optical wavelength multiplexing bus formed in a ring shape.

[0018]

Embodiments of the present invention will be described with reference to FIG. FIG. 1 is a block diagram of an ATM switching device according to an embodiment of the present invention.

The present invention relates to an ATM switching device, which includes access modules AM ₁ -AM each accommodating N inputs.
And M _N, a bus 6 which is a signal line for connecting the access module AM ₁ ~AM _N, the access module A
A reception timing control unit 9 and a transmission timing control unit 10 which are synchronization means for synchronizing M _{1 to} AM _N ;
The reception timing control unit 9 controls the access module A
The reception timing from the bus 6 is sequentially set for M _{1 to} AM _N , and the transmission timing control unit 10 sends the reception timing to the access module AM _i (i is an integer of 1 to N) during the reception. This is an ATM switching device for sequentially setting the transmission timing to the transmission bus 6.

Here, a feature of the present invention is that the access modules AM _{1 to} AM _N have different wavelengths λ ₁
Λ _N are assigned, the transmission timing and the reception timing are set in the same time slot, and the access modules AM _{1 to} AM _N classify the cells arriving at the N inputs according to the header information. a buffer B ₁ .about.B _N which is accumulated, the buffer B ₁ ~
A means for converting the cells output from the B _N in different wavelength signals of the electro-optical converter E / O ₁ ~E / O
And _N, there is to provided with an optical multiplexer 50 is a means for transmitting wavelength-multiplexed in the same transmission timing of output of the electrical-to-optical converter _{E / O 1 ~E / O N} . Further, the access module AM _{1-Am N} is provided with a filter 40 for extracting a cell of the wavelength-multiplexed cells enter the wavelength assigned thereto signals.

In the embodiment of the present invention, cells of electric signals are stored in the buffers B _{1 to} B _N , and the electro-optical converters E / O ₁ to E / O ₁ .
E / O _N converts the cell of the electric signal to the cells of the optical signal, the filter 40 receives an optical wavelength-multiplexed cell extracts cell having an optical wavelength assigned to itself is the extracted An optical / electrical converter O / E, which is a means for converting an optical signal cell into an electric signal cell, is provided. The bus 6 is an optical wavelength multiplex bus formed in a ring shape.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described. A cell arriving at the input shown in FIG. 1 passes through address filters AF _{1 to} AF _N corresponding to the address of the cell itself. Cells that have passed through the address filter AF ₁ ~AF _N in this manner, it waits until the time to be transferred stored in the respective buffers B ₁ ~B _N.

The cells stored in the buffers B _{1 to} B _N are cells for electric signals, and the electro-optical converter E / O ₁ during transfer.
Is converted into the cells of the optical signal by to E / O _N, it is transferred to the desired address module AM _i. At this time, different wavelengths are assigned to the address modules AM _{1 to} AM _N , respectively, and the electro-optical converters E / O _{1 to} E /
O _N converts the cells output from the buffer B ₁ .about.B _N in the cells of different wavelengths of light signals. The cells of the optical signal to be transferred are optically multiplexed by the optical multiplexer 50 and transferred to one bus 6.

The filter 40 receives the cell having an optical wavelength-multiplexed optical signals coming from the bus 6, extracts only by transmitting cell of a wavelength that is assigned to its own access module AM _i. Note that the reception timing control unit 9
When the reception timing of its own access module AM _i, open the gate of the gate circuit 58. Thereby, it is extracted by the filter 40, and furthermore, the photoelectric converter O /
The cell converted into an electric signal by E passes through this gate and is stored in the speed conversion buffer 59. In rate conversion buffer 59, and outputs the cell from the access module AM _i in accordance with the output speed.

FIG. 2 is a diagram showing the relationship between transmission timing and reception timing in the embodiment of the present invention. As shown in FIG. 2, in the embodiment of the present invention, the transmission timing and the reception timing can be set in the same time slot by using optical wavelength multiplexing. In this way, by using the optical wavelength multiplexing, at the same transmission timing, it is possible to establish a link from the access module AM _i to all of the access module AM ₁ ~AM _N. The example in FIG. 2 is an example using _four access modules AM _{1 to} AM ₄ .

FIG. 3 is a conceptual diagram showing a state of cell transfer according to the embodiment of the present invention. As shown in FIG. 3, in the case of t = 1 for transferring cells from the access module AM ₁ to all access module AM ₁ ~AM _N. Similarly, in the case of t = 2 to transfer the cells from the access module AM ₂ to all access module AM ₁ ~AM _N. In this way, in the case of t = i performs the cell transfer from the access module AM _i to all of the access module AM ₁ ~AM _N. When t = N + 1, it returns to t = 1. In this manner, by repeating the operation from t = 1 to _N , cell transfer between the access modules AM _{1 to} AM _N can be performed.

In this case, it is necessary to wait until after the N-1 cell transfer time from the cell transfer once to the next cell transfer. Here, _assuming that the cell transfer time from the access module AM _i to the access module AM _j is t _i → _j and the number of access modules is N, the waiting time for cell transfer from the access module AM _i to the access module AM _j is T _Wait = N × t _i → _j becomes, when compared with the example of FIGS. 6 and 7 shown in the conventional example, is shortened (N-1) times minute wait time.

[0028]

As described above, according to the present invention,
The capacity can be increased and the cell transfer delay time associated with the capacity increase can be reduced. In addition, it is possible to flexibly cope with an increase or decrease in the number of input / output lines, and it is possible to keep the apparatus cost low.

[Brief description of the drawings]

FIG. 1 is a block diagram of an ATM switching device according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating a relationship between transmission timing and reception timing according to the embodiment of the present invention.

FIG. 3 is a conceptual diagram showing a state of cell transfer according to the embodiment of the present invention.

FIG. 4 is a diagram showing a configuration of a 4 × 4 basic switch in a conventional ATM switching device.

FIG. 5 is a diagram showing a configuration of an input buffer type basic switch.

FIG. 6 is a block diagram of the AMT switching device of the prior application.

FIG. 7 is a block diagram of the AMT switching device of the prior application.

FIG. 8 is a diagram showing a communication status of the ATM switching device of the prior application.

[Explanation of symbols]

1-1 to 1-4 input line 2-1 to 2-4 output line 6 bus 9 reception timing control unit 10 transmission timing control unit 20-1 to 20-4 input buffer 30 synchronization module 40 filter 50 optical multiplexer 58 gate circuit 59 speed translation buffer 60 crosspoint 70 arbitration circuit AF ₁ ~AF _N, 44 address filters AM _{1-Am N} access module E / O ₁ ~E / O _N electrooptic converter O / E optical electrical converter

Claims (4)

[Claims] 1. An N access module for accommodating N (N is a natural number) inputs, a signal line connecting the N access modules, and synchronization means for synchronizing the N access modules. Wherein the synchronizing means includes means for sequentially setting reception timing from the signal line for the N access modules, and communication means for setting the reception timing for the signal line addressed to the access module being received during the reception timing. An ATM switching device including means for sequentially setting transmission timing, wherein the N access modules are assigned a maximum of N different wavelengths, and the transmission timing and the reception timing are set in the same time slot. The access module classifies cells arriving at the N inputs according to respective header information. A buffer for storing, a unit for converting cells output from the buffer into signals of different wavelengths, and a unit for wavelength-multiplexing and transmitting the output of the converting unit at the same transmission timing. ATM switching equipment. 2. The access module according to claim 1, wherein said access module includes a filter for inputting said wavelength-multiplexed cell and extracting a cell of a signal of a wavelength assigned to itself.
TM switching equipment. 3. The buffer according to claim 1, wherein said buffer stores electric signal cells, said converting means includes means for converting said electric signal cells into optical signal cells, and said filter comprises an optical wavelength multiplexed cell. 3. A cell according to claim 1, further comprising means for inputting a signal and extracting a cell having an optical wavelength allocated to the cell, and means for converting a cell of an optical signal extracted by the extracting means into a cell of an electric signal. ATM switching equipment. 4. The ATM switching device according to claim 1, wherein said signal line is an optical wavelength multiplexed bus formed in a ring shape.