JP3476669B2 - ATM switching equipment - Google Patents

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to an ATM (Asychronous)
Transfer Mode). The present invention relates to a technique for increasing the capacity of an ATM switching device. The present invention relates to a contention control system in a high-speed and large-capacity ATM switching device in which address modules are distributedly arranged on a ring-shaped bus.

[0002]

2. Description of the Related Art A conventional technique will be described with reference to FIG.
FIG. 7 is a diagram showing the configuration of a 4 × 4 basic switch in a conventional ATM switching apparatus. FIG. 7 illustrates the configuration of the input buffer type basic switch among the configurations of the basic switch. In FIG. 7, reference numerals 1-1 to 1-4 are input lines, reference numeral 60 is a cross point for transferring an ATM cell to a desired output, and reference numerals 20-1 to 20-4.
Is an input buffer for temporarily accumulating cells arriving from the input lines 1-1 to 1-4, reference numeral 70 is an arbitration circuit for controlling cell competition, and reference numeral 2-1
2-4 are output lines. At cross point 60,
By providing the address filter 44, the information in the header can be read and the cells can be transferred to the desired output lines 2-1 to 2-4.

The cells arriving from the input lines 1-1 to 1-4 are temporarily stored in the input buffers 20-1 to 20-4. When the destinations of these cells are the same, the arbitration circuit 70 is used. Arbitration work is done in. In such a conventional ATM switching apparatus, the processing time of the arbitration circuit 70 increases as the size of the switch increases. Therefore, the conventional A as shown in FIG.
It is difficult to increase the speed and scale of the TM switching device.

Therefore, the applicant of the present application has filed Japanese Patent Application No. 9-348.
No. 061 (unpublished at the time of filing this application) proposed an ATM switching device. This ATM switching device will be described with reference to FIGS. FIG. 8 is a diagram showing the structure of a conventional ATM switching device connected to a ring bus. FIG. 9 is a diagram for explaining a cell transfer situation by a conventional ATM switching device configuration connected to a ring bus. AT shown in FIG.
In the M switching device, an access module connected to a ring-shaped bus uses time slots to enable cell transfer between the access modules. One optical wavelength multiplex bus 6 is used as a physical configuration and is connected to a plurality of access modules AM _{1 to} AM _N. First, the cell arriving at the input line passes through the address filters AF _{1 to} AF _N corresponding to the address of the cell itself.
Cell waits until the time that is transferred in the respective buffers B ₁ ~B _N, electro-optical converter when transferring E / O ₁ ~E / O
It is electro-optically converted by _N and transferred to the desired access module as an optical signal. At this time, the optical signals transferred to the access modules AM _{1 to} AM _N are the optical multiplexer 50.
Then, the wavelengths are multiplexed and transferred to one optical wavelength multiplexing bus 6. Each access module AM ₁ ~
Synchronization information and clock signals for synchronizing AM _N are generated by synchronization module 30. This synchronization module is provided commonly to the access modules AM _{1 to} AM _N.

Next, FIG. 9 shows a logical configuration of this ATM switching apparatus. FIG. 9 shows a case where i access modules are connected. In the ATM switching apparatus shown in FIG. 9, time slots are used to schedule the time when each of the access modules AM _{1 to} AM _i can transmit. At the timing of t = 1, the cell transfer from the access module AM ₁ to the access modules AM _{1 to} AM _i is performed, and at the timing of t = 2, the cell transfer from the access module AM ₂ to the access modules AM _{1 to} AM _i. And at the timing of t = i, the access module i accesses the access modules AM _{1 to} AM _i.
Cell transfer to the destination is performed. When t = i + 1, t
= 1 is set. That is, by repeating the operation from t = 1 to i, each access module A
Cell transfer between M _{1 and} AM _i can be performed.

At this time, once a cell is transferred, it is necessary to wait for the i-cell transfer time until the next cell is transferred.
Here, assuming that the time for transferring cells from the access module AM _i to the access module AM _j is ti → j and the number of access modules is N, the access module AM _i
The waiting time T _Wait for transferring a cell from the access module AM _j to the access module AM _j is T _Wait = N × ti → j. By using wavelength multiplexing in this way, the access module AM _i can be obtained at an arbitrary time t = i.
Is logically linked to all the access modules AM _{1 to} AM _N. Further, by using both the wavelength multiplexing technique and the time division multiplexing technique, the capacity of the ATM switching device can be increased.

[0007]

In order to increase the capacity of the ATM switching device of the prior application, it is necessary to increase the number of access modules. However, from one transmission timing to the next transmission timing, it has already been stated that it is necessary to wait until (number of access modules) × (1 cell transfer time) has passed. The cycle of timing is determined.

Therefore, if the speed of the optical WDM bus is constant, the cyclic cycle of the transmission timing becomes slower as the number of access modules increases, and the cell transfer amount per constant time decreases accordingly. Further, when transferring a cell string having a short allowable delay time, a delay time longer than the allowable delay time occurs while waiting for the next transmission timing, and the cell may be discarded.

Therefore, as the number of access modules increases, it is required to speed up the optical wavelength division multiplexing bus. However, there is a limit to the speedup of the optical WDM bus,
This AT becomes a bottleneck due to the speed of the optical WDM bus.
The capacity of the M-switch is limited.

Here, in the actual ATM switching apparatus, the inventors of the present invention rarely have equal queue lengths in the buffers of all access modules, and there are variations in the queue length. We have found that if the variations can be eliminated and the queue lengths can be equalized, the cell transfer time delay can be reduced without depending on the speedup of the optical wavelength division multiplexing bus.

The present invention has been made against such a background, and it is possible to increase the capacity, and the delay of the cell transfer time accompanying the increase in capacity does not depend on the increase in bus speed. It is an object of the present invention to provide an ATM switching device that can be reduced. Furthermore, the earlier application (Japanese Patent Application No. 9-
348061), an object of the present invention is to provide an ATM switching apparatus capable of flexibly coping with an increase / decrease in the number of input / output lines. It is an object of the present invention to provide an ATM switching device that can keep the cost of the device low.

[0012]

According to the present invention, by making a cell transfer agreement between one access module and an access module installed in the vicinity of this access module, the data is stored in the buffer of its own access module. Even if it is not the transmission timing assigned to its own access module, by borrowing and using the transmission timing of the access module installed in the vicinity, without waiting until the next transmission timing cycles, The feature is that cells can be transmitted promptly. Further, when the next transmission timing is cycled, the transmission timing of the access module installed in the vicinity can be borrowed and used again m times consecutively.

AT of the prior application (Japanese Patent Application No. 9-348061)
In the M switching apparatus, each access module arranged in a distributed manner is connected to an input line and an output line, and the access modules are distributed by using both wavelength multiplexing technology and time division multiplexing technology without performing competition control. Was being processed. This was to prevent a decrease in switching ability due to having an arbitration circuit for all access modules. In the present invention, by performing contention control only between the limited access modules, the queue lengths stored in the buffers of the respective access modules are in a balanced state, which can improve the switching capability of the entire ATM switching apparatus.

That is, the present invention is an ATM switching apparatus, which includes N access modules respectively accommodating N (N is a natural number) inputs, signal lines connecting the N access modules, and the N access modules. Synchronization means for synchronizing the access modules, which synchronizes the reception timings from the signal line with respect to the N access modules, and the reception timing among the reception timings. Means for sequentially setting transmission timings to the signal lines addressed to the access module, wherein the N access modules are assigned up to N different wavelengths, and the access module is configured to operate the N modules.
A buffer that stores cells arriving at each input by dividing them according to header information, means for converting cells output from this buffer into signals of different wavelengths, and wavelength-multiplexing the output of this converting means. It is an ATM switching device provided with means for transmitting by means of transmission.

Here, a feature of the present invention is that the access module observes the queue length of the buffer of the access module installed in itself and the access module installed in the vicinity thereof, and according to the observation result of this observing means. The transmission of the cell stored in the i-th (i is a natural number, i ≦ N) buffer allocated to the access module installed in the vicinity is temporarily prohibited, and the transmission of the cell stored in its own i-th buffer is temporarily prohibited. And a means for transmitting.

When the queue length of its own i-th buffer exceeds a first threshold value, the means for transmitting the cell and the queue length of the i-th buffer of the access module installed in the vicinity and its own means for comparing the queue length of the i-th buffer and the queue length of the i-th buffer of its own and the queue length of the i-th buffer of the access module installed in the vicinity, respectively; According to the calculation result of the calculating means, when at least one of the differences exceeds the second threshold value, the means for recording the duration of this state and the recording result of the recording means set the third threshold value. When it exceeds, the transmission of the cell accumulated in the i-th buffer allocated to the access module installed in the vicinity is temporarily prohibited and the i-th buffer of its own is prohibited. It is desirable to include Bei and means for transmitting the stored cell §.

The access modules installed in the vicinity may be access modules installed on both sides, or the access modules installed in the vicinity may be access modules installed on both sides and It may be an access module adjacent to the access modules installed on both sides.

The means for transmitting the cells are consecutive m
Means for temporarily prohibiting transmission of cells stored in the i-th buffer assigned to the access module installed in the vicinity at a transmission timing of one time and transmitting the cells stored in its own i-th buffer It is also possible to adopt a configuration including.

It is preferable that the access module is provided with a filter for inputting the wavelength-multiplexed cell and extracting a cell of a signal of a wavelength assigned to itself.

Electrical signal cells are stored in the buffer, the converting means includes means for converting the electrical signal cells into optical signal cells, and the filter receives the wavelength-multiplexed cells. It may be configured to include means for extracting a cell having an optical wavelength assigned to itself, and means for converting a cell of an optical signal extracted by the extracting means into a cell of an electric signal. At this time, it is preferable that the signal line is an optical wavelength multiplexing bus formed in a ring shape.

[0021]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention will be described with reference to FIG. FIG. 1 is a diagram showing the overall configuration and a block configuration of a main part of an ATM switching apparatus according to a first embodiment of the present invention. The basic configuration of the access module of the present invention is shown in FIG.
The configuration is the same as that shown in FIG.

The present invention is an ATM switching apparatus, and as shown in FIGS. 1 and 8, N access modules AM _{1 to} AM _N respectively accommodating N inputs and the access modules AM _{1 to} AM. An optical wavelength multiplexing bus 6 as a signal line connecting _N , and a transmission timing control unit 10 and a reception timing control unit 9 which are synchronization means for synchronizing the _N access modules AM _{1 to} AM _N are provided. The timing control unit 9 sequentially sets the reception timings from the optical wavelength multiplexing bus 6 to the _N access modules AM _{1 to} AM _N , and the transmission timing control unit 10 determines whether the reception timings are being received. The transmission timings to the optical wavelength division multiplexing bus 6 addressed to the access module AM _i are sequentially set, and the access modules AM ₁ to
The AM _N, assigned up to N different wavelengths, the access module AM _{1-Am N,} said N pieces each cell arriving at the input of the buffer B ₁ accumulates the classification according to the header information .about.B _N And this buffer B ₁ ~
The electro-optical converters E / O _{1 to} E / O _N which are means for converting cells output from B _N into optical signals of different wavelengths.
If, with an optical multiplexer 50 is a means for transmitting the output of the electrical-to-optical converter E / O ₁ ~E / O _N and wavelength multiplexing A
It is a TM switching device.

Here, the feature of the present invention is that access modules AM _{1 to} AM 1 are provided as shown in FIG.
_N is provided with a queue length observation unit 20 is a means for observing the queue length of the access installed in the self and vicinity module _{AM j, AM j + 1,} AM j-1 of the buffer B ₁ .about.B _N, transmission timing The control unit 10 assigns i to the access modules AM _{j + 1} and AM _j-1 installed in the vicinity according to the observation result of the queue length observing unit 20.
The transmission of the cells stored in the _i- th buffer B _i is temporarily prohibited, and the transmission of the cells stored in its own i-th buffer B _i is performed.

As shown in FIGS. 1 and 8, the access modules AM _{1 to} AM _N are input with the wavelength-multiplexed cells and extract address cells AF ₁ to with which the cells of the signals of the wavelengths assigned to them are extracted. It has AF _N. The cell of the electrical signal is accumulated in the buffer B ₁ .about.B _N, electro-optical converter E / O ₁ ~E / O _N converts the cell of the electric signal to the cells of the optical signal, the address filter AF
_{1 to} AF _N input wavelength-multiplexed cells, extract cells of optical wavelengths assigned to themselves, and use address filter A
The optical-electrical converter O / E is provided for converting the optical signal cells extracted by F _{1 to} AF _N into electrical signal cells.

[0025]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) The configuration of the first embodiment of the present invention is shown in FIG. As shown in FIG. 1, a transmission timing control unit 10 and a queue length observing unit 20 of an arbitrary access module AM _j are arranged between adjacent access modules AM _j-1 and AM _{j + 1,} and a queue length information signal and timing control. Information can be exchanged with each other for communication. Further, the queue length observation unit 20 of each access module AM _{1-Am N} observes queue length of its own buffer B ₁ ~B _N.

FIG. 2 is a flow chart showing the operation of the transmission timing control unit 10 according to the first embodiment of the present invention. First,
The transmission timing control unit 10 controls the j-th access module AM _j and the access module A adjacent thereto.
Information on the queue lengths of the buffers B _{1 to} B _N of M _j−1 and AM _{j + 1} is shared by communication between adjacent access modules (S1). When the queue length (L _j , i) of the i-th port of the access module AM _j exceeds the threshold value Lth (S2), the adjacent access modules AM _j-1 , A
Differences ΔL1 and ΔL2 from the queue lengths (L _j−1 , i) and (L _{j + 1} , i) of M _{j + 1} are obtained (S3). This difference ΔL1,
When ΔL2 exceeds the threshold ΔLth (S4, S8), the counts n1 and n2 are taken (S5, S9). This counting is performed in order to record the duration time during which the differences ΔL1 and ΔL2 exceed the threshold value ΔLth.
1, n counts while ΔL2 exceeds the threshold ΔLth
The values of 1 and n2 continue to increase. Further, it becomes “0” when the uncounted time exceeds a certain time. This operation is repeated, and when the counted values n1 and n2 exceed an arbitrary threshold value nth (S6, S10), the j−1 th and / or j + 1 th access module A
At the timing assigned to M _j-1 and AM _{j + 1} ,
Temporarily prohibit the transmission from the i-th port in the j−1th and / or j + 1th access module AM _j−1 , AM _{j + 1} . At that transmission timing,
Transmission from the i-th port in the j-th access module AM _j is permitted m times (S7, S11). By performing this operation for "1" to N ports between the adjacent access modules, cells can be flexibly transferred to the uneven traffic.

FIG. 3 is a diagram for explaining the cell transfer status of the first embodiment of the present invention. Figure 3 (a), in the usual case, at the timing t = 1, the transmission timing is supplied to the access module AM _1, cells addressed access module AM ₁ from the access module AM _{1-Am i} transfer To be done. At timing t = 2, the access module transmission timing is provided to AM _2, access module AM ₂ from the access module AM ₁ to A
The cells addressed to M _i are transferred. At the timing t = 3, the transmission timing is given to the access module AM ₃ ,
Access module AM ₃ to access module AM
Cells addressed to _{1 to} AM _i are transferred.

As shown in FIG. 3B, when cells are accumulated in the buffer B ₄ of the access module AM ₁ in excess of the threshold value Lth, the transmission timing control unit 10 of the access module AM ₁ operates as shown in FIG. Adjacent access modules AM that operate according to the flow chart shown
_2. Get information on the queue length of buffer B ₄ of ₂ and AM _i . At this time, the buffer B of the access module AM _1
4 and the buffer B ₄ of the access module AM ₂ have a difference ΔL1 exceeding the threshold ΔLth, and the count n1 exceeds the threshold nth, at the timing t = 1, the access module AM is normally operated.
₁ transfers cells addressed to the access modules AM _{1 to} AM _i , and at timing t = 2, the access module AM ₂ transfers the cells addressed to the access modules AM _{1 to} AM _i. Cell transfer from AM ₂ to access module AM ₄ is temporarily prohibited, and cell transfer from access module AM ₁ to access module AM ₄ is performed again. At the timing t = 3, the cells addressed to the access modules AM _{1 to} AM _i are transferred from the access module AM ₃ as usual. The cell transfer pattern shown in FIG. 3B is performed every time the access modules AM ₁ and AM ₂ cycle m times of transmission timing in the future. The value of m is set each time according to the queue length information obtained by the transmission timing control unit 10, but a predetermined value may be set in advance for simplifying the control.

FIG. 3 shows an example in which the access module AM ₂ adjacent to the access module AM ₁ satisfies the threshold conditions shown in FIG. 2 and the transmission timing is transferred to the access module AM _1. If the access module AM _i adjacent to the module AM ₁ also satisfies the conditions of the threshold values shown in FIG. 2, the transmission timing can be transferred to the access module AM ₁ together with the access module AM ₂ . If the access module AM ₂ does not satisfy the threshold conditions shown in FIG. 2 and the access module AM _i satisfies the threshold conditions shown in FIG. 2, the access module AM _i accesses the transmission timing. It will be transferred to module AM ₁ .
Therefore, the number of access modules that can transfer the transmission timing to the access module AM ₁ changes between "0" and "2" depending on the situation at that time.

(Second Embodiment) FIG. 4 shows the configuration of the second embodiment of the present invention. FIG. 4 is a diagram showing the overall structure and the block structure of the main part of an ATM switching apparatus according to the second embodiment of the present invention. As shown in FIG. 4, an arbitrary access module AM _j
Transmission timing control unit 10 and queue length observing unit 20
Are access modules AM _j-1 and A between adjacent
M _{j + 1} , and the access module AM _j-2 next to it,
Communication can be performed by exchanging queue length information signals and timing control information between AM _{j + 2} and AM _{j + 2} . In addition, the queue length observing unit 2 of each access module AM _{1 to} AM _N
0 observes queue length of its own buffer B ₁ ~B _N.

FIG. 5 is a flow chart showing the operation of the transmission timing control unit 10 according to the second embodiment of the present invention. First,
The transmission timing control unit 10 controls the j-th access module AM _j and the access module A adjacent thereto.
M _j-1 , AM _{j + 1} and its adjacent access module A
The queue length information of _{M j-2, AM j +} 2 buffer B ₁ .about.B _N are shared by communication between the adjacent and next access module (S21). Access module A
The queue length (L _j , i) of the i-th port of M _j is the threshold L
When it exceeds th (S22), the queue lengths (L _j-2 , i) of the adjacent access modules AM _j-1 , AM _{j + 1} and the adjacent access modules AM _j-2 , AM _{j + 2} ,
Differences ΔL22, ΔL12, ΔL11, and ΔL21 from (L _j−1 , i) (L _{j + 1} , i) and (L _{j + 2} , i) are obtained (S
23). This difference ΔL22, ΔL12, ΔL11, ΔL
21 exceeds the threshold ΔLth (S24, S28, S
32, S36), counts n22, n12, n11, n
21 is taken (S25, S29, S33, S37). This count is the difference ΔL22, ΔL12, ΔL11, ΔL.
21 is performed in order to record the duration time in which the threshold value ΔLth is exceeded, and the differences ΔL22, ΔL12, Δ
The values of the counts n22, n12, n11, and n21 continue to increase while L11 and ΔL21 exceed the threshold value ΔLth. Further, it becomes “0” when the uncounted time exceeds a certain time. This work is repeated, and when the counted values n22, n12, n11, and n21 exceed an arbitrary threshold value nth (S26, S30, S34, S3).
8), at the transmission timing assigned to the j−1 th and / or j + 1 th and / or j−2 th and / or j + 2 th access module AM _j−1 , AM _{j + 1} , AM _j−2 , AM _{j + 2} , j-1st and / or j + 1st and / or j-2nd and / or j + 2
Th access module AM _j-1 , AM _{j + 1} , AM
Temporarily prohibit transmission from the i-th port of _j-2 and AM _{j + 2} . At that timing, transmission from the i-th port in the j-th access module AM _j is permitted m times (S27, S31, S35, S3).
9). By performing this operation for "1" to N ports between the adjacent access modules, cells can be flexibly transferred to the uneven traffic.

FIG. 6 is a diagram for explaining the cell transfer status of the second embodiment of the present invention. As shown in FIG. 6 (a), the usual case, at the timing t = 1, the transmission timing is supplied to the access module AM _1, the access module AM ₁ cell addressed access module AM _{1-Am i} Transfer To be done. At timing t = 2, the access module transmission timing is provided to AM _2, access module AM ₂ from the access module AM ₁ to A
The cells addressed to M _i are transferred. At the timing t = 3, the transmission timing is given to the access module AM ₃ ,
Access module AM ₃ to access module AM
Cells addressed to _{1 to} AM _i are transferred.

As shown in FIG. 6B, when cells are accumulated in the buffer B ₄ of the access module AM ₁ in excess of the threshold value Lth, the transmission timing control unit 10 of the access module AM ₁ operates as shown in FIG. Adjacent access modules AM that operate according to the flow chart shown
₂ and AM _i and its adjacent access module A
Obtain information on the queue length of buffer B ₄ of M ₃ and AM _i-1 . At this time, the queue length difference ΔL11 between the buffer B ₄ of the access module AM _{1 and} the buffer B ₄ of the access module AM ₂ and the access module AM ₁
Difference ΔL21 queue length has exceeded the threshold value ΔLth the buffer B ₄ and buffer B ₄ of the access module AM _3, further count n11 and n21 threshold n
If beyond th, at the timing t = 1, as usual, from the access module AM ₁ cell addressed access module AM _{1-Am i} is forwarded further, the timing t = 2, the access module AM ₂ access module Although it is a transmission timing to transfer cells to AM _{1 to} AM _i , cell transfer from access module AM ₂ to access module AM ₄ is temporarily prohibited, and access module AM ₁ to access module AM ₄
The cell transfer to is performed again. At the timing t = 3,
Access module AM ₃ is access module AM ₁
~ It is the transmission timing to transfer cells to AM _i .
Access module AM ₃ to access module AM
_Then , the cell transfer to the access module AM ₄ is temporarily prohibited, and the cell transfer from the access module AM ₁ to the access module AM ₄ is performed again. The cell transfer pattern shown in FIG. 6B is performed every time the access modules AM ₁ , AM ₂ , and AM ₃ cycle the transmission timing m times in the future. The value of m is set each time according to the queue length information obtained by the transmission timing control unit 10, but a predetermined value may be set in advance for simplifying the control.

[0034] Figure 6, the access module access module AM ₂ and access module AM ₃ neighboring the adjacent AM ₁ has met the threshold conditions shown in FIG. 5, the access transmission timing module AM ₁
Although an example in which cede to, if they meet the access module AM _i and its neighbor access module AM _i-1 is also the threshold value of the condition shown in FIG. 5 adjacent to the access module AM _1, the access module AM ₂ And A
Access module AM for transmission timing with M ₃
Can be transferred to ₁ . As described above, any one of the access modules AM _i , AM _i-1 , AM ₂ , and AM ₃ is shown in FIG.
If the conditions of the threshold values shown in are satisfied, the access module determines the transmission timing.
It will be transferred to ₁ . Therefore, the number of access modules that can transfer the transmission timing to the access module AM ₁ changes between “0” and “4”.

[0035]

As described above, according to the present invention,
The capacity can be increased, and the delay in cell transfer processing time accompanying the increase in capacity can be reduced without depending on the increase in bus speed. Further, it is possible to flexibly cope with the increase and decrease of the number of input / output lines and to keep the device cost low.

[Brief description of drawings]

FIG. 1 is a diagram showing an overall configuration and a block configuration of a main part of an ATM switching apparatus according to a first embodiment of the present invention.

FIG. 2 is a flowchart showing an operation of a transmission timing control unit according to the first embodiment of the present invention.

FIG. 3 is a diagram for explaining a cell transfer situation according to the first embodiment of the present invention.

FIG. 4 is a diagram showing an overall configuration and a block configuration of a main part of an ATM switching apparatus according to a second embodiment of the present invention.

FIG. 5 is a flowchart showing the operation of the transmission timing control unit of the second embodiment of the present invention.

FIG. 6 is a diagram for explaining the cell transfer status of the second embodiment of the present invention.

FIG. 7 is a diagram showing a configuration of a 4 × 4 basic switch in a conventional ATM switching device.

FIG. 8 is a diagram showing a configuration of a conventional ATM switching apparatus connected to a ring bus.

FIG. 9 is a diagram for explaining a cell transfer situation by a conventional ATM switching device configuration connected to a ring bus.

[Explanation of symbols]

1-1 to 1-4 Input line 2-1 to 2-4 Output line 6 Optical wavelength division multiplexing bus 9 Reception timing control unit 10 Transmission timing control unit 20 Queue length observing unit 20-1 to 20-4 Input buffer 30 Synchronization module 40 filter 50 optical coupler 58 gate circuit 59 speed translation buffer 60 crosspoint 70 arbitration circuit AF, AF ₁ ~AF _N address filters AM _{1-Am N} access module B ₁ .about.B _N buffer E / O ₁ ~E / O _N electro-optical converter O / E opto-electric converter

Continuation of front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H04L 12/28

Claims (8)

(57) [Claims] 1. N access modules respectively accommodating N (N is a natural number) inputs, a signal line connecting the N access modules, and a synchronization means for synchronizing the N access modules. The synchronizing means comprises means for sequentially setting reception timings from the signal line to the N access modules, and means for setting the reception line to the access module receiving during the reception timing. Means for sequentially setting transmission timing, wherein a maximum of N different wavelengths are assigned to the N access modules, and the access module determines cells arriving at the N inputs according to header information. A buffer that stores separately, and a means that converts cells output from this buffer into signals of different wavelengths, In the ATM switching apparatus, which is provided with a means for wavelength-multiplexing and transmitting the output of the converting means, the access module observes queue lengths of the buffers of the access modules installed in the access module and in the vicinity thereof, and According to the observation result of the observing means, the transmission of the cell accumulated in the i-th (i is a natural number, i ≦ N) buffer allocated to the access module installed in the vicinity is temporarily prohibited and the i-th Means for transmitting the cells stored in the buffer of the ATM switching apparatus. 2. The means for transmitting the cell is its own i
When the queue length of the second buffer exceeds the first threshold,
The queue length of the i-th buffer of the access module installed in the vicinity is compared with the queue length of the i-th buffer of its own, and the queue length of the i-th buffer of its own and the access module installed in the vicinity are compared. Means for calculating the difference from the queue length of the i-th buffer, and when at least one of the differences exceeds the second threshold value according to the calculation result of the calculating means, the duration of this state And a recording result of the recording means exceeds a third threshold, the transmission of the cell accumulated in the i-th buffer assigned to the access module installed in the vicinity is temporarily transmitted. 2. The ATM switching apparatus according to claim 1, further comprising means for prohibiting and transmitting a cell stored in its i-th buffer. 3. The ATM switching apparatus according to claim 1, wherein the access modules installed in the vicinity are access modules installed on both sides. 4. The ATM according to claim 1, wherein the access modules installed in the vicinity are access modules installed on both sides and access modules adjacent to the access modules installed on both sides.
Exchange device. 5. The means for transmitting the cell temporarily prohibits the transmission of the cell stored in the i-th buffer assigned to the access module installed in the proximity at the transmission timing of m consecutive times. 3. The ATM switching apparatus according to claim 1, further comprising means for transmitting the cell stored in its i-th buffer. 6. The access module according to claim 1, further comprising a filter for inputting the wavelength-multiplexed cell and extracting a cell of a signal of a wavelength assigned to the access module.
TM exchange device. 7. The buffer stores electrical signal cells, the converting means includes means for converting the electrical signal cells into optical signal cells, and the filter includes wavelength-multiplexed cells. 7. The ATM according to claim 1 or 6, further comprising means for extracting a cell having an optical wavelength which is input and assigned to itself, and means for converting a cell of an optical signal extracted by the extracting means into a cell of an electric signal. Exchange device. 8. The ATM switching apparatus according to claim 1, wherein the signal line is an optical wavelength division multiplexing bus formed in a ring shape.