JPH11186613A - Semiconductor light emitting device - Google Patents

Semiconductor light emitting device

Info

Publication number
JPH11186613A
JPH11186613A JP35047997A JP35047997A JPH11186613A JP H11186613 A JPH11186613 A JP H11186613A JP 35047997 A JP35047997 A JP 35047997A JP 35047997 A JP35047997 A JP 35047997A JP H11186613 A JPH11186613 A JP H11186613A
Authority
JP
Japan
Prior art keywords
light
light emitting
layer
emitting device
metal layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP35047997A
Other languages
Japanese (ja)
Inventor
Kenichi Koya
賢一 小屋
Toshiro Kitazono
俊郎 北園
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP35047997A priority Critical patent/JPH11186613A/en
Publication of JPH11186613A publication Critical patent/JPH11186613A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/32257Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic the layer connector connecting to a bonding area disposed in a recess of the surface of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
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    • H01L2924/01Chemical elements
    • H01L2924/01015Phosphorus [P]
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1203Rectifying Diode
    • H01L2924/12036PN diode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
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    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3025Electromagnetic shielding

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)
  • Led Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To improve luminous intensity from a main light leading-out surface, by effectively using a reflected light, even in the case of assembly which fixes a light emitting element by using conductive paste in which, for example, Ag is mixed. SOLUTION: In a light emitting element 2, a P-type semiconductor layer 2a and an N-type semiconductor layer 2b are laminated and electrodes 2a-1, 2b-1 are formed. The surface of the P-type layer 2a which is used as a main light leading-out surface is set as the light emitting direction, and the light emitting element 2 is mounted on a lead frame 1 and fixed with conductive paste 4. In this semiconductor light emitting device, the N-type layer 2b is transparent, and a metal layer 5 whose material is different from the electrode 2b-1 is formed on the surface where the N-type layer is buried in the conductive paste 4 and the electrode 2b-1 is formed. A light from a PN junction region is shielded or reflected toward the main light leading-out surface by the metal layer 5.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体膜層を積層
成長させた発光素子を備える発光装置に係り、特に主光
取出し面の反対側の面から抜ける光を効率的に主光取出
し面側へ反射させて発光効率を向上させるようにした半
導体発光装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light-emitting device having a light-emitting element in which semiconductor film layers are stacked and grown, and more particularly to a light-emitting device on the side of a main light extraction surface which efficiently emits light exiting from a surface opposite to a main light extraction surface. The present invention relates to a semiconductor light emitting device that reflects light to improve light emission efficiency.

【0002】[0002]

【従来の技術】半導体薄膜層を結晶基板の上に成長させ
て可視光発光デバイスとした発光素子として、GaPや
GaAlAs等を利用した化合物半導体が従来から広く
利用されている。このほかに、GaN系化合物を利用し
た半導体も近来では青色,緑色発光ダイオードの分野で
の展開が急速に進んでいる。
2. Description of the Related Art A compound semiconductor using GaP, GaAlAs, or the like has been widely used as a light emitting device for a visible light emitting device by growing a semiconductor thin film layer on a crystal substrate. In addition, semiconductors using GaN-based compounds have recently been rapidly developing in the field of blue and green light emitting diodes.

【0003】GaPやGaAlAs等のIII−V族の化
合物半導体については、旧来から各種の研究がなされ、
化合物組成の材料改良技術に関する開発は既にし尽くさ
れたといってもよい程である。一方、これらの組成化合
物に代わる新たな材料の研究も現在ではその途上にある
が、GaPやGaAlAs等の材料はコストパフォーマ
ンスの点においては、新材料と比較して優れている。し
たがって、現在急速に普及している携帯電話やローコス
トパネル等の分野では、依然として従来からの材料を多
用している傾向にある。
[0003] Various studies have been made on III-V group compound semiconductors such as GaP and GaAlAs from the past.
The development of the technology for improving the material of the compound composition has been almost exhausted. On the other hand, research on new materials replacing these composition compounds is still in progress, but materials such as GaP and GaAlAs are superior to new materials in terms of cost performance. Therefore, in the fields of mobile phones and low-cost panels that are rapidly spreading at present, there is still a tendency to use many conventional materials.

【0004】GaPやGaAlAs等の化合物半導体を
利用した半導体発光素子では、化合物半導体自身または
基板の表面に化合物の半導体薄膜を成長形成していくと
いうのがその基本的な製造方法である。そして、GaP
やGaAlAs等の半導体化合物を利用する発光素子で
は、たとえば下層をn型層及び上層をp型層としてp−
n接合して、これらのn型層及びp型層のそれぞれにn
側電極及びp側電極を設けることができるので、結晶基
板の上に積層するものではこの結晶基板は導電性のもの
が利用できる。
In a semiconductor light emitting device using a compound semiconductor such as GaP or GaAlAs, the basic manufacturing method is to grow a compound semiconductor thin film on the compound semiconductor itself or on the surface of a substrate. And GaP
In a light-emitting element using a semiconductor compound such as GaAlAs or GaAlAs, for example, the lower layer is an n-type layer and the upper layer is a p-type layer.
An n-junction is applied to each of these n-type and p-type layers.
Since the side electrode and the p-side electrode can be provided, a conductive one can be used for the crystal substrate when the crystal substrate is laminated on the crystal substrate.

【0005】このように結晶基板を導電性とすることが
できるので、この結晶基板をリードフレームに固定する
ための接着剤は導電性のものが利用される。そして、導
電性を持つ接着剤としては、たとえば透明のエポキシ樹
脂を主剤としこれにフィラーとしてAgを混入したもの
が好適に利用できることが既に知られていて、混入した
Agによって十分な導電性が得られる。
Since the crystal substrate can be made conductive as described above, a conductive adhesive is used for fixing the crystal substrate to the lead frame. As an adhesive having conductivity, for example, it is already known that a material obtained by mixing a transparent epoxy resin as a main component and Ag as a filler can be suitably used, and sufficient conductivity can be obtained by the mixed Ag. Can be

【0006】たとえば窒化ガリウム系化合物の半導体素
子では、p側及びn側のそれぞれの電極を基板とは反対
側の同じ面に設ける必要があるので、基板は絶縁性とす
ることが必要であり、一般的には透明のサファイアが利
用されている。このような透明のサファイア基板であれ
ば、p−n接合域の発光層からの光の一部はサファイア
基板を主光取出し面と反対側に抜けることになる。この
ため、抜けた光を主光取出し面側に反射させるようにす
れば、発光効率を改善することができる。したがって、
たとえばリードフレームの上に発光素子を搭載する半導
体発光装置の場合では、リードフレームの搭載面を反射
面として反射させる構成とすることも既に提案されてい
る。
For example, in a gallium nitride-based compound semiconductor device, the p-side and n-side electrodes need to be provided on the same surface opposite to the substrate, so that the substrate needs to be insulative. Generally, transparent sapphire is used. With such a transparent sapphire substrate, part of the light from the light emitting layer in the pn junction region passes through the sapphire substrate to the side opposite to the main light extraction surface. For this reason, if the emitted light is reflected to the main light extraction surface side, the luminous efficiency can be improved. Therefore,
For example, in the case of a semiconductor light emitting device in which a light emitting element is mounted on a lead frame, it has already been proposed to adopt a configuration in which the mounting surface of the lead frame is reflected as a reflecting surface.

【0007】一方、GaPやGaAlAs等の半導体化
合物においても、透光性導電材を結晶基板として利用す
れば、発光層からの主光取出し面側とは反対の向きすな
わち結晶基板側へ向かう光をリードフレーム側に抜けさ
せることができる。したがって、リードフレームの搭載
面を光反射に好適なものとしておけば、発光効率の向上
が可能となる。
On the other hand, in a semiconductor compound such as GaP or GaAlAs, if a light-transmitting conductive material is used as a crystal substrate, light directed to the direction opposite to the main light extraction surface side from the light emitting layer, that is, toward the crystal substrate side is formed. It can be pulled out to the lead frame side. Therefore, if the mounting surface of the lead frame is made suitable for light reflection, luminous efficiency can be improved.

【0008】[0008]

【発明が解決しようとする課題】ところが、透光性導電
材の結晶基板または化合物半導体自身をリードフレーム
に固定するための接着剤にAgを含ませたAgペースト
では、Ag自身は外部からの入射光に対して光を反射さ
せるのに対し、Agを混入したペースト状の接着剤では
光が封じ込められやすく、むしろ入射光を吸収してしま
うように作用する。
However, in an Ag paste in which Ag is included in an adhesive for fixing a crystal substrate of a translucent conductive material or a compound semiconductor itself to a lead frame, the Ag itself is incident from the outside. While the light reflects the light, the paste adhesive containing Ag is liable to contain the light, but rather acts to absorb the incident light.

【0009】したがって、導電性の接着剤としてAgペ
ーストを用いると、リードフレームの搭載面を反射面と
していても、Agペーストによる光吸収によって主光取
出し面からの発光輝度は低下してしまう。そして、この
発光輝度を補うためには、印加電流を大きくする必要が
あり、消費電力の低減もできなくなる。
Therefore, when the Ag paste is used as the conductive adhesive, even if the mounting surface of the lead frame is used as the reflection surface, the light emission luminance from the main light extraction surface is reduced due to the light absorption by the Ag paste. In order to compensate for the emission luminance, it is necessary to increase the applied current, and the power consumption cannot be reduced.

【0010】また、通電時には発光素子の発熱を伴うの
で、この発熱によってAgペーストが加熱され、これに
よってペーストに含まれている樹脂が変色してしまう。
この変色した樹脂は光を吸収するように作用することに
なり、Agペースト自身の光吸収に加えて樹脂による光
吸収が起こる。したがって、発光素子の発光輝度の低下
を招くことになり、機能が劣化したものと判断されやす
く、信頼性にも大きく影響する。
[0010] In addition, since the light emitting element generates heat when energized, the heat generated heats the Ag paste, thereby discoloring the resin contained in the paste.
The discolored resin acts to absorb light, and the resin absorbs light in addition to the light absorption of the Ag paste itself. Accordingly, the light emission luminance of the light emitting element is reduced, and it is easy to determine that the function is deteriorated, which greatly affects the reliability.

【0011】このように、発光素子をリードフレームや
プリント基板に固定するための接着剤を導電性としなけ
ればならない場合に、この導電性を持たせるための手段
としてAgを含むペーストを接着剤とするものでは、光
取り出し面以外への発光を反射させて効率良く回収する
ことができない。
As described above, when an adhesive for fixing a light emitting element to a lead frame or a printed board must be made conductive, a paste containing Ag is used as a means for imparting this conductivity. However, it is not possible to efficiently collect light by reflecting light emitted to a portion other than the light extraction surface.

【0012】本発明において解決すべき課題は、たとえ
ばAgを混入した導電性のペーストによって発光素子を
固定するアセンブリーであっても反射光を有効利用して
主光取出し面からの発光輝度を向上させることにある。
The problem to be solved in the present invention is to improve the luminance of light emitted from the main light extraction surface by effectively using reflected light even in an assembly for fixing a light emitting element by a conductive paste containing Ag, for example. It is in.

【0013】[0013]

【課題を解決するための手段】本発明は、p−n接合の
半導体層を積層するとともに主光取出し面及びその反対
側の面のそれぞれに電極を形成した発光素子を、主光取
出し面を発光方向としてリードフレームまたは基板等に
搭載するとともに導電性ペーストを介して固定する半導
体発光装置であって、発光素子の主光取出し面側とは反
対側の化合物半導体層または半導体基板による積層体を
光透過性とし、この積層体が導電性ペーストに埋没し且
つ電極を形成した面に、金属層を形成してなることを特
徴とする。
SUMMARY OF THE INVENTION The present invention relates to a light-emitting device in which a pn junction semiconductor layer is laminated and an electrode is formed on each of a main light extraction surface and a surface opposite to the main light extraction surface. A semiconductor light-emitting device mounted on a lead frame or a substrate or the like as a light-emitting direction and fixed via a conductive paste. It is light-transmitting, and is characterized in that a metal layer is formed on a surface where the laminate is buried in a conductive paste and an electrode is formed.

【0014】このような構成であれば、導電性ペースト
としてAgを混入したものを使用しても、p−n接合域
の発光層からリードフレームまたは基板等の搭載面方向
に向かう光は金属層によって遮断されるので、Agペー
ストによる光の吸収がなくなり、主光取出し面からの発
光輝度の見掛け上の低下がなくなる。
With such a configuration, even if a conductive paste containing Ag is used, light traveling from the light emitting layer in the pn junction region toward the mounting surface of the lead frame or the substrate is not affected by the metal layer. As a result, the absorption of light by the Ag paste is eliminated, and the apparent decrease in luminance emitted from the main light extraction surface is eliminated.

【0015】[0015]

【発明の実施の形態】請求項1に記載の発明は、p−n
接合の半導体層を積層するとともに主光取出し面及びそ
の反対側の面のそれぞれに電極を形成した発光素子を、
主光取出し面を発光方向としてリードフレームまたは基
板等に搭載するとともに導電性ペーストを介して固定す
る半導体発光装置であって、発光素子の主光取出し面側
とは反対側の化合物半導体層または半導体基板による積
層体を光透過性とし、この積層体が導電性ペーストに埋
没し且つ電極を形成した面に、金属層を形成してなるも
のであり、p−n接合域の発光層からリードフレームま
たは基板等の搭載面方向に向かう光を金属層によって遮
断するので、Agペーストによる光の吸収を抑えるとい
う作用を有する。
BEST MODE FOR CARRYING OUT THE INVENTION The invention according to claim 1 is a pn
A light emitting element in which electrodes are formed on the main light extraction surface and the surface on the opposite side while stacking the semiconductor layers of the junction,
A semiconductor light emitting device which is mounted on a lead frame or a substrate or the like with a main light extraction surface as a light emitting direction and fixed via a conductive paste, wherein a compound semiconductor layer or a semiconductor on a side opposite to a main light extraction surface side of a light emitting element. A laminate made of a substrate is made to transmit light, and the laminate is buried in a conductive paste and a metal layer is formed on a surface on which an electrode is formed. Alternatively, since the light traveling in the direction of the mounting surface of the substrate or the like is blocked by the metal layer, the light absorption by the Ag paste is suppressed.

【0016】請求項2に記載の発明は、金属層は、光反
射率の高い材質としてなる請求項1に記載の半導体発光
装置としたものであり、発光層からの光を金属層によっ
て効率よく主光取出し面側に反射させ、発光効率を上げ
るという作用を有する。
According to a second aspect of the present invention, there is provided the semiconductor light emitting device according to the first aspect, wherein the metal layer is made of a material having a high light reflectance, and the light from the light emitting layer is efficiently emitted by the metal layer. It has an effect of increasing the luminous efficiency by reflecting the light to the main light extraction surface side.

【0017】請求項3に記載の発明は、金属層は、電極
を除いた部分の全体または30%以上を占める請求項1
または2に記載の半導体発光装置であり、主光取出し面
側の電極の位置やリードフレーム等への搭載面側の電極
のパターンに応じて光の取出し方向を金属層の占める面
積によって制御し、光の取出し効率を最適化するという
作用を有する。
According to a third aspect of the present invention, the metal layer occupies the entire portion excluding the electrodes or 30% or more.
Or the semiconductor light emitting device according to 2, wherein the light extraction direction is controlled by the area occupied by the metal layer according to the position of the electrode on the main light extraction surface side or the pattern of the electrode on the mounting surface side to a lead frame or the like, This has the effect of optimizing the light extraction efficiency.

【0018】請求項4に記載の発明は、金属層は、導電
性ペーストに対して非オーミックコンタクトの材質とし
てなる請求項1から3のいずれかに記載の半導体発光装
置であり、電極の材料と同種の材料ではリードフレーム
等への搭載面方向への光を有効に取り出せないのに対
し、オーミックコンタクトを目的とする電極と、光反射
を目的とする金属層を併用することで、発光効率を更に
向上させるという作用を有する。
According to a fourth aspect of the present invention, there is provided the semiconductor light emitting device according to any one of the first to third aspects, wherein the metal layer is made of a material having a non-ohmic contact with the conductive paste. While the same type of material cannot effectively extract light in the direction of the mounting surface on a lead frame or the like, the luminous efficiency is improved by using an electrode for ohmic contact and a metal layer for light reflection in combination. It has the effect of further improving.

【0019】請求項5に記載の発明は、金属層は、単層
または2層以上の複合層としてなる請求項1から4のい
ずれかに記載の半導体発光装置であり、金属層の酸化を
抑制したり放熱の良好な材料を組み合わせることによ
り、信頼性をより安定化させるという作用を有する。
According to a fifth aspect of the present invention, there is provided the semiconductor light emitting device according to any one of the first to fourth aspects, wherein the metal layer is a single layer or a composite layer of two or more layers. The combination of a material with good heat dissipation and heat dissipation has the effect of further stabilizing the reliability.

【0020】以下に、本発明の実施の形態の具体例を図
面を参照しながら説明する。図1は本発明の一実施の形
態におけるGaPやGaAlAs等によって形成される
LEDチップを発光素子として備えたLEDランプ要部
の縦断面図、図2は発光素子部分の拡大図である。
Hereinafter, specific examples of the embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a longitudinal sectional view of a main part of an LED lamp having an LED chip formed of GaP, GaAlAs or the like as a light emitting element according to an embodiment of the present invention, and FIG. 2 is an enlarged view of a light emitting element part.

【0021】図1及び図2において、リードフレーム1
の上に発光素子2が搭載され、この発光素子2のp型層
2aに対するワイヤボンディング域を含めて透明のエポ
キシ樹脂3によりコーティングされている。
In FIG. 1 and FIG.
The light emitting element 2 is mounted thereon, and is coated with a transparent epoxy resin 3 including a wire bonding area for the p-type layer 2a of the light emitting element 2.

【0022】発光素子2は、p型層2aの下側にn型層
2bをp−n接合したもので、p型層2aの上面のp電
極2a−1にはリードフレーム1との間を導通させるワ
イヤ1aがボンディングされている。n型層2bは、そ
の底面にドットまたはつなぎ電極タイプのn電極2b−
1を形成したものであり、リードフレーム1の搭載面に
導電性ペースト4を介して固定されている。この導電性
ペースト4はn電極2b−1を埋没させる層厚として形
成され、含有するAg等の含有成分によってn電極2b
−1とリードフレーム1側とを電気的に導通させる。
The light emitting element 2 has an n-type layer 2b pn junction below the p-type layer 2a, and a p-electrode 2a-1 on the upper surface of the p-type layer 2a has The wire 1a to be conducted is bonded. The n-type layer 2b has a dot or connecting electrode type n-electrode 2b-
1 and is fixed to the mounting surface of the lead frame 1 via a conductive paste 4. The conductive paste 4 is formed to have a thickness that buries the n-electrode 2b-1.
-1 is electrically connected to the lead frame 1 side.

【0023】導電性ペースト4はエポキシ樹脂をその主
剤としたものであり、この主剤に従来例と同様にAgを
導電剤フィラーとして混入したものが利用できる。ま
た、このAgの導電剤に代えて、透明導電剤をフィラー
とすることもでき、たとえば液晶素子基板上に電極用の
膜として形成される透明導電膜に利用されるITO(イ
ンジウム・ティン・オキサイド)を用いることができ
る。このITOは、電気抵抗が小さくて光透過率が高い
という物性を持つことが知られている。
The conductive paste 4 contains epoxy resin as a main component, and a paste obtained by mixing Ag as a conductive agent filler in this main component as in the conventional example can be used. In addition, instead of the Ag conductive agent, a transparent conductive agent can be used as a filler. For example, ITO (indium tin oxide) used for a transparent conductive film formed as a film for an electrode on a liquid crystal element substrate is used. ) Can be used. It is known that ITO has physical properties such as low electric resistance and high light transmittance.

【0024】ここで、従来構造では、発光素子2がリー
ドフレーム1の搭載面に載せられる部分の全体もしくは
周壁も含めてAgを混入したペーストを塗布するという
ものであった。そして、このようなペーストの塗布であ
れば、Agペーストによる光の吸収が避けられないので
発光素子2の中で発光輝度が最大となる主光取出し面
(図2においては発光素子2の上面であってp電極2a
−1を除く全範囲)以外からの発光については、これを
反射させて主光取り出し面側から回収する効率は低いと
いうのが大きな問題であった。
Here, in the conventional structure, the paste in which Ag is mixed is applied to the entire portion or the peripheral wall of the light emitting element 2 mounted on the mounting surface of the lead frame 1. If such a paste is applied, the absorption of light by the Ag paste is inevitable, so the main light extraction surface (in FIG. 2, the upper surface of the light emitting element 2 in FIG. And the p electrode 2a
A major problem is that the efficiency of collecting light from the main light extraction surface side by reflecting the light emitted from light other than (all ranges except -1) is low.

【0025】これに対し、本発明では、n型層2bの下
面であってn電極2b−1を除く領域に光反射可能な金
属層5を形成し、この金属層5によってn型層2bから
下に抜ける光を主光取出し面側に反射させて発光効率を
上げるようにする。
On the other hand, in the present invention, a light-reflective metal layer 5 is formed on the lower surface of the n-type layer 2b except for the n-electrode 2b-1. Light emitted downward is reflected on the side of the main light extraction surface to increase luminous efficiency.

【0026】この金属層5は光反射率が高いたとえばA
g,Al,Au,Cuなどを素材としたものであり、少
なくともn電極2b−1の金属材料と異なるものであれ
ばよい。このように、金属層5をn電極2b−1と異な
らせるのは、発光素子のタイプのそれぞれについて最適
なオーミックコンタクト材料があるが、必ずしもこれら
の材料が光の高反射率の材料でない場合があるからであ
る。また、金属層5の膜厚は3μm以下とすることが好
ましく、その形成方法としてはたとえばスパッタ法でリ
フトオフしてパターン形成する方法などが適用できる。
The metal layer 5 has a high light reflectance, for example, A
g, Al, Au, Cu, etc., as long as it is different from at least the metal material of the n-electrode 2b-1. As described above, the reason why the metal layer 5 is different from the n-electrode 2b-1 is that there is an optimal ohmic contact material for each type of light emitting element, but these materials are not necessarily materials having a high light reflectance. Because there is. Further, the thickness of the metal layer 5 is preferably 3 μm or less, and a method of forming a pattern by lift-off by a sputtering method, for example, can be applied.

【0027】図3は発光素子2の底面図であって、n電
極2b−1と金属層5の形成パターンを示す概略図であ
り、同図の(a)はn電極2b−1をつなぎ電極タイプ
としたもの、同図の(b)はドットタイプとしたもので
ある。n電極2b−1がつなぎ電極であってもドットタ
イプであっても、金属層5はn電極2b−1を除く領域
の全面に形成されている。また、このような金属層5の
形成パターンとするのに代えて、n電極2b−1を除く
領域であることは同様であるが、n電極2b−1を除く
底面積に対してその30%を下回らない範囲の領域とし
てもよい。
FIG. 3 is a bottom view of the light emitting element 2 and is a schematic view showing a pattern of forming the n-electrode 2b-1 and the metal layer 5. FIG. 3 (a) shows an electrode connecting the n-electrode 2b-1. FIG. 4B shows a dot type. Regardless of whether the n-electrode 2b-1 is a connection electrode or a dot type, the metal layer 5 is formed on the entire surface excluding the n-electrode 2b-1. Also, instead of using such a pattern for forming the metal layer 5, the region except for the n-electrode 2b-1 is the same, but 30% of the bottom area excluding the n-electrode 2b-1. May be set to a range that does not fall below.

【0028】また、金属層5は先に述べた金属材料を1
層だけ形成するのに代えて、2層構造としてもよい。こ
のように金属層5を2層構造とする場合では、たとえば
n型層2bと付着性のよいものを上層とするとともに導
電性ペースト4との接合性のよいものを下層とすること
で、リードフレーム1に対する発光素子2の安定固定が
図れるようにすることが可能となる。
The metal layer 5 is made of one of the above-mentioned metal materials.
Instead of forming only a layer, a two-layer structure may be adopted. When the metal layer 5 has a two-layer structure as described above, for example, a layer having good adhesion to the n-type layer 2b is formed as an upper layer and a layer having good bonding properties with the conductive paste 4 is formed as a lower layer. It is possible to stably fix the light emitting element 2 to the frame 1.

【0029】更に、n型層2bとリードフレーム1との
間の電気的導通は、導電性ペースト4を介してn電極2
b−1によって確保されているので、金属層5は導電性
ペースト4に対してオーミックコンタクトをとる必要が
ない。このため、金属層5の材料として、発光素子2の
発光効率を上げるために光反射率が高いものを優先して
選ぶことができる。
Further, the electrical conduction between the n-type layer 2b and the lead frame 1 is established via the conductive paste 4 through the n-type electrode 2b.
Since it is secured by b-1, the metal layer 5 does not need to make ohmic contact with the conductive paste 4. For this reason, a material having a high light reflectance can be preferentially selected as the material of the metal layer 5 in order to increase the luminous efficiency of the light emitting element 2.

【0030】以上の構成において、n型層2bの底面に
はn電極2b−1を除く領域またはn型層2bの底面積
の30%を下回らない面積となるように金属層5を形成
することによって、p−n接合域の発光層からの光が導
電性ペースト4側に抜けるのが阻止される。したがっ
て、導電性ペースト4をたとえばAgペーストとした場
合では、抜けた光が吸収されてしまって、発光素子2の
主光取出し面からの発光輝度が低下する傾向にあるが、
光の抜け自体が阻止されるので、発光輝度の大幅な低下
を招くことはない。
In the above structure, the metal layer 5 is formed on the bottom surface of the n-type layer 2b so as to have an area not less than 30% of the area excluding the n-electrode 2b-1 or the bottom area of the n-type layer 2b. This prevents light from the light emitting layer in the pn junction region from leaking to the conductive paste 4 side. Therefore, when the conductive paste 4 is, for example, an Ag paste, the emitted light tends to be absorbed and the light emission luminance from the main light extraction surface of the light emitting element 2 tends to decrease.
Since the light leakage itself is prevented, the light emission luminance does not significantly decrease.

【0031】また、金属層5を光反射率が高い金属材料
を素材としたものであれば、n型層2bからの光をこの
金属層5によって主光取出し面側に反射させることがで
き、発光素子2の発光輝度を向上させることができる。
If the metal layer 5 is made of a metal material having a high light reflectance, light from the n-type layer 2b can be reflected by the metal layer 5 toward the main light extraction surface, The light emission luminance of the light emitting element 2 can be improved.

【0032】[0032]

【発明の効果】請求項1の発明では、導電性ペーストと
してAgペーストを使用しても、p−n接合域からの光
が導電性ペースト側に向かうのを金属層が遮断または主
光取出し面側に反射させるので、少なくともAgペース
トによる光の吸収がなくなり、発光効率の向上が可能と
なる。
According to the first aspect of the present invention, even when an Ag paste is used as the conductive paste, the metal layer blocks light from the pn junction region toward the conductive paste or the main light extraction surface. Since light is reflected to the side, at least absorption of light by the Ag paste is eliminated, and luminous efficiency can be improved.

【0033】請求項2の発明では、金属層によってp−
n接合層からの光を効率よく主光取出し面側に反射させ
るので、発光素子の発光効率及び輝度を更に向上させる
ことができる。
According to the second aspect of the present invention, the p-
Since light from the n-junction layer is efficiently reflected toward the main light extraction surface, the luminous efficiency and luminance of the light emitting element can be further improved.

【0034】請求項3の発明では、主光取出し面側の電
極の位置やリードフレームまたは基板等への搭載面側の
電極パターンに応じて、光の反射効率を向上させるよう
に光の取出し方向を制御できるので、発光効率を更に向
上させることができる。
According to the third aspect of the present invention, the light extraction direction is improved so as to improve the light reflection efficiency in accordance with the position of the electrode on the main light extraction surface side and the electrode pattern on the mounting surface side on a lead frame or a substrate or the like. , The luminous efficiency can be further improved.

【0035】請求項4の発明では、金属層の材料は導電
性ペーストとオーミックコンタクトをとるという制約を
受けないので、光反射率が高いものを優先して選ぶこと
ができ、発光効率及び輝度を更に一層向上させることが
できる。
According to the fourth aspect of the present invention, since the material of the metal layer is not restricted by the ohmic contact with the conductive paste, a material having a high light reflectance can be preferentially selected, and the luminous efficiency and luminance can be reduced. It can be further improved.

【0036】請求項5の発明では、たとえば発光素子と
の付着性がよいものと導電性ペーストとの接合性がよく
放熱性も高いものの2層構造の金属層とすることで、発
光素子のアセンブリを安定させることができる。
According to the fifth aspect of the present invention, for example, the two-layered metal layer is used, although the one having good adhesion to the light emitting element and the one having good bonding property with the conductive paste and high heat radiation are used. Can be stabilized.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施の形態による発光装置をLED
ランプとした例を示す要部の縦断面図
FIG. 1 shows an LED as a light emitting device according to an embodiment of the present invention.
Longitudinal sectional view of the main part showing an example of a lamp

【図2】図1の発光素子部分を拡大して示す図FIG. 2 is an enlarged view showing a light emitting element portion of FIG. 1;

【図3】n型層の底面のn電極と金属層の形成パターン
を示す底面図であって、(a)はつなぎ電極の場合を示
す図 (b)はドット電極の場合を示す図
FIGS. 3A and 3B are bottom views showing formation patterns of an n-electrode and a metal layer on the bottom surface of an n-type layer, where FIG. 3A shows a connection electrode and FIG. 3B shows a dot electrode.

【符号の説明】[Explanation of symbols]

1 リードフレーム 1a ワイヤ 2 発光素子 2a p型層 2a−1 p電極 2b n型層 2b−1 n電極 3 エポキシ樹脂 4 導電性ペースト 5 金属層 Reference Signs List 1 lead frame 1a wire 2 light emitting element 2a p-type layer 2a-1 p-electrode 2b n-type layer 2b-1 n-electrode 3 epoxy resin 4 conductive paste 5 metal layer

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 p−n接合の半導体層を積層するととも
に主光取出し面及びその反対側の面のそれぞれに電極を
形成した発光素子を、主光取出し面を発光方向としてリ
ードフレームまたは基板等に搭載するとともに導電性ペ
ーストを介して固定する半導体発光装置であって、発光
素子の主光取出し面側とは反対側の化合物半導体層また
は半導体基板による積層体を光透過性とし、この積層体
が導電性ペーストに埋没し且つ電極を形成した面に、金
属層を形成してなる半導体発光装置。
1. A light emitting device comprising a pn junction semiconductor layer laminated thereon and electrodes formed on each of a main light extraction surface and a surface opposite to the main light extraction surface. A semiconductor light-emitting device mounted on a semiconductor light-emitting device and fixed via a conductive paste, wherein a laminate of a compound semiconductor layer or a semiconductor substrate on the side opposite to the main light extraction surface side of the light-emitting element is made light-transmissive, Is a semiconductor light emitting device in which a metal layer is formed on a surface buried in a conductive paste and on which an electrode is formed.
【請求項2】 金属層は、光反射率の高い材質としてな
る請求項1に記載の半導体発光装置。
2. The semiconductor light emitting device according to claim 1, wherein the metal layer is made of a material having a high light reflectance.
【請求項3】 金属層は、電極を除いた部分の全体また
は30%以上を占める請求項1または2に記載の半導体
発光装置。
3. The semiconductor light emitting device according to claim 1, wherein the metal layer occupies the entire portion excluding the electrodes or 30% or more.
【請求項4】 金属層は、導電性ペーストに対して非オ
ーミックコンタクトの材質としてなる請求項1から3の
いずれかに記載の半導体発光装置。
4. The semiconductor light emitting device according to claim 1, wherein the metal layer is made of a material having a non-ohmic contact with the conductive paste.
【請求項5】 金属層は、単層または2層以上の複合層
としてなる請求項1から4のいずれかに記載の半導体発
光装置。
5. The semiconductor light emitting device according to claim 1, wherein the metal layer is a single layer or a composite layer of two or more layers.
JP35047997A 1997-12-19 1997-12-19 Semiconductor light emitting device Pending JPH11186613A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP35047997A JPH11186613A (en) 1997-12-19 1997-12-19 Semiconductor light emitting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35047997A JPH11186613A (en) 1997-12-19 1997-12-19 Semiconductor light emitting device

Publications (1)

Publication Number Publication Date
JPH11186613A true JPH11186613A (en) 1999-07-09

Family

ID=18410779

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35047997A Pending JPH11186613A (en) 1997-12-19 1997-12-19 Semiconductor light emitting device

Country Status (1)

Country Link
JP (1) JPH11186613A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000349349A (en) * 1999-05-24 2000-12-15 Agilent Technol Inc Light emitting structure equipped with contact part having reflecting characteristic and method for manufacturing the same
JP2002026392A (en) * 2000-06-30 2002-01-25 Toshiba Corp Semiconductor light emitting device and its manufacturing method and semiconductor light emitting equipment
JP2007221175A (en) * 2007-06-04 2007-08-30 Toshiba Corp Semiconductor light emitting element and semiconductor light emitting device
US7541621B2 (en) 2004-08-25 2009-06-02 Sharp Kabushiki Kaisha Semiconductor light emitting device having a current narrowing portion and manufacturing method for semiconductor light emitting device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000349349A (en) * 1999-05-24 2000-12-15 Agilent Technol Inc Light emitting structure equipped with contact part having reflecting characteristic and method for manufacturing the same
JP2002026392A (en) * 2000-06-30 2002-01-25 Toshiba Corp Semiconductor light emitting device and its manufacturing method and semiconductor light emitting equipment
US7355212B2 (en) 2000-06-30 2008-04-08 Kabushiki Kaisha Toshiba Light emitting element
US7541621B2 (en) 2004-08-25 2009-06-02 Sharp Kabushiki Kaisha Semiconductor light emitting device having a current narrowing portion and manufacturing method for semiconductor light emitting device
JP2007221175A (en) * 2007-06-04 2007-08-30 Toshiba Corp Semiconductor light emitting element and semiconductor light emitting device
JP4625827B2 (en) * 2007-06-04 2011-02-02 株式会社東芝 Semiconductor light emitting device and semiconductor light emitting device

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