JPH11176712A - Method for laying out semiconductor manufacture factory - Google Patents

Method for laying out semiconductor manufacture factory

Info

Publication number
JPH11176712A
JPH11176712A JP9346093A JP34609397A JPH11176712A JP H11176712 A JPH11176712 A JP H11176712A JP 9346093 A JP9346093 A JP 9346093A JP 34609397 A JP34609397 A JP 34609397A JP H11176712 A JPH11176712 A JP H11176712A
Authority
JP
Japan
Prior art keywords
equipment
products
semiconductor manufacturing
factory
facilities
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9346093A
Other languages
Japanese (ja)
Inventor
Yoshiaki Kobayashi
義明 小林
Atsuyoshi Koike
淳義 小池
Takemasa Iwasaki
武正 岩崎
Toyohide Hamada
豊秀 浜田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP9346093A priority Critical patent/JPH11176712A/en
Publication of JPH11176712A publication Critical patent/JPH11176712A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide the laying out method of a semiconductor manufacture factory carrying in/out facilities so that troubles will not occur in the manufacture of other products on the laying out method of the semiconductor manufacture factory. SOLUTION: A specified facility constituting part, where the facilities required for the manufacture of the respective products is arranged at the periphery of a common facility constitution part 10 in which the facilities used in common to all the products are installed. Private facility carry-in/out ports are provided for the respective facility constituting parts. Thus, reduction in production quantity and delays in production completion due to the carry-in/out of the facilities can be suppressed for preventing the manufacture of the other products from being stopped at the carrying of in/out the facilities.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体ウエハの加
工を行う半導体製造工場のレイアウト方法の改良に関す
るものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement in a layout method of a semiconductor manufacturing factory for processing a semiconductor wafer.

【0002】半導体製造技術の進歩は著しく、半導体部
品市場の変化も激しいので、半導体製造工場で生産され
る製品の種類・品種変更や機能向上が頻繁に行われ、こ
れに伴う製造設備の増設や入れ替えを容易に行うことを
可能とする半導体工場のレイアウト方法に関するもので
ある。
2. Description of the Related Art The progress of semiconductor manufacturing technology is remarkable, and the market for semiconductor components is rapidly changing. Therefore, the types and types of products manufactured at semiconductor manufacturing plants are frequently changed and functions are improved. The present invention relates to a layout method of a semiconductor factory that enables easy replacement.

【0003】[0003]

【従来の技術】従来の半導体製造工場のレイアウト方法
は図7に示すように、1つのクリーンルームをホト工程
110、エッチング工程120、イオン打ち込み工程1
30、酸化拡散工程140、CVD工程150等、各工
程毎に間仕切りして使用していたので、設備搬出入口1
60が各工程共用になっており、設備搬出入の際、設備
の搬出入がある工程の設備だけでなく、隣接する工程の
設備も移動させる必要があった。また半導体の製造には
様々な薬剤が配管を通して使用されているので、搬出入
設備に必要な薬剤を共用する設備を停止させる必要があ
るため、設備の搬出入は工場全体の生産に影響を与えて
いた。また、全ての製品を同じ領域に設置した設備で生
産しているので、各工程のクリーン度を最も高いクリー
ン度を必要とする製品に合わせなければならないため、
クリーンルームの運営費用が高価になっていた。
2. Description of the Related Art As shown in FIG. 7, a conventional layout method for a semiconductor manufacturing plant is composed of a single clean room including a photo process 110, an etching process 120, and an ion implantation process 1.
30, the oxidation diffusion step 140, the CVD step 150, etc.
60 is common to each process, and when carrying in / out the facilities, it is necessary to move not only the facilities of the process where the facilities are carried in / out, but also the facilities of the adjacent process. In addition, since various chemicals are used through pipes in the manufacture of semiconductors, it is necessary to stop equipment that shares necessary chemicals for the loading and unloading equipment. I was In addition, since all products are manufactured in equipment installed in the same area, the cleanliness of each process must be adjusted to the product that requires the highest cleanliness,
The operating cost of the clean room was expensive.

【0004】従来は特開平4−240714号公報に示
されるように、工程毎に分割した処理工場を管理棟を中
心として放射状に設置していたので、土地の利用効率が
悪かった。また、各工程毎の独立性が保たれているの
で、設備搬出入時に移動または停止させるのは当該工程
設備だけでよいが、半導体の製造では大多数の製品がす
べての工程で処理を行うので、設備を搬出入する度に1
工程でも停止してしまうと、ほとんどの製品の生産に支
障があった。また、全ての製品を同じ工程工場に設置し
た設備で生産しているので、各工場のクリーン度を最も
高いクリーン度を必要とする製品に合わせなければなら
ないため、クリーンルームの運営費用が高価になってい
た。
Conventionally, as shown in Japanese Patent Application Laid-Open No. 4-240714, a processing plant divided for each process is installed radially around a management building, so that land use efficiency is poor. In addition, since the independence of each process is maintained, it is only necessary to move or stop the equipment at the time of loading and unloading the equipment, but in the manufacture of semiconductors, most products perform processing in all steps. , 1 every time the equipment is carried in and out
If the process stopped, the production of most products was hindered. In addition, since all products are produced using equipment installed in the same process factory, the cleanliness of each factory must be adjusted to the products that require the highest level of cleanliness. I was

【0005】[0005]

【発明が解決しようとする課題】以上説明した従来の半
導体製造工場のレイアウト方法は1つのクリーンルーム
を各工程毎に間仕切りしていたので、設備搬出入口が各
工程共用になっており、設備搬出入の際、設備の搬出入
がある工程の設備だけでなく、隣接する工程の設備も移
動させる必要があったため、設備移動の費用が大きくな
ったり、移動する設備を使用する製品の生産が停止した
りする問題があった。また、半導体の製造には様々な薬
剤が配管を通して使用されているので、搬出入設備に必
要な薬剤を共用する設備を停止させる必要があるため、
様々な製品の生産が停止して生産数が減少したり、完成
が遅れる等の問題があった。また、全ての製品を同じ領
域に設置した設備で生産しているので、各工程のクリー
ン度を最も高いクリーン度を必要とする製品に合わせな
ければならないため、クリーンルームの運営費用が高価
になる問題があった。
In the conventional layout method of a semiconductor manufacturing plant described above, one clean room is partitioned for each process, so that the equipment entrance and exit are common to each process, and the equipment transportation is carried out. In such a case, it was necessary to move not only the equipment in the process where the equipment was loaded and unloaded, but also the equipment in the adjacent process, which increased the cost of moving the equipment and stopped the production of products using the moving equipment. Or had a problem. In addition, since various chemicals are used in the manufacture of semiconductors through pipes, it is necessary to stop equipment that shares chemicals required for loading and unloading equipment,
There have been problems such as the stoppage of production of various products, a decrease in the number of products produced, and a delay in completion. In addition, since all products are manufactured using equipment installed in the same area, the cleanliness of each process must be adjusted to the products that require the highest cleanliness, resulting in high operating costs for clean rooms. was there.

【0006】従来の半導体製造工場のレイアウト方法
は、管理棟を中心として各処理工場を放射状に配置して
いたので、土地の利用効率が悪い問題があった。また、
半導体の製造では大多数の製品がすべての工程で処理を
行うので、設備を搬出入する工程の設備を数台でも停止
してしまうと、ほとんどの製品の生産を停止させてしま
う問題があった。また、全ての製品を同じ工程工場に設
置した設備で生産しているので、各工場のクリーン度を
最も高いクリーン度を必要とする製品に合わせなければ
ならないため、クリーンルームの運営費用が高価になる
問題があった。
In the conventional layout method of a semiconductor manufacturing factory, since each processing factory is radially arranged around the management building, there is a problem that land use efficiency is poor. Also,
In semiconductor manufacturing, the majority of products are processed in all processes, so if even a few units in the process of loading and unloading equipment are stopped, there is a problem that production of most products will be stopped. . In addition, since all products are produced using equipment installed in the same process factory, the cleanliness of each factory must be adjusted to the products that require the highest level of cleanliness, resulting in high operating costs for clean rooms. There was a problem.

【0007】本発明は以上のような状況から、半導体製
造設備変更時に他製品の生産に支障が出ないように、設
備の搬出入が可能となる半導体製造工場のレイアウト方
法の提供を目的としたものである。
The present invention has been made in view of the above circumstances, and has as its object to provide a layout method of a semiconductor manufacturing plant that allows loading and unloading of equipment so that production of other products does not become disturbed when semiconductor manufacturing equipment is changed. Things.

【0008】[0008]

【課題を解決するための手段】本発明の半導体製造工場
のレイアウト方法は、工場を共通設備構成部と、各製品
毎の特定設備構成部とに分けて構成し、特定設備構成部
には各々設備の搬出入口を設けるように構成する。
According to the layout method of a semiconductor manufacturing factory of the present invention, the factory is divided into a common equipment component and a specific equipment component for each product. It is configured to provide a loading / unloading port for the equipment.

【0009】また、本発明の半導体製造工場のレイアウ
ト方法は、共通設備構成部を中心として、各製品毎の特
定設備構成部を共通設備構成部の周囲に配置するように
構成する。
Further, the layout method of a semiconductor manufacturing plant according to the present invention is configured such that a specific equipment component for each product is arranged around the common equipment component, centering on the common equipment component.

【0010】また、本発明の半導体製造工場のレイアウ
ト方法は、工場全体の外形を長方形にするように構成す
る。
Further, the layout method of a semiconductor manufacturing factory according to the present invention is configured so that the outer shape of the entire factory is rectangular.

【0011】[0011]

【発明の実施の形態】以下図1、図2を用いて、本発明
の第1の実施例の半導体製造工場のレイアウト方法につ
いて説明する。図1は本発明による半導体製造工場のレ
イアウト方法の第1の実施例を示す平面図であり、全製
品で共通で使用する設備を設置した共通設備構成部10
の周囲に、各製品の生産に必要な設備を集めた特定設備
構成部である、フラッシュメモリ設備構成部20、4G
ビットDRAM設備構成部30、1GビットDRAM設
備構成部40、マイコン設備構成部50、ゲートアレイ
設備構成部60を配置してある。各設備構成部20〜6
0には各々設備搬出入口160と製造途中の製品を保管
する半導体保管棚170が設けてある。共通設備構成部
10の内部はホト工程110、エッチング工程120、
イオン打ち込み工程130、酸化拡散工程140、CV
D工程150のように各製造設備は工程毎にまとめて設
置され、各工程にそれぞれ製造途中の製品を保管する半
導体保管棚170が設けてある。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A layout method of a semiconductor manufacturing plant according to a first embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a plan view showing a first embodiment of a layout method of a semiconductor manufacturing plant according to the present invention, and is a common equipment component 10 in which equipment commonly used by all products is installed.
, Flash memory equipment components 20, 4G, which are specific equipment components that collect equipment necessary for the production of each product.
A bit DRAM facility configuration section 30, a 1 Gbit DRAM facility configuration section 40, a microcomputer facility configuration section 50, and a gate array facility configuration section 60 are arranged. Each equipment component 20-6
0 is provided with an equipment entrance 160 and a semiconductor storage shelf 170 for storing products being manufactured. The interior of the common equipment component 10 includes a photo process 110, an etching process 120,
Ion implantation step 130, oxidation diffusion step 140, CV
As in the D step 150, the manufacturing facilities are collectively installed for each step, and each step is provided with a semiconductor storage shelf 170 for storing a product being manufactured.

【0012】図2は本発明による第1の実施例の半導体
製造工場の構造を表す側面図であり、図中の矢印は空気
の流れを表している。ファンフィルタユニット200は
工場内の空気中の塵埃を取り除き、下方向に向かってク
リーン度の高い空気を流す。クリーン度の高い空気は半
導体製造装置210の設置領域を通過して、開口率30
〜60%の簀の子状床であるグレーチング260を通っ
て、設備の無い領域を上昇して再びファンフィルタユニ
ット200の上方に送られる。グレーチング260の下
部には半導体製造設備210に薬剤を供給する配管23
0や、半導体製造設備210の内部を真空にするための
ポンプ220等が設置されている。作業者250は半導
体ウエハを収容するウエハキャリア240を半導体製造
設備210、あるいは図示していない半導体保管棚に搬
送したり、半導体製造設備210の操作を行ったりす
る。また、本実施例のようにファンフィルタユニット2
00の設置密度を場所によって変えることで、領域毎に
クリーン度を設定することが可能である。
FIG. 2 is a side view showing the structure of a semiconductor manufacturing plant according to the first embodiment of the present invention, and arrows in the figure show the flow of air. The fan filter unit 200 removes dust in the air in the factory, and flows clean air downward. The air having a high degree of cleanness passes through the installation area of the semiconductor manufacturing apparatus 210 and has an aperture ratio of 30.
After passing through the grating 260, which is a child-like floor of 簀 60%, it is sent up the fan-filter unit 200 again in the area without equipment. A pipe 23 for supplying a chemical to the semiconductor manufacturing equipment 210 is provided below the grating 260.
And a pump 220 for evacuating the inside of the semiconductor manufacturing facility 210. The operator 250 transports the wafer carrier 240 accommodating the semiconductor wafer to the semiconductor manufacturing facility 210 or a semiconductor storage shelf (not shown) or operates the semiconductor manufacturing facility 210. Also, as in the present embodiment, the fan filter unit 2
By changing the installation density of 00 depending on the location, it is possible to set the cleanness for each area.

【0013】半導体の製造には様々な薬剤が必要であ
り、その薬剤を供給する配管は複数の設備で共有されて
いる。また、製造途中の半導体は塵埃の付着によって不
良品になってしまうので、半導体の製造はクリーン度の
高い領域で行わなければならない。また、クリーンルー
ムの維持運営費用は高価であるから、クリーンルームを
有効に利用するために各製造設備は近接して設置されて
いるので、設備を移動する時には搬出入設備の周辺にあ
る製造設備も移動しなければならない。このため、設備
の搬出入時は搬出入設備と配管を共用する設備や、設備
が搬出入される付近の設備は停止させたり、移動させた
りしなければならない。
Various chemicals are required for the manufacture of semiconductors, and pipes for supplying the chemicals are shared by a plurality of facilities. In addition, semiconductors that are being manufactured become defective due to the adhesion of dust, so that semiconductors must be manufactured in an area with high cleanliness. In addition, because the maintenance and operation costs of the clean room are expensive, each manufacturing facility is installed close to each other in order to make effective use of the clean room. Must. For this reason, when loading and unloading equipment, equipment that shares piping with the loading and unloading equipment and equipment near the equipment being loaded and unloaded must be stopped or moved.

【0014】図1に示すように各設備構成部には各々設
備搬出入口160が設けてあるので、搬出入を行う製品
の設備構成部の設備だけ停止させればよいため、他の製
品の生産には影響を及ぼさない。例えば、フラッシュメ
モリを増産するためにフラッシュメモリ設備構成部20
に設備を増設する場合、フラッシュメモリ設備構成部2
0内の一部あるいは全設備を停止させる必要があるが、
4GビットDRAM設備構成部30、1GビットDRA
M設備構成部40、マイコン設備構成部50、ゲートア
レイ設備構成部60の他製品の設備構成部の設備はそれ
ぞれ独立しているので、他製品の生産には影響がない。
また、例えば、生産を停止した製品用の設備をまとめて
搬出したり、新製品用の設備をまとめて搬入する場合で
も、1つの特定設備構成部だけ生産を停止し、共通設備
構成部と他製品用の特定設備構成部は生産を続けること
ができるので、他製品の生産には支障が無い。このため
本実施例では、生産量の減少や製品完成の遅延を抑える
ことができる。また、移動する設備台数も減らせるの
で、設備の移設費用も削減できる。さらに、本実施例で
は1つの工場で複数の製品を生産するから、各製品毎に
別工場で生産するよりも設備の有効利用が可能になるの
で、少ない製造設備台数でより多くの生産量を確保でき
るため、投資費用を抑えることができる。
As shown in FIG. 1, each equipment component is provided with an equipment loading / unloading port 160, so that only the equipment of the equipment component of the product to be carried in and out needs to be stopped, so that the production of other products can be stopped. Has no effect. For example, in order to increase the production of flash memory,
If you want to add more equipment to the
It is necessary to stop some or all of the facilities within 0,
4G bit DRAM equipment configuration unit 30, 1G bit DRA
Since the facilities of the M component construction unit 40, the microcomputer facility construction unit 50, and the gate array facility construction unit 60 of the other product construction units are independent of each other, there is no effect on the production of other products.
In addition, for example, even when the equipment for a product whose production has been stopped is collectively carried out or the equipment for a new product is collectively carried in, production of only one specific equipment component is stopped, and another common equipment component is stopped. The production of the specific equipment component for the product can be continued, so that the production of other products is not hindered. For this reason, in the present embodiment, it is possible to suppress a decrease in production volume and a delay in product completion. In addition, since the number of moving facilities can be reduced, the cost of moving the facilities can also be reduced. Further, in this embodiment, since a plurality of products are produced in one factory, the equipment can be used more effectively than in a separate factory for each product. Because it can be secured, investment costs can be reduced.

【0015】半導体は製品によって製造プロセスが異な
り、必要とするクリーン度も違っている。例えば1Gビ
ットDRAMはクリーン度クラス1で生産可能だが、4
GビットDRAMはクリーン度クラス0.1でなければ
生産できない。従来は、全製品が同一領域で生産されて
いるため、最高のクリーン度を必要とする製品に合わせ
てクリーン度を設定していた。本実施例では、製品毎に
設備構成部が分割されているので、設備構成部を各製品
が求めるクリーン度に設定できるため、従来に比べてク
リーンルーム運営費用を削減できる。
Semiconductors have different manufacturing processes depending on their products, and require different degrees of cleanliness. For example, a 1 Gbit DRAM can be produced in cleanliness class 1,
G-bit DRAMs cannot be produced unless the cleanliness class is 0.1. Conventionally, since all products are produced in the same area, the degree of cleanliness is set according to the product that requires the highest degree of cleanliness. In this embodiment, since the equipment components are divided for each product, the equipment components can be set to the degree of cleanliness required by each product, so that the clean room operating cost can be reduced as compared with the conventional case.

【0016】なお、本実施例の特定設備構成部は一例と
して、フラッシュメモリ設備構成部20、4GビットD
RAM設備構成部30、1GビットDRAM設備構成部
40、マイコン設備構成部50、ゲートアレイ設備構成
部60で構成したが、本発明は特定設備構成部の数が5
つの場合に限らず、生産する製品数に応じて増減するこ
とが可能である。
The specific equipment component of this embodiment is, for example, a flash memory equipment component 20, a 4 Gbit D
Although the RAM equipment component 30, the 1-Gbit DRAM equipment component 40, the microcomputer equipment component 50, and the gate array equipment component 60, the present invention requires only five specific equipment components.
It is possible to increase or decrease according to the number of products to be produced, without being limited to the above case.

【0017】本発明の別の実施例の平面図を図3に示
す。本実施例は第1の実施例に共通設備構成部10用の
設備搬出入口160を設けた例であり、第1の実施例に
比べて共通設備構成部10の設備の搬出入が容易になっ
ている。本実施例でも上述した第1の実施例と同様の効
果が期待できる。
FIG. 3 is a plan view of another embodiment of the present invention. This embodiment is an example in which the equipment entrance / exit 160 for the common equipment constituent part 10 is provided in the first embodiment. The loading / unloading of the equipment of the common equipment constituent part 10 is easier than in the first embodiment. ing. In this embodiment, the same effect as in the first embodiment can be expected.

【0018】図4に別の実施例の平面図を示す。本実施
例は第1の実施例の変形であり、フラッシュメモリ設備
構成部20を1GビットDRAM設備構成部40に接続
した形になっている。本実施例の利点は製造設備の多く
が共通しているフラッシュメモリ設備構成部20と1G
ビットDRAM設備構成部40との間で製造設備を共用
しているので、複数の製品で設備を共用することによっ
て設備稼働率を高め、生産効率を向上できることと、市
場動向に合わせてフラッシュメモリの生産を増やして1
GビットDRAMを減産するなど、製品毎の増減産を容
易におこなえる点であり、当然、第1の実施例と同様の
効果も期待できる。本実施例は第1の実施例に比べて設
備構成部間の独立性が悪くなるので、設備搬出入によっ
て生産が止まる製品が多くなる可能性があるが、製造設
備を共用する製品を同世代に設定することで、両方の設
備構成部の設備搬出入時期を調整して、設備の停止期間
を短縮できる。
FIG. 4 is a plan view of another embodiment. This embodiment is a modification of the first embodiment, in which the flash memory facility configuration unit 20 is connected to a 1 Gbit DRAM facility configuration unit 40. The advantage of this embodiment is that the flash memory equipment component 20 and the 1G
Since the production equipment is shared with the bit DRAM equipment configuration unit 40, the equipment operation rate can be increased and the production efficiency can be improved by sharing the equipment with a plurality of products. Increase production 1
It is easy to increase or decrease the production of each product, such as reducing the production of G-bit DRAMs. Naturally, the same effects as in the first embodiment can be expected. In this embodiment, the independence between the equipment components is deteriorated as compared with the first embodiment. Therefore, there is a possibility that the number of products whose production is stopped by carrying in / out the equipment may increase. By setting the time to, it is possible to adjust the equipment loading / unloading timing of both equipment constituent parts and shorten the equipment stoppage time.

【0019】図5は共通設備構成部10、フラッシュメ
モリ設備構成部20、4GビットDRAM設備構成部3
0、1GビットDRAM設備構成部40、マイコン設備
構成部50、ゲートアレイ設備構成部60を並行に設置
し、工場の外形を長方形にした実施例の平面図である。
本実施例は各設備構成部毎に領域を分けて構成し、各設
備構成部毎に設備搬出入口160を設けてあるので、第
1の実施例と同様の効果がある。さらに本実施例では工
場の外形を長方形にしたことによって、第1の実施例に
あるような工場として使用できない楔形の土地をなくせ
るので、土地の利用効率が上がる利点もある。
FIG. 5 shows a common equipment configuration unit 10, a flash memory equipment configuration unit 20, and a 4 Gbit DRAM equipment configuration unit 3.
FIG. 2 is a plan view of an embodiment in which a 0- and 1-Gbit DRAM equipment configuration unit 40, a microcomputer equipment configuration unit 50, and a gate array equipment configuration unit 60 are installed in parallel, and the outer shape of the factory is rectangular.
In the present embodiment, the area is divided for each equipment component and the equipment entrance 160 is provided for each equipment component, so that the same effect as in the first embodiment is obtained. Further, in the present embodiment, since the outer shape of the factory is made rectangular, a wedge-shaped land which cannot be used as a factory as in the first embodiment can be eliminated, and there is an advantage that the land use efficiency is improved.

【0020】図6は共通設備構成部10を1階に設置
し、フラッシュメモリ設備構成部20、4GビットDR
AM設備構成部30、1GビットDRAM設備構成部4
0、マイコン設備構成部50、ゲートアレイ設備構成部
60を2階に設置した実施例の斜視図である。本実施例
では階層間の搬送が必要になるので、昇降装置180を
各設備構成部に設置している。本実施例でも各設備構成
部毎に領域を分けて構成し、各設備構成部毎に設備搬出
入口160を設けてあるので、上記図5に示す実施例と
同様の効果が期待できる。
FIG. 6 shows that the common equipment component 10 is installed on the first floor, and the flash memory equipment component 20 and the 4 Gbit DR
AM equipment constituent part 30, 1 Gbit DRAM equipment constituent part 4
FIG. 2 is a perspective view of an embodiment in which a microcomputer facility configuration unit 50 and a gate array facility configuration unit 60 are installed on the second floor. In this embodiment, since it is necessary to transport between layers, the lifting device 180 is installed in each equipment component. Also in this embodiment, since the area is divided for each equipment component and the equipment entrance 160 is provided for each equipment component, the same effect as the embodiment shown in FIG. 5 can be expected.

【0021】[0021]

【発明の効果】以上の説明から明らかなように、本発明
によれば、工場を共通設備構成部と、各製品毎の特定設
備構成部とに分けて構成し、特定設備構成部には各々設
備の搬出入口を設けるように構成したので、設備搬出入
時に他の製品の生産を止めないため設備の搬出入による
生産量の減少と製品完成の遅延を抑えることができ、製
品毎にクリーン度を設定できるためクリーンルームの運
営費用が削減でき、設備搬出入時に移動させる設備が少
なくなるため設備の搬出入の費用を削減でき、複数の製
品を1つの工場で生産できるため生産効率が向上して投
資を削減でき、工場の外形を長方形にするので、土地の
利用効率が上がる利点があり、著しい経済的効果と生産
性向上が期待できる半導体製造工場のレイアウト方法の
提供が可能である。
As is apparent from the above description, according to the present invention, a factory is divided into a common equipment component and a specific equipment component for each product, and the specific equipment component is The equipment is designed to have a loading / unloading entrance, so the production of other products is not stopped when loading / unloading the equipment. Can reduce the cost of operating a clean room, reduce the number of equipment to be moved when loading and unloading equipment, reduce the cost of loading and unloading equipment, and improve production efficiency because multiple products can be produced at one factory. Since the investment can be reduced and the external shape of the factory is made rectangular, there is an advantage that land use efficiency is increased, and it is possible to provide a layout method of a semiconductor manufacturing factory which can expect remarkable economic effect and productivity improvement.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1の実施例を示した半導体製造工場
のレイアウト方法の平面図である。
FIG. 1 is a plan view of a layout method of a semiconductor manufacturing plant according to a first embodiment of the present invention.

【図2】本発明の第1の実施例を示した半導体製造工場
の側面図である。
FIG. 2 is a side view of the semiconductor manufacturing plant showing the first embodiment of the present invention.

【図3】本発明の第2の実施例を示した半導体製造工場
のレイアウト方法の平面図である。
FIG. 3 is a plan view illustrating a layout method of a semiconductor manufacturing plant according to a second embodiment of the present invention.

【図4】本発明の第3の実施例を示した半導体製造工場
のレイアウト方法の平面図である。
FIG. 4 is a plan view showing a layout method of a semiconductor manufacturing plant according to a third embodiment of the present invention.

【図5】本発明の第4の実施例を示した半導体製造工場
のレイアウト方法の平面図である。
FIG. 5 is a plan view illustrating a layout method of a semiconductor manufacturing plant according to a fourth embodiment of the present invention.

【図6】本発明の第5の実施例を示した半導体製造工場
のレイアウト方法の斜視図である。
FIG. 6 is a perspective view illustrating a layout method of a semiconductor manufacturing plant according to a fifth embodiment of the present invention.

【図7】従来の半導体製造工場のレイアウト方法の一例
を表す平面図である。
FIG. 7 is a plan view illustrating an example of a conventional layout method for a semiconductor manufacturing plant.

【符号の説明】[Explanation of symbols]

10…共通設備構成部、 20…フラッシュメモリ設備
構成部、 30…4GビットDRAM設備構成部、 4
0…1GビットDRAM設備構成部、50…マイコン設
備構成部、 60…ゲートアレイ設備構成部、 110
…ホト工程、 120…エッチング工程、 130…イ
オン打ち込み工程、140…酸化拡散工程、 150…
CVD工程、 160…設備搬出入口、170…半導体
保管棚、 180…昇降装置、 200…ファンフィル
タユニット、 210…半導体製造設備、 220…ポ
ンプ、 230…配管 240…ウエハキャリア、 250…作業者、 260
…グレーチング。
Reference numeral 10: Common equipment constituent part, 20: Flash memory equipment constituent part, 30: 4 Gbit DRAM equipment constituent part, 4
0: 1 Gbit DRAM equipment constituent part, 50: microcomputer equipment constituent part, 60: gate array equipment constituent part, 110
... Photo process, 120 ... Etching process, 130 ... Ion implantation process, 140 ... Oxidation diffusion process, 150 ...
CVD process, 160: equipment loading / unloading, 170: semiconductor storage shelf, 180: elevating device, 200: fan filter unit, 210: semiconductor manufacturing equipment, 220: pump, 230: piping 240: wafer carrier, 250: worker, 260
… Grating.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 浜田 豊秀 東京都小平市上水本町五丁目20番1号 株 式会社日立製作所半導体事業部内 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Toyohide Hamada 5-2-1, Josuihonmachi, Kodaira-shi, Tokyo In the semiconductor division of Hitachi, Ltd.

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】半導体製造工場を共通設備構成部と、各製
品毎の特定設備構成部とに分けて構成することを特徴と
する半導体製造工場のレイアウト方法。
1. A layout method for a semiconductor manufacturing plant, wherein the semiconductor manufacturing plant is divided into a common equipment component and a specific equipment component for each product.
【請求項2】前記特定設備構成部に各々設備の搬出入口
を設けたことを特徴とする請求項1記載の半導体製造工
場のレイアウト方法。
2. A layout method for a semiconductor manufacturing plant according to claim 1, wherein said specific equipment component is provided with a loading / unloading port for each equipment.
【請求項3】前記共通設備構成部を中心として、各製品
毎の前記特定設備構成部を前記共通設備構成部の周囲に
配置したことを特徴とする請求項1、または請求項2記
載の半導体製造工場のレイアウト方法。
3. The semiconductor according to claim 1, wherein the specific equipment component for each product is arranged around the common equipment component centering on the common equipment component. Manufacturing factory layout method.
【請求項4】工場全体の外形を直方体にして、前記半導
体製造工場のレイアウト方法を実現したことを特徴とす
る請求項1、または請求項2記載の半導体製造工場のレ
イアウト方法。
4. The layout method for a semiconductor manufacturing plant according to claim 1, wherein the layout of the semiconductor manufacturing plant is realized by making the outer shape of the whole factory a rectangular parallelepiped.
JP9346093A 1997-12-16 1997-12-16 Method for laying out semiconductor manufacture factory Pending JPH11176712A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9346093A JPH11176712A (en) 1997-12-16 1997-12-16 Method for laying out semiconductor manufacture factory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9346093A JPH11176712A (en) 1997-12-16 1997-12-16 Method for laying out semiconductor manufacture factory

Publications (1)

Publication Number Publication Date
JPH11176712A true JPH11176712A (en) 1999-07-02

Family

ID=18381096

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9346093A Pending JPH11176712A (en) 1997-12-16 1997-12-16 Method for laying out semiconductor manufacture factory

Country Status (1)

Country Link
JP (1) JPH11176712A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001013411A1 (en) * 1999-08-16 2001-02-22 Tokyo Electron Limited Method for carry in and installation of semiconductor manufacturing apparatus and substitute for apparatus
US7269925B2 (en) * 2002-06-14 2007-09-18 Wei Chak Joseph Lam Layout of production facility
US8621786B2 (en) 2003-02-13 2014-01-07 Wei Chak Joseph Lam Efficient layout and design of production facility
JP2014097794A (en) * 2008-09-16 2014-05-29 Bridgestone Corp Pneumatic tire
US9353543B2 (en) 2002-06-14 2016-05-31 Beacons Pharmaceutical Pte Ltd Efficient layout and design of production facility

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001013411A1 (en) * 1999-08-16 2001-02-22 Tokyo Electron Limited Method for carry in and installation of semiconductor manufacturing apparatus and substitute for apparatus
US6530136B1 (en) 1999-08-16 2003-03-11 Tokyo Electron Limited Method for transporting and installing a semiconductor manufacturing apparatus
US7269925B2 (en) * 2002-06-14 2007-09-18 Wei Chak Joseph Lam Layout of production facility
US9194149B2 (en) 2002-06-14 2015-11-24 Beacons Pharmaceutical Pte. Ltd. Efficient layout and design of production facility
US9353543B2 (en) 2002-06-14 2016-05-31 Beacons Pharmaceutical Pte Ltd Efficient layout and design of production facility
US9493961B2 (en) 2002-06-14 2016-11-15 Beacons Pharmaceutical Pte. Ltd. Efficient layout and design of production facility
US8621786B2 (en) 2003-02-13 2014-01-07 Wei Chak Joseph Lam Efficient layout and design of production facility
JP2014097794A (en) * 2008-09-16 2014-05-29 Bridgestone Corp Pneumatic tire

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