JPH1117056A - Semiconductor chip mounting board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve connection reliability by providing a connecting terminal and wiring conductor for connecting with the bumps of a semiconductor chip on the surface of the board and not arranging the wiring conductor on the outline of the semiconductor chip to be mounted later. SOLUTION: A wiring conductor 12 formed on the surface of a semiconductor chip mounting board 8 is not formed under the outline 1 of a semiconductor chip 3, and the opening 2 of solder resist 6 is formed larger than the outline 1 of the semiconductor chip 3. Then, a bump 4 is formed on the terminal electrode of the semiconductor chip 3, and an anisotropical conductive adhesive 9 is arranged between the semiconductor chip 3 and the semiconductor chip mounting board 8. The semiconductor chip 3 is faced down to be aligned with a connecting terminal 5 and is mounted on the semiconductor chip mounting board 8. Then, heat and pressure are applied to the workpiece, and the bump 4 and the connecting terminal 5 are electrically connected via the anisotropical conductive adhesive 9.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a substrate for mounting a semiconductor chip.

[0002]

2. Description of the Related Art In recent years, with the development of electronic equipment, demands for not only higher performance of electronic equipment but also reduction in size and weight of a circuit board including a wiring board and electronic components have become more severe. Until now, wiring boards with through holes
It has evolved from a method of mounting a P package or a PGA package to a method of mounting a QFP package, a BGA package, or the like on a wiring board provided with a connection circuit on the surface. This is because, in the latter case, the dead space of the wiring board is reduced, high-density mounting is possible, and the package itself is easily reduced in size and performance. However, the development of electronic equipment is unavoidable, and it is still a major challenge to achieve both high performance of electronic equipment and reduction in size and weight of circuit boards.

As one of the solutions, a method of mounting a semiconductor chip directly on a wiring board without packaging has attracted attention. This method is roughly divided into two depending on the way of bonding the semiconductor chip and the wiring board. One is a method using wire bonding, which has been widely used in the packaging technology, and the other is a method using bump connection. The latter is generally called flip-chip connection, and because electrodes can be formed in an area array, it is easy to increase the number of pins, and the signal path is short and the electrical characteristics are good. ing.

A general flip-chip connection method uses a solder bump placed on a wettable metal terminal of a semiconductor chip and a pair of wettable metal terminals placed on a substrate, and performs reflow by a reflow process. The semiconductor chip and the substrate are electrically connected.

[0005]

However, at present,
Although several structures for improving the mass productivity of such a substrate for mounting a semiconductor chip have been proposed, there is a problem that each has advantages and disadvantages and a structure having a high mass productivity has not been established. Was.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor chip mounting substrate which has improved connection reliability and is excellent in mass productivity.

[0007]

A semiconductor chip mounting substrate according to the present invention is a semiconductor chip mounting substrate on which a semiconductor chip having terminals is mounted with an adhesive, and the surface of which is connected to a bump of the semiconductor chip. And a wiring conductor, and the wiring conductor is not arranged at a position of an outline of a semiconductor chip to be mounted later.

A semiconductor chip mounting substrate according to the present invention is a semiconductor chip mounting substrate on which a semiconductor chip having terminals is mounted with an adhesive, and has a surface for connection with a bump of the semiconductor chip. Only a terminal is provided, and a wiring conductor for connecting the connection terminal to a conductor provided on another surface or an end of the substrate is provided.

[0009] Such a semiconductor chip mounting substrate may be provided with a through hole for connection, and it is preferable to fill the through hole with a resin for filling the hole in order to increase the strength of the through hole against heat.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The wiring conductor of the present invention may be a wiring drawn from a connection terminal or other wiring. It is necessary that it is not located at a place. It is preferable that the portion where the wiring conductor is not arranged is separated from the outline of the semiconductor chip by 100 μm or more.

Such a wiring board comprises, for example, a connection terminal, an insulating layer supporting the connection terminal, a conductor on the back surface connected to the connection terminal, and a through hole connecting the connection terminal and the conductor on the back surface. The conductor is a plastic leadless chip carrier (hereinafter, PLCC), which is a wiring board connected to a half through hole formed in the end face of the substrate.
That. ). Further, instead of the half through hole formed on the end face of the board, a wiring board having pads formed on the back face of the board and having an arrangement interval wider than the arrangement interval of the connection terminals may be used. Is equipped with a ball grid array (hereinafter referred to as BG
A. ), And can be used as a flip chip if solder or gold bumps are formed.

[0012] Further, the semiconductor device includes a connection terminal, an insulating layer supporting the connection terminal, an inner conductor connected to the connection terminal, and a via hole connecting the connection terminal to the inner conductor. It can also be used for PLCCs that are connected to half of the formed through holes. A connection terminal, an insulating layer supporting the connection terminal, an inner conductor connected to the connection terminal, and a via hole connecting the connection terminal and the inner conductor, the inner conductor being the same as the connection terminal by the via hole. It may be a wiring board connected to a wiring conductor provided on the surface. Further, a wiring board connected to a through hole may be used. And if you insert the connecting pin into this through hole and fix it with solder etc.,
It can also be used as a pin grid array (hereinafter, referred to as PGA).

Furthermore, it is a multilayer wiring board, and can be used as PLCC, flip chip, BGA, and PGA as described above, and these structures can be used in combination.

Preferably, the connection terminals are supported by a substrate reinforced with glass cloth, and the substrate on which the connection terminals are supported is provided with a build-up layer on the substrate reinforced with glass cloth. It is preferable that the connection terminal is directly supported by the build-up layer. Such a build-up layer may be an insulating layer reinforced with a glass nonwoven fabric or an insulating layer reinforced with aramid fibers.

The resin composition used for the adhesive for bonding the semiconductor chip mounting substrate to the semiconductor chip having terminals according to the present invention includes epoxy resin and imidazole, hydrazide, boron trifluoride-amine complex, sulfonium A mixture of a latent curing agent such as a salt, an amine imide, a polyamine salt, and dicyandiamide is used. In order to alleviate the stress based on the difference in thermal expansion coefficient of the circuit member, the storage elastic modulus at 40 ° C. after bonding is 100%. An adhesive resin composition of up to 1500 MPa is preferred.

For example, epoxy resin and imidazole-based, hydrazide-based, boron trifluoride-based resin compositions can be used as adhesive resin compositions to obtain good fluidity during connection and high connection reliability.
A mixture of a latent curing agent such as an amine complex, a sulfonium salt, an amine imide, a polyamine salt, and dicyandiamide has a storage elastic modulus at 40 ° C. of 100 to 1500 after adhesion.
An adhesive in which an acrylic rubber is blended so as to be in MPa may be used. These resin compositions are dissolved in a solvent, applied to a film or sheet whose surface has been release-treated, heated at a temperature lower than the curing temperature of the curing agent, and the storage elasticity of the cured adhesive film obtained by evaporating the solvent. The rate is, for example, Rheological Co., Ltd.
It can be measured using Rheospectra DVE-4 (pulling mode, frequency 10 Hz, temperature rise at 5 ° C./min).

As acrylic rubber to be mixed with the adhesive,
Polymers or copolymers containing at least one of acrylic acid, acrylic acid ester, methacrylic acid ester and acrylonitrile as a monomer component, and among them, copolymer acrylic rubber containing glycidyl acrylate or glycidyl methacrylate containing a glycidyl ether group Is preferably used. The molecular weight of these acrylic rubbers is preferably 200,000 or more from the viewpoint of increasing the cohesive strength of the adhesive. The amount of acrylic rubber in the adhesive is 15w
If it is less than 10%, the storage elastic modulus at 40 ° C. after bonding is 15%.
If it exceeds 100 MPa, and if it exceeds 40 wt%, the elastic modulus can be reduced, but the melt viscosity at the time of connection increases, and the rejection of the molten adhesive at the interface of the connection electrode or the interface of the connection electrode and the conductive particles decreases, Since electrical conduction between the connection electrodes or between the connection electrodes and the conductive particles cannot be secured, the acrylic compounding amount is preferably 15 to 40 wt%.

Further, a thermoplastic resin such as a phenoxy resin may be blended in the adhesive to make the film formability easier. In particular, the phenoxy resin is preferable because it has a similar structure to the epoxy resin, and has characteristics such as excellent compatibility with the epoxy resin and excellent adhesiveness.

In order to form such an adhesive in the form of a film, an adhesive composition comprising the above epoxy resin, acrylic rubber, phenoxy resin, and a latent curing agent is liquefied by dissolving or dispersing in an organic solvent. This is performed by applying the composition on a peelable substrate and removing the solvent at a temperature lower than the activation temperature of the curing agent. As the solvent used at this time, a mixed solvent of an aromatic hydrocarbon type and an oxygen-containing type is preferable because the solubility of the material is improved.

Conductive particles can be dispersed in the adhesive for the purpose of positively imparting anisotropic conductivity in order to absorb variations in height of bumps and circuit electrodes of the semiconductor chip. Such conductive particles include, for example, Au, Ni, A
g, Cu, W or metal particles such as solder or metal particles formed by plating or depositing a thin film of gold or palladium on the surface of these metal particles. Conductive particles provided with a conductive layer of Au, solder, or the like can be used. The particle size needs to be smaller than the minimum distance between the electrodes on the substrate, and if there is a variation in the height of the electrodes, it is preferably larger than the variation, and preferably in the range of 1 μm to 10 μm.
The amount of the conductive particles dispersed in the adhesive is 0.1 to 30.
%, Preferably 0.1 to 20% by volume.
As such an anisotropic conductive adhesive, a commercially available one is Flip Tack (trade name, manufactured by Hitachi Chemical Co., Ltd.).

The resin used for filling the through hole with a resin is preferably a resin composition comprising a polyamideimide resin and a thermosetting component. The polyamide-imide resin includes an aromatic polyamide-imide resin obtained by reacting an aromatic diimide carboxylic acid obtained by reacting a diamine having three or more aromatic rings with trimetic anhydride and an aromatic diisocyanate; Alternatively, 2,2-bis [4- {4- (5-hydroxycarbonyl-1,3-dione-isoindolino) phenoxy} phenyl] propane as an aromatic diimide carboxylic acid and 4,4 ′ as an aromatic diisocyanate -It is preferable to use an aromatic polyamide-imide resin obtained by reacting with diphenylmethane diisocyanate.

Diamines having three or more aromatic rings include:
2,2-bis [4- (4-aminophenoxy) phenyl] propane, bis [4- (3-aminophenoxy) phenyl] sulfone, bis [4- (4-aminophenoxy) phenyl] sulfone, 2,2- Bis [4- (4-aminophenoxy) phenyl] hexafluoropropane,
Bis [4- (4-aminophenoxy) phenyl] methane, 4,4-bis (4-aminophenoxy) biphenyl, bis [4- (4-aminophenoxy) phenyl] ether, bis [4- (4-aminophenoxy) )] Phenyl] ketone, 1,3-bis (4-aminophenoxy) benzene, 1,4-bis (4-aminophenoxy) benzene and the like can be used alone or in combination.

The aromatic diisocyanate includes 4,4
4′-diphenylmethane diisocyanate, 2,4-tolylene diisocyanate, 2,6-tolylene diisocyanate, naphthalene-1,5-diisocyanate, 2,
4-Tolylene dimer or the like can be used alone or in combination.

The thermosetting component is preferably an epoxy resin and a curing agent or a curing accelerator thereof. The epoxy resin may be any one having at least two glycidyl groups. It is more preferable that the number of glycidyl groups is three or more. The epoxy resin may be liquid or solid at room temperature. Commercially available products include bisphenol A type YD1 as a liquid epoxy resin.
Bisphenol F type, such as 28, YD8125 (trade name, manufactured by Toto Kasei Kogyo Co., Ltd.), Ep815, Ep828 (trade name, manufactured by Yuka Shell Epoxy Co., Ltd.), DER337 (trade name, manufactured by Dow Chemical Industry Co., Ltd.) of,
YDF170 and YDF2004 (trade names, manufactured by Toto Kasei Kogyo Co., Ltd.) and the like. As solid epoxy resins, YD907, YDCN704S, YDP
N172 (all manufactured by Toto Kasei Kogyo Co., Ltd., trade name)
Etc., Ep1001, Ep1010, Ep180S70
(Product name made by Yuka Shell Epoxy Co., Ltd.)
019, ESCN195 (manufactured by Sumitomo Chemical Co., Ltd., trade name), DER667, DEN438 (manufactured by Dow Chemical Industry Co., Ltd., trade name), EOCN1020 (manufactured by Nippon Kayaku Co., Ltd., trade name) and the like. Further, in order to improve the flame retardancy, a brominated epoxy resin may be used. For example, commercially available products such as YDB400 (trade name, manufactured by Toto Kasei Kogyo Co., Ltd.) and Ep5050 (Yukaka Epoxy Co., Ltd.) ESB400, made by company, product name)
(Manufactured by Sumitomo Chemical Co., Ltd., trade name).
These may be used alone, but a plurality of epoxy resins may be selected as necessary.

As the epoxy resin curing agent or curing accelerator, amines, imidazoles, polyfunctional phenols, acid anhydrides, isocyanates and the like can be used. Examples of amines include dicyandiamide, diaminodiphenylmethane, and guanylurea.Examples of imidazoles include alkyl-substituted imidazole and benzimidazole.Examples of polyfunctional phenols include hydroquinone, resorcinol, bisphenol A and halogen compounds thereof. These include novolaks and resole resins which are condensates with aldehydes, and the acid anhydrides include phthalic anhydride, hexahydrophthalic anhydride, benzophenonetetracarboxylic acid and the like. Examples of the isocyanates include tolylene diisocyanate, isophorone diisocyanate, and the like, and those obtained by masking this isocyanate with a phenol or the like may be used.

In the case of amines, the necessary amount of these curing agents is preferably such that the equivalent of the active hydrogen of the amine is substantially equal to the epoxy equivalent of the epoxy resin. For example, in the case of a primary amine, there are two hydrogens, and 0.5 equivalent of the primary amine is required for 1 equivalent of the epoxy resin.
In the case of a secondary amine, one equivalent is required. Next, in the case of imidazoles, the equivalence ratio with active hydrogen is not simply obtained,
Empirically, 1 to 10 parts by weight of epoxy resin
Parts by weight are required. In the case of polyfunctional phenols and acid anhydrides, 0.8 to 1.2 equivalents are required for 1 equivalent of the epoxy resin. In the case of isocyanates, it reacts with both the polyamideimide resin and the epoxy resin, so that 0.8 to 1.2 equivalents are required for 1 equivalent of each. These curing agents or curing accelerators may be used alone, but if necessary, a plurality of curing agents or curing accelerators may be selected.

The weight ratio of the polyamide-imide resin to the thermosetting component is preferably in the range of 10 to 150 parts by weight, more preferably 10 to 150 parts by weight, based on 100 parts by weight of the polyamide-imide resin. Is less than 300 parts, the coefficient of linear expansion from the glass transition point to 350 ° C. is large,
The characteristic of the polyamide-imide resin that the storage elastic modulus at a temperature is low is manifest as it is, and when it exceeds 150 parts by weight, the compatibility is reduced and gelation occurs during stirring.

[0028]

Example 1 A through-hole 7 was formed on an MCL-E-67 (trade name, manufactured by Hitachi Chemical Co., Ltd.) which is a 0.8 mm-thick double-sided copper-clad laminate in which 18 μm copper foil was laminated on both sides. And immersed in an L-59 plating solution (trade name, manufactured by Hitachi Chemical Co., Ltd.), which is an electroless copper plating solution, at a solution temperature of 70 ° C. for 8 hours to deposit 15 μm plated copper, which is unnecessary. The copper was selectively removed by etching, the through-hole 7 was filled with a resin, and a solder resist 6 was formed by a silk-screen printing method to produce a semiconductor chip mounting substrate 8 having a through-hole. At this time, the filled resin was produced as follows. In a 1-liter separable flask equipped with a faucet equipped with a faucet connected to a reflux condenser, a thermometer and a stirrer, as a diamine having three or more aromatic rings, 2,2-bis- [4 -(4-aminophenoxy) phenyl] propane 123.2 g (0.
3mol), 115.3 g of trimellitic anhydride (0.6
mol) as a solvent, 716 g of NMP (N-methyl-2-pyrrolidone) was charged, and the mixture was stirred at 80 ° C for 30 minutes.
Then, 143 g of toluene was charged as an aromatic hydrocarbon azeotropic with water, and then the temperature was increased and the mixture was refluxed at about 160 ° C. for 2 hours. Confirm that water has accumulated in the water content determination receiver at least about 10.8 ml and that distilling of water has not been observed, and remove the distillate remaining in the water content determination device at about 190 ° C. The temperature was increased to remove the toluene. Thereafter, the solution was returned to room temperature, and 75.1 g (0.3 mol) of 4,4'-diphenylmethane diisocyanate was charged as an aromatic diisocyanate, and reacted at 190 ° C. for 2 hours. After completion of the reaction, an NMP solution resin of an aromatic polyamideimide resin was obtained. An epoxy resin and a phenol resin were added to the aromatic polyamideimide resin as thermosetting components, and the mixture was stirred at room temperature for about 1 hour to obtain a resin composition. After filling the holes, the mixture was cured at 160 ° C. for 60 minutes with an electric heat dryer, and then the excess filling resin on the substrate surface was removed with a belt sander polishing machine T26MW type (trade name, manufactured by Kikugawa Iron Works) equipped with a # 600 polishing cloth. . As shown in FIG. 1A, the semiconductor chip mounting substrate 8 has the opening 2 of the solder resist 6 formed to be the same as or larger than the outline 1 of the semiconductor chip. Then, as shown in FIG. 1B, bumps 4 are formed on the terminal electrodes of the semiconductor chip 3 by plating, and a flip-tack (an anisotropic conductive adhesive 9) (manufactured by Hitachi Chemical Co., Ltd.) (Trade name) is disposed between the semiconductor chip mounting substrate 8 and the semiconductor chip 3, the semiconductor chip 3 is turned downward, and the connection terminals 5 on the semiconductor chip mounting substrate 8 are aligned. Mounting substrate 8
After the semiconductor chip is mounted on the chip, the bumps 4 of the semiconductor chip 3 and the connection terminals 5 of the semiconductor chip mounting substrate 8 are heated and pressed from above the chip under the conditions of 180 ° C., 30 g / bump, and 20 seconds. They were electrically connected via an anisotropic conductive adhesive 9. As described above, the semiconductor chip 3
And the semiconductor chip mounting substrate 8 very simply and stably,
And the connection was made in a versatile way. Further, there was no defective formation of the solder resist 6 formed on the chip mounting surface of the semiconductor chip mounting substrate 8, and the connection reliability after mounting the semiconductor chip 3 was good. Regarding the solder heat resistance of the through hole, generation of through hole voids and peeling from the base resin were not observed even after floating for 1 minute in the 260 ° C. molten solder.

Example 2 A semiconductor chip mounting substrate 8 was prepared in the same manner as in Example 1, and the opening 2 of the solder resist 6 was cut out from the outline 1 of the semiconductor chip 3 as shown in FIG. Also formed smaller. Then, as shown in FIG. 2 (b), the tip of the gold wire is melted with a torch or the like on the terminal electrode of the semiconductor chip 3 to form a gold ball, and the ball is pressed on the electrode pad. A bump 4 obtained by cutting is provided, and a flip-tack (trade name, manufactured by Hitachi Chemical Co., Ltd.) as an anisotropic conductive adhesive 9 is arranged between the semiconductor chip mounting substrate 8 and the semiconductor chip 3. After the semiconductor chip 3 is oriented downward and the connection terminals 5 on the semiconductor chip mounting substrate 8 are aligned, and the semiconductor chip 3 is mounted on the semiconductor chip mounting substrate 8, the semiconductor chip 3 is placed at 180 ° C., 30 ° C.
The bumps 4 of the semiconductor chip 3 and the connection terminals 5 of the semiconductor chip mounting substrate 8 were electrically connected via the conductive adhesive 9 by heating and pressing from above the chip under the conditions of g / bump for 20 seconds. As described above, the semiconductor chip 3
And the semiconductor chip mounting substrate 8 very simply and stably,
And the connection was made in a versatile way. Further, there was no defective formation of the solder resist 6 formed on the chip mounting surface of the semiconductor chip mounting substrate 8, and the connection reliability after mounting the semiconductor chip was good. Regarding the solder heat resistance of the through hole, generation of through hole voids and peeling from the base resin were not observed even after floating for 1 minute in the 260 ° C. molten solder.

Example 3 A semiconductor chip mounting substrate 8 was prepared in the same manner as in Example 1, and as shown in FIG. 3A, a wiring conductor 12 formed on the surface of the semiconductor chip mounting substrate 8 was Outline 1
Below, the opening 2 of the solder resist 6 is
It was formed 100 μm larger than the outline 1 of the semiconductor chip 3. Then, as shown in FIG. 3B, bumps 4 are formed on the terminal electrodes of the semiconductor chip 3 by plating.
A flip-tack (trade name, manufactured by Hitachi Chemical Co., Ltd.) is used as the anisotropic conductive adhesive 9 and the semiconductor chip mounting substrate 8 is used.
Connection terminals 5 on the semiconductor chip mounting substrate 8 with the semiconductor chip 3 facing downward.
After the semiconductor chip 3 is mounted on the semiconductor chip mounting substrate 8, the bumps 4 of the semiconductor chip 3 are heated and pressed from above the chip under the conditions of 180 ° C., 30 g / bump, and 20 seconds. And the connection terminals 5 of the semiconductor chip mounting substrate 8 were electrically connected via an anisotropic conductive adhesive 9. As described above, the semiconductor chip 3 and the substrate 8 for mounting a semiconductor chip could be connected in a very simple, stable and versatile manner. Further, there was no defective formation of the solder resist 6 formed on the chip mounting surface of the semiconductor chip mounting substrate 8, and the connection reliability after mounting the semiconductor chip was good. In addition, the solder heat resistance of the through hole is 1
Even after separation, generation of through-hole voids and separation from the base resin were not observed.

[0031]

As described above, according to the present invention, it is possible to provide a semiconductor chip mounting substrate which is improved in connection reliability and excellent in mass productivity.

[Brief description of the drawings]

FIG. 1A is a top view illustrating a main part of an embodiment of the present invention, and FIG. 1B is a cross-sectional view of the embodiment of the present invention.

FIG. 2A is a top view showing a main part of another embodiment of the present invention, and FIG. 2B is a cross-sectional view of another embodiment of the present invention.

FIG. 3A is a top view showing a main part of still another embodiment of the present invention, and FIG. 3B is a cross-sectional view showing still another embodiment of the present invention.

[Explanation of symbols]

1. Outline line 2. Opening 3. Semiconductor chip 4. Bump 5. Connection terminal 6. 6. Solder resist 7. Through hole 8. Substrate for mounting semiconductor chip Anisotropic conductive adhesive 12. Wiring conductor

 ──────────────────────────────────────────────────の Continued on the front page (72) Inventor: Shoji Nakaso 1500 Ogawa, Shimodate-shi, Ibaraki Pref.Hitachi Kasei Kogyo Co., Ltd. Tsukuba Development Laboratory

Claims (3)

[Claims] 1. A semiconductor chip mounting substrate on which a semiconductor chip having terminals is mounted with an adhesive, having a connection terminal for connecting to a bump of the semiconductor chip and a wiring conductor on a surface thereof. A semiconductor chip mounting substrate, wherein a wiring conductor is not arranged at a position of an outline of a semiconductor chip to be mounted later. 2. A semiconductor chip mounting substrate on which a semiconductor chip having terminals is mounted by means of an adhesive, the surface of which is provided with only connection terminals for connection with bumps of the semiconductor chip. A wiring conductor for connecting to a conductor provided on another surface or an end of the substrate. 3. The semiconductor chip mounting substrate according to claim 1, wherein the substrate has a plated through hole, and the through hole is filled with a filling resin.