JPH11168528A - Line controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve cost performance and to shorten the fault recovery time to the utmost without reducing the reliability of the line controller in a data exchange. SOLUTION: In a data exchange that having the line controller 400 provided with a physical channel control section 420 that terminates a physical channel 5 and a physical channel control section 410 that terminates a logical channel 8 set on the physical channel, a protocol control means 500 is respectively provided in the physical channel control section and a logical channel control section to be interconnected with each other (in the case, an optional physical channel control section and an optional logical control section are interconnected via a connection means 430). Each protocol control means checks an error of data sent/received between the physical channel control section and the logical channel control section and locates at which of the physical channel control section and the logical channel control section the error takes place in the case of detecting the data error.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a line controller provided in a data exchange, and more particularly, to a line controller having a physical line controller for terminating a physical line and a logical line controller for terminating a logical line.

[0002]

2. Description of the Related Art FIG. 8 is a diagram illustrating a data exchange to which the present invention is applied, FIG. 9 is a diagram illustrating a conventional line controller, and FIG. 10 is a diagram illustrating a switching control sequence in FIG. FIG.

The data exchange shown in FIG. 8 exchanges packets, frames, cells, etc. (hereinafter collectively referred to as data (d)), and each of them has a duplicated main processor (CPU) (1) and memory ( MEM) (2), an input / output interface (IOC) (3), and a plurality of line controllers (4).

[0004] A main processor (CPU) (1) controls the entire data exchange. Memory (MEM) (2)
Stores a control program executed by the main processor (CPU) (1), data, and the like.

I / O interface (IOC) (3)
Is console (CSL), hard disk (HDD)
Alternatively, a tape drive (TPD) or the like is connected to the main processor (C
PU) (1).

Each line controller (4) accommodates one or more physical lines (5), and a processor bus (7).
And a line controller (4) via a processor bus (7). The main processor (CPU)
Data (d) can be transmitted / received between (1) and the other party exchange (6) connected via the physical line (5), and the other party connected via the physical line (5). Data (d) transmitted and received by the exchange (6) can be mutually transferred via the processor bus (7).

The control unit connection shown by a dotted line in FIG. 8 indicates that the two main processors (CPU) (1) are entangled with the processor bus (7).
The device entity does not exist.

The line controller (4), as shown in FIG. 9, comprises a duplicated logical line controller (41) and a single physical line controller (42). The control unit (41) executes termination processing of the logical line (8) set on the physical line (5), and the physical line control unit (42) executes termination processing of the physical line (5). .

Each logical line controller (41) includes a line control processor (411), a buffer memory (412), a protocol controller (413), and a main memory (41).
4), an I / O (415) and a connection part (416).

The protocol controller (413)
Is a well-known HDLC (High-Level Transfer) transferred between the own data exchange and the other exchange (6) via the logical line (8).
level data link control), and performs known serial number control, error control, and the like.

On the other hand, the physical line control section (42) includes a physical line termination circuit (421), a framer (422), and a changeover switch (423). In addition, under the control of the line control processor (411) in the logical line control unit (41), the changeover switch (423) switches one of the two logical line control units (41) [the active logical line control unit (41). 41)
The following is referred to as "

FIG. 10 shows a switching control sequence in the line controller (4). Main processor (CPU)
(1) During communication with the other party exchange (6) via the line controller (4) and the physical line (5), the data (d) is transferred to the other party exchange (6) within a predetermined time. The normal response of the data communication is confirmed by returning a response from the other exchange (6).

In this state, the main processor (CPU)
When an abnormality occurs in the communication between (1) and the destination exchange (6), the main processor (CPU) (1) sends the communication data (d) sent to the destination exchange (6) to the destination exchange (6). Communication data (d) corresponding to the response from (6)
However, if it detects that it has not arrived within the predetermined time, it determines that a timeout abnormality has been detected and executes a retry process of retransmitting the same data (d). If it is determined that the abnormality that has occurred has not been resolved, the retry data (d ) Is not obtained again within a predetermined time, and the timeout abnormality is recognized again.

In such a case, the main processor (CPU)
(1) transmits a fault isolation instruction to the line controller (4). In the line controller (4), the working logical line controller (41) includes a main processor (CPU) (1).
Upon receiving the fault isolation instruction transmitted from, a fault isolation process is executed to identify a fault location, and the identified fault location is notified to the main processor (CPU) (1).

The line controller (4) is, as described above,
Since it is impossible to specify whether the fault location is within the own data exchange or the remote exchange (6), the extent is limited to the extent that normal communication becomes impossible using the active logical line control unit (41).

When the main processor (CPU) (1) receives the failure point notification returned from the line controller (4), normal communication cannot be performed using the active logical line controller (41). It recognizes that there is, and transmits a failure switching instruction to the line control device (4).

In the line control unit (4), the working logical line control unit (41) includes a main processor (CPU) (1).
Receives the failure switching instruction transmitted from the controller, drives the switch (423) in the physical line control unit (42) to
The switching operation of the logical line control unit (41) for switching between active and standby is executed, and when the switching operation is completed, the main processor (CPU) (1) is notified of the switching operation.

The main processor (CPU) (1) having received the completion of the switching operation transmits a connection setting to the partner exchange (6). Upon receiving the connection setting, the partner exchange (6) is restored to the state and returns a connection response.

When the main processor (CPU) (1) receives the connection response returned from the partner exchange (6), the state is restored and communication with the partner exchange (6) is resumed.

[0020]

As is apparent from the above description, in the conventional line controller, a logical line controller (41) which is duplicated and a physical line controller (42) which is singled are used. When a failure occurs in the connection between the logical line control unit (41) and the physical line control unit (42), the protocol controller (413) in the logical line control unit (41) automatically configures itself. Whether a failure has occurred in the data exchange (that is, in the physical line controller (42))
Alternatively, there has been a problem that it is impossible to determine whether a failure has occurred on the partner exchange (6) including the physical line (5).

In a conventional line controller, two logical line controllers (41) in each line controller are connected only to a physical line controller (42) in the same line controller. One of the logical line control units (41) is always in a standby state, and although it is a natural result that emphasizes reliability, the use efficiency of the logical line control unit (41) is low.

In a conventional line controller, when a failure occurs, all the main processors (CPU)
In accordance with the instructions from (1), isolate faults (current use is poor)
In addition, there is a problem that a great deal of time is spent because of the failure switching.

An object of the present invention is to make it possible to improve the economics of the line control device without reducing the reliability of the line control device as much as possible and to shorten the failure recovery time as much as possible.

[0024]

FIG. 1 is a diagram illustrating the principle of the present invention. In FIG. 1, reference numeral 400 denotes a line controller to which the present invention is applied; 420, a physical line controller for terminating the physical line (5); 410, a logical line (8) set on the physical line (5); This is a logical line control unit. Note that 100
Is a processor that controls the overall control of the data exchange subject to the present invention.

Reference numeral 500 denotes protocol control means provided in the logical line control unit (410) and the physical line control unit (420) according to the present invention. 430 is connection means provided according to the present invention.

The protocol control means (500) provided in the physical line control unit (420) and the logical line control unit (41)
0) is connected to the protocol control means (500), and checks for abnormal communication data transmitted and received between the logical line control unit (410) and the physical line control unit (420). When an abnormality is detected in communication data passing through (400), the logical line control unit (4
10) and which side of the connection point between the physical line control unit (420) and the cause of the abnormality can be specified.
[The above is related to the present invention (claim 1)] The line controller (400) includes a plurality of logical line controllers (410), a plurality of physical line controllers (420), and respective logical line controllers (410). ) And the physical line controller (42)
Each protocol control means (500) provided in (0)
Connection means (430) for accommodating the connection means (4).
30), by adding the identification information of the transfer destination protocol control means (500) to the information sent by each protocol control means (500), It is considered that information can be transferred to / from the line control unit (420). [As above, the present invention (claim 2) relates] The logical line control unit (410) includes a physical line control unit (4).
The setting information which needs to be set for the operation of the communication line 20) is transmitted in the same format as the communication data described above in the destination physical line control unit (4).
20), and the physical line control unit (420) may consider setting the setting information transferred from the logical line control unit (410) in its own physical line control unit (420). [Thus, related to the present invention (claim 3)] Therefore, according to the present invention (claim 1), when the line control device detects an abnormality in the communication, the cause of the abnormality is determined from the physical line control unit to the physical line side. In this case, the physical line control unit can immediately specify which of the main processor and the main processor is present, and the fault location can be switched. Therefore, the time required for repairing the abnormality can be greatly reduced, and the present invention (claim 2) For example, by preparing a small number of spare logical line controllers, it is possible to greatly improve the economics of the line controller without significantly lowering the reliability. Further, according to the present invention (claim 3), The setting information required for the operation of the line control unit can be easily transmitted from the logical line control unit, and the operability of the line control device,
The economy and convenience are greatly improved.

[0027]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 2 is a diagram illustrating a line controller according to an embodiment of the present invention, FIG. 3 is a diagram illustrating a physical line controller according to an embodiment of the present invention, and FIG. 4 exemplifies a change in setting information by an HDLC frame. FIG. 5 is a diagram of FIG.
FIG. 6 is a diagram illustrating a setting information change path in FIG. 6, and FIG. 6 is a diagram illustrating a switching control sequence in FIG.
FIG. 7 is a diagram illustrating a switching control sequence within the line control device in FIG. The same reference numerals indicate the same objects throughout the drawings. The target data exchange is shown in FIG.
Corresponds to the one shown in FIG.

FIG. 2 shows the main processor (CPU) (1) [duplexed configuration] as the processor (100) in FIG. 1, and the line controller (4) in FIG.
00) is shown as the line controller ( _4A ).

The line controller (4 _A ) shown in FIG.
It has N physical line control units (42 _A ) and (N + 1) logical line control units (41), and further includes an arbitrary logical line control unit (41) and an arbitrary physical line control unit (42
_A ) is provided with a connection part (43) that can be connected to _A ).

[0030] Note that the logic channel control unit (41) plays the role of the logic channel control unit (410) in FIG. 1, also the physical channel control unit (42 _A), the physical channel control unit of Figure 1 (420) Plays a role, and furthermore the connection (43)
It plays the role of connection means (430) in FIG.

[0031] Thus, when all the logic channel control unit (41) and physical channel control unit (42 _A) is normal, the physical line control unit (42 _A) via connection (43) One of the logical line controllers (41) is connected one-to-one,
The remaining one logical line controller (41) serves as a common spare for all N active logical line controllers (41).

That is, the line control device (4 _A ) shown in FIG.
Becomes the logic channel control unit with respect to the physical channel control unit (42 _A) is (41), are provided with so-called (N + 1) spare format.

The line control device (4 _A ) shown in FIG.
Is to substitute a plurality of conventional line control devices (4) by one unit. As is well known, the (N + 1) spare type can greatly improve the economic efficiency with almost no reduction in reliability, as compared with the so-called (1 + 1) spare type employed in a conventional line controller.

[0034] In FIG. 2, although specific logic channel control unit (41) Physical channel control portion (42 _A), as shown by the one-dot chain line, is connected directly without going through the connecting portion (43).

[0035] This is because when the logic channel control unit (41) and the physical line control unit and (42 _A) becomes impossible connected via a connecting portion (43), each physical channel control unit (42 _A) is A path to be controlled by a corresponding specific logical line control unit (41) is prepared.

Each logical line controller (41) and physical line controller (42 _A ) are shown in FIG. Physical logical channel control unit (41) is changed is not assumed to be conventional, physical line control unit (42 _A) is that as shown in FIG. 3, was provided with the conventional one physical channel control unit (42) In addition to the line termination circuit (421) and the framer (422), a switching circuit (424), a protocol controller (425),
A physical line control processor (426), a setting information update protection circuit (427), and a setting information storage unit (428) are provided.

The protocol controller (425)
Plays the role of the protocol control means (500) in FIG. The changeover switch (423) provided in the conventional physical line control unit (42) is replaced with a changeover circuit (42).
4) and the physical line control processor (426).

However, the conventional line controller (4) [FIG.
2], one physical line controller (42) switches between two logical line controllers (41). However, in the line controller (4 _A ) shown in FIG. The switching of the line controller (42 _A ) from the working logical line controller (41) to the spare logical line controller (41) is realized by the connection change by the connection unit (43). ) Controls the connection change by the connection unit (43).

Here, all physical line control units (42 _A )
However, assuming that one common logical line control unit (41) is defined as the backup logical line control unit (41), each physical line control unit (42 _A ) In addition to the connection to the section (41), the multiple connection to the common spare logical line control section (41) is also considered.

The physical line control unit (42 _A ) shown in FIG.
Indicates such a connection state. When such a connection form is adopted, each physical line control unit (42 _A ) has already been connected to two logical line control units (41), and the switching operation by the switching circuit (424) is conventional. As in the line controller (4), the working logical line controller (4)
And executes the switching operation from 1) spare logic channel control unit (41) Physical channel control unit (42 _A) inside.

[0041] However preliminary logical line control unit (41), since it is a common by all of the physical line control unit (42 _A), it is necessary to a matter of course notwithstanding et al conflict handling. Logical line controller (4
1) of the protocol controller (413) is conventionally a certain logical channel control unit (41) in the same manner as in [reference 9], connecting portions physical line control unit which is connected via a (43) (42 _A)
Protocol controller (425), switching circuit (4)
24), a framer (422), a physical line terminating circuit (421), and a logical line (8) set via a physical line (5). A known HDLC frame is transmitted and received as shown in FIG.

_A protocol controller (425) provided in each physical line control unit (42 _A ) intercepts an HDLC frame transmitted and received by the protocol controller (413) and uses a frame check sequence (FCS) to determine whether there is an error. And if an error is detected in the HDLC frame transmitted / received between the logical line control unit (41) and the remote exchange (6), a failure occurs on the protocol controller (413) side from the protocol controller (425). Or protocol controller (425)
It is possible to further determine whether the error has occurred on the partner exchange (6) side.

The physical line controller (42 _A ), like the conventional logical line controller (41), performs a predetermined operation in order to execute a predetermined operation. Various setting information is set from 41), and updated as needed.

In such a case, the logical line control unit (41)
As shown in FIG. 4, an information part (I) having the same frame format as an HDLC frame transmitted / received by the line control device (4 _A ) to / from the remote exchange (6) via the physical line (5).
The setting information (i) to be set or updated in the physical line control unit (42 _A ), the address (a) indicating the setting location of the setting information (i), the setting and updating of the setting information (i), etc. Assemble the setting information setting updating HDLC frame in which the command (c) indicating the processing type is inserted, and use the HD for normal communication.
By the same route and LC frame, and transfers via the protocol controller (413) and connecting portion (43) to the physical channel control unit (42 _A).

In the physical line control unit (42 _A ), the protocol controller (425) intercepts the HDLC frame transferred from the logical line control unit (41) and stores the address (I) in the information unit (I). a), the command (c), and the setting information (i) are stored. When it is detected that the setting information setting update HDLC frame is not a normal communication HDLC frame, the switching circuit (424) and the framer (422). ) And the physical line terminating circuit (421) to prevent transmission to the physical line (5), perform an error check by a frame check sequence (FCS), and then send the address (a) from the information section (I). , The command (c) and the setting information (i) are extracted and temporarily stored in the setting information storage unit (428). ) To set information setting update for H
The reception of the DLC frame is notified by an interrupt.

Upon receiving the interrupt notification from the protocol controller (425), the physical line control processor (426) receives the address (a), command (c) and setting information (i) stored in the setting information storage section (428). ) Is extracted, the address (a) and the command (c) are analyzed, and the address (a) in the physical line control unit (42 _A ) is extracted.
Then, processing such as setting / updating indicated by the command (c) is executed at the location specified by the command (c).

As described above, the setting update of the setting information (i) for the physical line controller (42 _A ) is performed as described above.
If it is not possible to transfer the setting information setting update HDLC frame via 3), it is determined in advance corresponding to the physical line control unit (42 _A ) (connected by a dashed line in FIG. 2). ] from the line processor of the logic channel control unit (41) (411), the corresponding physical channel control unit (42 _a) set in the information update protection circuit (427), information in the HDLC frame setting information set update The address (a), command (C) and setting information (i) stored in the section (I) can be transferred.

The above transmission path is shown in FIG. In the physical line controller (42 _A ), the setting information update protection circuit (427) transmits the address (a) and the command () transferred from the line control processor (411) in the corresponding logical line controller (41). C) and the setting information (i), the setting information receiving unit in the setting information update protection circuit (427) transmits an update request to the update protection unit in the setting information update protection circuit (427), and Update protection circuit (4
27), the update protection unit in the physical line control processor (4)
26), based on the preset update protection contents,
After checking whether or not an update request from the setting information receiving unit in the setting information update protection circuit (427) can be updated, if it is determined that updating is possible, the address (a) and the command (c) are used.
After temporarily storing the setting information (i) in the setting information storage unit (428), the physical line control processor (426) is notified of the update by the setting information.

When the physical line control processor (426) receives the update notification of the setting information from the update protection section of the setting information update protection circuit (427), the physical line control processor (426) stores the information stored in the setting information storage section (428). The address (a), the command (c) and the setting information (i) are extracted, the address (a) and the command (c) are analyzed, and the address (a) in the physical line controller (42 _A ) is extracted. A process such as setting / updating indicated by the command (c) is executed at the designated location.

[0050] Further to the line control unit (4 _A) is not shown in FIG. 2, the main processor (CPU) (1) from the line control unit (4 _A) physical line processor in (426) A route for directly transmitting the setting update instruction of the setting information (i) is prepared.

The above transmission path is also shown in FIG. Main processor (CPU) (1), when transmitting a configuration update instruction for setting a physical channel control unit of the line control device (4 _A) (42 _A) information (i) is HDLC setting information set update
The address stored in the information part of the frame (I) (a), a command (c) and setting information (i), the target physical channel control unit (42 _A) setting information storage unit in the (42
8) In addition to transmitting to the (configuration information receiving unit), the configuration update notification of the configuration information (i) is directly transmitted to the physical line control processor (426).

The subsequent processing steps are performed by the logical line controller (4
The setting information update HDLC frame is sent from the line control processor (411) in 1) to the setting information update protection circuit (4).
It is executed in the same way as transmitted to 27).

In FIG. 3, the setting information update protection circuit (427) and the setting information storage section (428) are provided in duplicate, but as described above, each of the physical line control sections (42 _A ). Are redundantly connected to a unique working logical line control unit (41) and a spare logical line control unit (41) common to all physical line control units (42 _A ). 41) line control processor (41)
The setting information update protection circuit (427) and the setting are provided in order to enable the direct reception of the setting information setting update HDLC frame also from 1). The information storage unit (428) may have a single configuration.

Next, the switching process according to the embodiment of the present invention will be described with reference to FIGS. In FIG. 2 to FIG. 5, FIG. 6 and FIG. 7, in a state where normal communication is performed between the main processor (CPU) (1) in the own data exchange and the other exchange (6), (4 _a) physical line controller in (42 _a) to the provided protocol controller (425) is, as described above,
It intercepts the transferred communication HDLC frame and checks for errors.

In this state, the physical line control unit (42 _A )
When the protocol controller (425) in the network detects an error in the communication HDLC frame transferred from the main processor (CPU) (1) to the remote exchange (6), the physical line control processor (426) sends a failure occurrence notification. , The physical line control processor (4) in its own physical line control unit (42 _A ).
26) and the corresponding logical line controller (4
It is also transmitted to the line control processor (411) via the protocol controller (413) in 1).

Upon receiving the failure notification from the protocol controller (425), the physical line control processor (426) recognizes that a failure has occurred, and detects an error in the communication HDLC frame received by the physical line control processor (426). Therefore, the failure location is determined by the main processor (CP
U) It is specified to be between (1) and the logical line controller (41) [protocol controller (413)], and the main processor (CPU) (1) determines the failure location from the main processor (CPU) (1) to the protocol controller (425). It is instructed to notify until the line controller (41).

When the protocol controller (425) receives the notification instruction of the failure point from the physical line control processor (426), the protocol controller (413) in the connection section (43) and the logical line control section (41).
To the line control processor (411) from the main processor (CPU) (1) to the logical line controller (41).

When the line control processor (411) receives the failure notification transmitted from the protocol controller (425), it notifies the main processor (CPU) (1) of the failure and also notifies the main exchange (6). ), The main processor (CPU) (1) receives a failure notification when a failure occurrence notification is received from the protocol controller (425) via the protocol controller (413). The main processor (CPU) notifies the occurrence location and the failure location.
It specifies between (1) and the logical line control unit (41).

Meanwhile, the physical line processor (426) in the physical channel control unit (42 _A), the logic channel control unit the fault occurrence point, the main processor (CPU) (1) (4
1) it is between up via the physical line (5) to be identified and not a destination exchange (6) side from the physical channel control unit (42 _A), the logic channel control unit of the active (41) It is assumed that communication between the main processor (CPU) (1) and the remote exchange (6) is restored to normal by switching to the standby logical line control unit (41). The protocol controller (42) issues a working / standby switching notification instruction to notify the line control processor (411) of switching (41) to the standby logical line control unit (41).
5).

When the protocol controller (425) receives the active / standby switching notification instruction of the logical line control unit (41) from the physical line control processor (426), the connection unit (43) and the logical line control unit (41) An active / standby switching notification for switching the logical line control unit (41) from active to standby is transmitted to the line control processor (411) via the protocol controller (413) in the system.

The line control processor (411), which has received the active / standby switching notification from the logical line control unit (41), allows the switching from the own line control unit (4) to the standby line control unit (4). The standby switching response is sent to the physical line controller (42
_{When the} protocol controller (413) is instructed to notify the physical line control processor (426) in _A ), the protocol controller (413) is connected to the connection unit (4).
3) and the physical channel control unit (42 _A) physical channel control via the protocol controller (425) in the processor (426), transmitting the working / protection switching response of the logic channel control unit (41).

When the physical line control processor (426) receives the working / standby switch response transmitted from the working logical line control unit (41), the physical line control processor (426) executes the working / standby switching of the logical line control unit (41) by the above-described process. Execute the switching operation.

When the main processor (CPU) (1) recognizes that the working / standby switching operation of the logical line control unit (41) has been completed, the main processor (CPU) (1) transmits a connection setting to the partner exchange (6).

When the other exchange (6) receives the connection setting, the state is restored and a connection response is returned. Upon receiving the connection response returned from the partner exchange (6), the main processor (CPU) (1)
The state is restored, and communication with the partner exchange (6) is restarted.

As is clear from the above description, according to the embodiment of the present invention, the protocol controller (425) in the physical line control unit (42 _A ) includes the main processor (CP).
U) If an error is detected in the HDLC frame transmitted from (1) to the destination exchange (6), the physical line control processor (4)
26) Immediately locates the fault location to the main processor (CPU)
It is specified from (1) to the logical line control unit (41) [the protocol controller (413) therein], and the active / standby switching of the logical line control unit (41) is performed by the active logical line control unit (4).
1) and the working logical line control unit (41) sends
Upon receiving the preliminary switching response, the switching operation is performed immediately. Therefore, as in the conventional switching control process (see FIG. 10), a failure is detected in a shorter time compared to the abnormality detection due to timeout and the error re-recognition process due to timeout. In addition, it is not necessary to spend a great deal of time in identifying a location where a failure has occurred between the main processor (CPU) (1) and the protocol controller (413) of the logical line control unit (41). ) (1) and exchange (6)
Communication with the server can be resumed in a short time.

Further, the line controller (4 _A ) connects the (N + 1) logical line controllers (41) and the connection unit (43) to the (N) physical line controllers (42 _A ). only provided, each physical channel control unit (42 _a) for the possible dual physical channel control unit (42 _a) with respect to, as in the conventional certain line control unit (4) [see FIG. 9], each physical line Control unit (4
For 2), it is much more economical than when two logical line controllers (41) are provided.

FIGS. 2 to 7 are only one embodiment of the present invention. For example, the logical line controller (41) is set to (N
It is not limited to the one provided with +1) units, and it is considered that (N + n) units [where n> 2] are provided as far as the economy allows, but the effect of the present invention does not change in any case. . Further, even if (N) logical line control units (41) are provided without regard to reliability, the effect of the present invention does not change in terms of quick detection of a failure occurrence and specification of a failure occurrence location.

Further, the data exchange to which the present invention is applied is:
It goes without saying that the present invention is not limited to the example illustrated in FIG.

[0069]

As described above, according to the present invention (claim 1), when the line controller detects an abnormality in communication, the cause of the abnormality is determined by the physical line controller to the physical line side and the physical line controller. Since it is possible to immediately identify which one of the main processor side and the faulty part can be switched, the abnormality repair time is greatly reduced, and according to the present invention (claim 2), a small number of spare logical lines By preparing the control unit, it is possible to greatly improve the economics of the line control device without significantly lowering the reliability. Further, according to the present invention (claim 3),
The setting information required for the operation of the physical line control unit can be easily transmitted from the logical line control unit, and the operability, economy, and convenience of the line control device are greatly improved.

[Brief description of the drawings]

FIG. 1 is a principle diagram of the present invention.

FIG. 2 is a circuit controller according to an embodiment of the present invention;

FIG. 3 shows a physical line controller according to an embodiment of the present invention.

FIG. 4 Change of setting information by HDLC frame

FIG. 5 is a setting information change route in FIG.

FIG. 6 is a switching control sequence in FIG. 2;

7 is a switching control sequence in the line control device in FIG. 6;

FIG. 8 is a data exchange subject to the present invention.

FIG. 9 shows a conventional line control device.

FIG. 10 is a switching control sequence in FIG. 9;

[Explanation of symbols]

One main processor (CPU) 2 memory (MEM) 3 output interface unit (IOC) 4,4 _A, 400 line control unit 5 physical line 6 partner exchange 7 processor bus 8 logical line 41,410 logic channel control unit 42, 42 _A , 420 Physical line control unit 43 Connection unit 100 Processor 411 Line control processor 412 Buffer memory 413 Protocol controller 414 Main memory 415 I / O 416 Connection unit 421 Physical line termination circuit 422 Framer 423 Switch 424 Switch circuit 425 Protocol controller 426 Physical Line control processor 427 Setting information update protection circuit 428 Setting information storage unit 430 Connection means 500 Protocol control means

Claims (3)

[Claims] 1. A physical line control unit for terminating a physical line,
In a data exchange having a line control device including a logical line control unit for terminating a logical line set on the physical line, a protocol control unit is provided for each of the physical line control unit and the logical line control unit. Connected to each other, each of the protocol control means inspects an abnormality of data transmitted and received between the logical line control unit and the physical line control unit, and when an abnormality is detected in communication data passing through the line control device, A line control device characterized in that it is possible to specify on which side of the connection point between the logical line control unit and the physical line control unit the cause of the abnormality has occurred. 2. The line control device includes a plurality of logical line control units, a plurality of physical line control units, and each protocol control unit provided in each of the logical line control units and the physical line control unit. A connection unit for accommodating, the connection unit, by adding the identification information of the protocol control unit of the transfer destination to the information sent by each protocol control unit, any logical line control unit, 2. The line control device according to claim 1, wherein the information can be transferred to and from the physical line control unit. 3. The logical line controller transfers setting information that needs to be set to operate the physical line controller to the destination physical line controller in the same format as the communication data. 3. The line controller according to claim 1, wherein the physical line controller sets the setting information transferred from the logical line controller in its own physical line controller.