JPH11167468A - Data transfer device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a data transfer device where overhead is reduced and data transfer ability is improved. SOLUTION: A processor 7 generates a request A for data transfer to the area of a transfer buffer 4 from a magnetic disk device 8 and generates a request B for instructing data transfer to an outer output device 9 from the area whenever the data is transferred. At that time, the processor 7 judges the presence or absence of the idle area by a simple processing for judging whether request queue parts 5 of fixed length <=N are full or not. When the idle area exists, the request A is issued to an interface part 2. An interface part 3 takes out the request B kept by the request queue part 5 and transfers data from the transfer buffer 4 to the outer output device 9.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a data transfer device for asynchronously transferring data while reserving a transfer buffer statically and reusing each area.

[0002]

2. Description of the Related Art In recent years, video-on-demand systems and video server systems for distributing video data have been put to practical use. In these systems, a data transfer device that transfers video data read from a disk device to an external device via a transfer buffer is used. FIG.
0 indicates a configuration of a conventional data transfer device that performs data transfer while cyclically using each area of a transfer buffer. This data transfer device has an interface unit 3
2, 33 (hereinafter referred to as I / F unit A and I / F unit B), transfer buffer 34, processor 37, magnetic disk device 38
Consists of The processor 37 includes a request queue unit 35 and a pointer unit 36.

The I / F section A executes data transfer from the magnetic disk device 38 to the transfer buffer 34 by using a DMA (Direct Access Memory). This data transfer is performed by a request issued from the processor 37 (hereinafter, request A).
). The request A includes a read command of the magnetic disk device 8, a transfer destination address of the transfer buffer 34, and a transfer data size. I / F part B
Executes data transfer from the transfer buffer 34 to the external device 39 by DMA. This data transfer is executed in accordance with a request (hereinafter, referred to as a request B) extracted from the head of the request queue unit 35. The request B includes a transfer source address of the transfer buffer 34, a transfer data size, and a write (or transmission) command to an external device. The transfer buffer 34 has three areas used cyclically, and is a buffer for supplying data read from the magnetic disk device 38 to the external device 39 at a constant speed. Each area has the data size specified in the requests A and B.

[0004] The request queue unit 35 includes a processor 3
7 is a variable length list structured queue for queuing the request B, which is provided on the internal RAM 7. FIG. 11 shows a specific example of the request queue unit 35 when three requests B are stored. In FIG. 3, each request B is managed by a front pointer indicating a head direction and a rear pointer indicating a tail direction in order to store data in a first-in first-out manner. However, "-" of the first request B and "-" of the last request B indicate the first and last requests, respectively. Request queue unit 35
Constitutes a variable-length queue by linking an arbitrary number of requests B by a front pointer and a rear pointer.

The pointer section 36 is provided on an internal RAM or a register of the processor 37 and includes a write pointer (hereinafter referred to as a W pointer) pointing to the first writable area of the transfer buffer 34 and data to be read from the transfer buffer 34. And a read pointer (hereinafter, referred to as an R pointer) pointing to the first area in which is stored. FIG.
FIG. 3 is an explanatory diagram showing the relationship between the pointer section 36 and the transfer buffer 34. In the figure, the transfer buffer 34 is used cyclically in the order of the first, second, and third areas,
It is assumed that valid data is stored only in the first and second areas. In this case, the R pointer points to the first area,
The W pointer will point to the third area. The W pointer is updated each time a request A is issued by the processor 37, and the R pointer is updated each time data transfer indicated by the request B by the I / F unit B ends.

The processor 37 includes a magnetic disk drive 38
In order to continuously supply, for example, video data constituting one movie to the external device 39, the request A is generated and issued to the interface unit 32, and the request B is generated and transmitted to the request queue unit 35. Once queuing and issuing to the interface unit 33 are repeatedly executed.

When each area of the transfer buffer 34 and the transfer data size of the requests A and B are the same, the request A and the request B correspond one-to-one. Specifically, the processor 37 generates and issues a request A. After the data transfer by the I / F unit A is completed, the processor 37 generates a request B for the data and generates a request B for the data.
Send to Further, the processor 37 includes the transfer buffer 34
After the same processing is sequentially performed on the second and third areas, the processing returns to the first area again and performs the same processing.

During this time, the I / F unit B takes out the request B from the request queue unit 35 and
4 from one area to the external device 39.
When the data transfer of the I / F unit B is completed, the processor 37 updates the R pointer of the pointer unit 36 by the interrupt for notifying the completion. Further, the processor 37 checks the W pointer and the R pointer when issuing the request A to the interface unit 32 and checks whether the area of the transfer buffer 34 in which the data is to be read out is a reusable area (untransferred area). It is determined whether or not the W pointer points to the same area as the R pointer that points to the area. If it is not reusable, it waits for issuance of request A until it becomes reusable.

[0009]

However, according to the conventional data transfer apparatus described above, there is a problem that the data transfer capability is reduced due to the overhead of the processor. The overhead is the above I / F section B
This occurs due to the update processing of the R pointer generated by an interrupt at the end of the data transfer, the processing of determining whether the transfer buffer 34 is empty when the request A is issued to the I / F unit A, and the like. As a result, the generation process of the request A of the processor 37 is delayed due to the update process of the R pointer, and the issue process of the request A of the processor 37 is delayed due to the vacancy determination process. Was.

An object of the present invention is to provide a data transfer device in which overhead is reduced and data transfer capability is improved.

[0011]

In order to solve the above-mentioned problems, a data transfer apparatus according to the present invention uses a buffer memory having N (N is an integer of 2 or more) buffer areas used cyclically. A data transfer device for continuously transferring data stored in a first device to a second device, a first transfer means for transferring data from the first device to the buffer region; Second transfer means for transferring data to the second device, first generation means for sequentially generating a first type of transfer request for requesting data transfer from the first device to the buffer area, and data by the first transfer means. A second generation unit that generates a second type of transfer request instructing data transfer from the data area holding the data to the second device every time the data is transferred; Means having N or less areas for holding the queue as a queue, determining means for determining whether or not the queue means is full, and when the determining means determines that the state is not full, the first generating means A first control unit for causing the first transfer unit to issue the generated first type transfer request; and a second control unit for causing the second transfer unit to execute the second type transfer request held in the queue unit. . Here, the queue unit has N areas, and the second control unit causes the second transfer unit to execute the second type according to the transfer request of the second type held in the queue unit, and then executes the second type. May be deleted from the queue means. The queue unit has less than N areas, and the second control unit extracts a second type of transfer request from the queue unit and executes the second type of transfer request to the second transfer unit. You may be comprised so that it may be performed.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment <Configuration of Data Transfer Apparatus> FIG. 1 shows a video server including a data transfer apparatus 1 and a video request receiving unit 6 according to a first embodiment of the present invention. FIG. 3 is a block diagram illustrating a configuration.

The video server includes a data transfer device 1 and a video request receiving unit 6, which receives a request from outside and transmits video data to an external output device 9. The data transfer device 1 includes an interface unit 2, an interface unit 3, a transfer buffer 4, a request queue unit 5, a video request receiving unit 6, a processor 7, a magnetic disk device 8, and an external output device 9. The interface unit 2 transmits a DMA (Direc) from the magnetic disk device 8 to the transfer buffer 4.
t Access Memory) is executed in units of blocks (for example, 256 kbytes). This data transfer is
It is executed according to a request issued from the processor 7 (hereinafter referred to as a request A). The request A includes a read command for the magnetic disk device 8, a transfer destination address of the transfer buffer 4, and a transfer data size. Here, the read command includes the sector number of the magnetic disk device 8 and the read data size. The transfer destination address is the start address of any area of the transfer buffer 4. The transfer data size is one block data size (256 k
Bytes).

The interface unit 3 includes a transfer buffer 4
The data transfer by DMA to the external output device 9 is executed in units of blocks (for example, 256 kbytes). This data transfer is executed in accordance with the request at the head of the request queue unit 5 (hereinafter, a request addressed to the interface unit 3 is referred to as a request B). The first request B is deleted from the request queue unit 5 at the end of the data transfer. Here, the request B includes a transfer source address of the transfer buffer 4, a transfer data size, and a write (or transmission) command to an external device. Here, the transfer source size is the head address of any area of the transfer buffer 4. The transfer data size is the data size of one block (2
56 kbytes). The transfer buffer 4 has a plurality of areas used cyclically, and the magnetic disk drive 8
Is a buffer for supplying the data read out from the external output device 9 at a constant speed. In this embodiment, the number of areas in the transfer buffer 4 is three, and the data size of each area is the same as the transfer data size specified in the requests A and B. The request queue unit 5 is provided on the internal RAM of the processor 7 and is a queue for queuing the request B. In this embodiment, the request queue unit 5 queues up to three requests in a first-in first-out (FIFO) manner as shown in FIG. The reason why the number of requests held by the request queue unit 5 is set to a maximum of three is to make the number equal to the number of areas of the transfer buffer 4. The request queue unit 5 has a buffer full flag (not shown). When the number of held requests B is three, it is “1” (full state), and when it is less than two, it is “0” (full state). Not). As a result, when the request queue unit 5 is in the full state, it means that data to be transferred by the interface unit 3 exists in all areas of the transfer buffer 4.
The fact that the request queue unit 5 is not in the full state means that a reusable area (an area writable by the interface unit 2) exists in the transfer buffer 4.

The video request receiving unit 6 receives a video request from outside (from a user terminal device for a video server) and notifies the processor 7 of the video request. The processor 7 has a request queue 5 therein, receives a video request from the video request receiving unit 6, and continuously supplies video data corresponding to the request to the external output device 9.
And issues and issues a request B to the interface unit 3. the above
Regarding (1), the processor 7 generates a request A for the interface unit 2 and then checks whether the request queue unit 5 is not full. If not, the processor 7 generates the request B for the interface unit 2. Issue

With respect to the above (2), every time the data transfer by the interface unit 2 is completed, the processor 7
A request B to the interface unit 3 is generated and stored in the request queue unit 5. However, if there is no free space, the request queue unit 5 waits until a free space is generated (until the data transfer by the interface unit 3 is completed). The magnetic disk device 8 stores video information such as a movie. The external output device 9 is, for example, a terminal device of a user who plays while receiving video data from the data transfer device 1. The external output device 9 may be connected to the user terminal from the interface unit 3 via a communication line such as a cable television, a public network, or a LAN.

<Processing Contents of Processor> FIG. 3 is a flow chart showing the processing of generating and issuing requests A and B by the processor 7. Upon receiving the notification of the video request from the video request receiving unit 6, the processor 7 determines the first block of the requested video data and the area of the transfer buffer 4 to be the storage destination (first area) (Step 1). 31),
A request A including a read command instructing reading of the determined block, the start address of the determined area, and the block size as the transfer data size is generated (step 32).

Next, the processor 7 checks the state of the request queue 5, and if the request queue 5 is full (step 33: YES), the request is executed until the request B is executed by the interface unit 3 and is no longer full. Wait for issuance of A (step 34). If the request queue 5 is not in the full state (step 33: NO), a request A is issued to the interface unit 2 (step 35). After the data transfer to one area of the transfer buffer 4 by the interface unit 2, the processor 7 generates a request B for the video data in the area and sends it to the request queue unit 5 (step 3).
6). Subsequently, the processor 7 generates a request A to the interface unit 2 to read the next block of video data from the magnetic disk device 8 (step 3).
7, 38, 32), similarly, checking the state of the request queue unit 5 and issuing the request A. Further, the processor 7 waits for the next video request if there are no more blocks of video data (steps 39, 31) or ends.

In the determination of the buffer area in step 38, the area pointed to by the W pointer is determined as shown in FIG. The W pointer and the R pointer are updated so as to cyclically point to three areas. The W pointer is updated when the request A is issued by the processor 7. The R pointer is updated when the request B is stored in the request queue unit 5 by the processor 7. The operation of the data transfer device according to the first embodiment of the present invention configured as described above will be described. FIG. 4 is a diagram illustrating the operation of the data transfer device.

The data stored in the magnetic disk device 8 as shown in FIG. 1 is transferred to the transfer buffer 4 by the interface unit 2 and further transferred to the external output device 9 by the interface unit 3. Data transfer by the interface unit 2 is executed in accordance with a request A issued from the processor 7, and data transfer by the interface unit 3 is executed in accordance with a request B issued by the processor 7. The processor 7 makes the requests A and B as follows.
Issue For request A, processor 7
Checks the state of the request queue 5 and issues a request A to the interface unit 2 if the request queue 5 is not full. If the request queue 5 is full, the interface unit 3 executes the request B and waits for the issuance of the request A until the request queue 5 is not full. The processor 7 issues the request B by storing it in the fixed-length request queue unit 5.

As described above, according to the data transfer apparatus of this embodiment, when the data transfer unit of the interface unit 2 and the interface unit 3 is the same, the fixed size of the request queue unit 5 of the processor 17 is Since the number of divisions is equal to 3, the buffer memory has free space by a simple process of checking whether the request queue to the interface unit 2 is not full before the interface unit 2 reads data from the storage device. Can be determined. That is, before the processor 7 issues the request A, by checking whether or not the request queue unit 5 is full, it is possible to determine whether or not there is an available area in the transfer buffer 4. As a result, the request A is issued quickly, so that the data transfer can be started earlier and the efficiency of the data transfer can be improved. As described above, the processor 7 can extremely easily perform the process of determining whether the transfer buffer 4 is empty, and can reduce the overhead. Here, the request queue 5
Is fixed, but if the number of areas in the transfer buffer 4 is 3, the fixed size of the request queue unit 5 is 3
It may be as follows. In other words, the case where the number of areas of the transfer buffer 4 is N and the case where the fixed size of the request queue unit 5 is N has been described in the above embodiment, but the fixed size of the request queue unit 5 is less than N. Is also good. In that case (less than N), it is desirable that the interface unit 3 first fetches (deletes from the queue) the first request B from the request queue unit 5 and then performs data transfer according to the request B. If the number is less than N, there is an empty area in the transfer buffer 4 when the request queue unit 5 is no longer in the full state.

<Second Embodiment><Configuration of Data Transfer Apparatus> FIG. 5 is a block diagram of a video server including a data transfer apparatus 11 according to a second embodiment of the present invention. In the figure, the components having the same reference numerals as those in FIG. 1 are the same, and the description thereof will be omitted, and the following mainly describes the differences.

In the data transfer apparatus 11 of the figure, the transfer data size (block size) of the interface unit 2 is m (m is an integer) times the transfer data size of the interface unit 3 as compared with the first embodiment. Is different. In this embodiment, the transfer data size of the interface unit 2 is equal to the size of each area of the transfer buffer 4 and is 256 kbytes. Further, m is 4, that is, the transfer data size of the interface unit 3 is 64 kbytes. In this case, as shown in FIG. 7, the data transferred to the transfer buffer according to one request A is further transferred to the external output device 9 according to four requests B. For this reason, the data transfer device 11 replaces the processor 7 of FIG.
And a processor 17 having a counter 15 therein.

The request queue section 16 is a fixed-length FIFO memory for holding m * k requests B, as shown in FIG. Here, m is the above multiple, k is a number greater than or equal to 1 and less than n, and n is the number of areas in the transfer buffer 4. In this embodiment, m is 4, k is 1, and n is 3. The request queue unit 16 holds four requests B. Also, k means how many requests B corresponding to the requests A are held in the request queue unit 16. In the present embodiment, the size of the request queue unit 16 can hold four requests B, and thus corresponds to one request A.

The counter 15 is a counter for determining whether or not there is an empty area in the transfer buffer 4. Therefore, the counter 15 holds (nk) (2 in this embodiment) as an initial value, and is decremented (−1) each time the request A is issued from the processor 17 to the interface unit 2. Each time four requests B are stored in the queue unit 16, the increment (+
1) is done. In this case, if the value of the counter 15 is not 0, it means that there is an empty area in the transfer buffer 4, and
When it is 0, it means that there is no free area.

The processor 17 includes the interface unit 2
After the transfer request is generated and issued from the magnetic disk device 8 and the data is read out to one area of the transfer buffer 4, the transfer request for the data in this area is divided into four and generated, and the request queue 16 Send to
More specifically, the processor 17 checks whether the value of the counter 15 is not 0, and if not, issues a request A and decrements the counter 15 (−
1) Yes. Also, the processor 17 sets the counter 1 every time four requests B are stored in the request queue unit 16.
5 is incremented (+1).

<Generation and Issuance Process of Request A by Processor 17> FIG. 8 is a flowchart showing the generation and issue process of request A by the processor 17.

When the processor 17 receives the notification of the video request from the video request receiving unit 6, the processor 17 determines the first block of the requested video data and the area of the transfer buffer 4 as the storage destination (step 81). Then, a request A including a read command instructing the read of the determined block, the start address of the determined area, and the block size as the transfer data size is generated (step 82).

Next, the processor 17 checks the value of the counter 15, and if the value is 0 (step 83: YE
S) Wait for issuance of request A until it is no longer 0 (step 84). If the value of the counter 15 is not 0 (step 83: NO), a request A is sent to the interface unit 2.
Is issued (step 85). Then, after data transfer to one area of the transfer buffer 4 by the interface unit 2, the processor 17 activates another thread for generating four requests B for the video data of the area (step 86). Here, another thread refers to another task or program that performs processing for generating and issuing the request B and that is executed independently and in parallel with the processing in FIG. This thread is started every time data is transferred to one area of the transfer buffer 4, so that a plurality of threads are executed simultaneously. When a plurality of threads are activated, the processor 17 manages the plurality of threads so as to sequentially process the threads in the order in which the threads are activated. This is to prevent the correspondence between the request A and the request B from being broken (the order of the transfer data is not changed).

Subsequently, the processor 17 generates a request A to the interface unit 2 in order to read the next block of video data from the magnetic disk device 8 (steps 87, 88, 82). Inspection of the value of 15 and issue of request A are performed. Further, when the processor 7 finishes generating and issuing the request A for all the blocks, the processor 7 waits for the next video request (steps 89 and 31) or ends.

<Process of Generating and Issuing Request B by Processor 17> FIG. 9 is a flowchart showing the process of generating and issuing request B started in step 86 of FIG.

The processor 17 designates the first block when the area designated as the transfer destination of the request A is divided into four (m) first to fourth small blocks (step 91), and is designated. A request B including a read command instructing the reading of the small block, the head address of the specified small block, and the transfer data size indicating the size of the small block (64 kbytes) is generated (step 92).

Next, the processor 17 checks whether or not the request queue section 16 is full. If the request queue 16 is full (step 93: YES), the processor 17 waits for the issuance of the request B until the full state is resolved (step 93). Step 94). If the request queue unit 16 is not in the full state (step 9
3: NO), request B to the request queue unit 16
Is issued (step 95). Further, requests B are generated and issued for the second to fourth small blocks in the same manner as described above (steps 96: NO, 97 and thereafter). After issuing the request B corresponding to the four small blocks (step 96: YES), the counter 15
Is incremented (+1) (step 98).

The operation of the data transfer device according to the present embodiment configured as described above will be described.

Data transfer device 11 in the present embodiment
Is different from the first embodiment in that the determination of whether the value of the counter 15 is not 0 or 0 in the generation and issuance processing of the request A by the processor 17 makes the transfer buffer 4 a free area (reusable The main difference lies in that it is determined whether or not there is a unique area, that the request B is generated and issued for each small block in the generation and issue processing of the request B, and that the counter 15 is used. . When the interface unit 2 has four times the data transfer unit of the interface unit 3, the processor 17
By setting the fixed size of the request queue unit 16 to 4, one area of the transfer buffer 4 can be reused every time the request B is issued four times to the request queue unit 16.

At this time, the number of reusable areas is incremented using the counter 15, and when issuing a transfer request to the interface unit 2, it is checked whether the value of the counter 15 is not 0, and after the request A is issued, the counter 15 is decremented. It is possible to determine the presence or absence of an empty area in the transfer buffer 4 simply by performing the above operation.

As described above, according to the data transfer device of this embodiment, when the interface unit 2 has a data transfer unit four times as large as the interface unit 3, the fixed size of the request queue unit 16 in the processor 17 is set to 4. Thus, each time the request B is issued to the request queue unit 16 four times, one of the areas of the transfer buffer 4 can be reused. At this time, every time the request B is issued four times, the counter 15 is incremented. When issuing a request A to the interface unit 2, the counter 1
It is possible to easily determine the presence or absence of an empty area only by confirming whether the value of 5 is not zero and decrementing the counter 15 after issuing the transfer request. As a result, request A
Can be issued quickly, data transfer can be started earlier, and data transfer efficiency can be improved.

The counter 15 has 3 as an initial value.
(The number of free areas in the transfer buffer 4), and is decremented (-1) each time a request is issued from the processor 17 to the interface unit 2, and incremented each time the interface unit 3 completes four data transfers. +1). In this case, the increment may be incremented (+1) every four data transfers in the data transfer end interrupt from the interface unit 3.

In the above embodiment, the fixed size of the request queue unit 16 is set to 4, but the same effect can be obtained even if the fixed size is 4 or less. The request queue unit 16
Is fixed at 8 or less, and the initial value of the counter 15 is 1
It may be.

In the first embodiment, when the data transfer size of the interface unit 2 is four quarters of the area of the transfer buffer 4, the request queue unit 1
When the request queue unit 16 is not in the full state, the transfer request is issued four times to the interface unit 2 continuously using the counter 15 and transferred to the request queue unit 16 after the transfer to the transfer buffer is completed. By sending the request, it is possible to easily determine whether or not there is an empty area simply by checking whether or not the request queue unit 16 is full, as in the first embodiment.

[0041]

The data transfer device of the present invention transfers data stored in the first device via a buffer memory having N (N is an integer of 2 or more) buffer areas used cyclically. A data transfer device for continuously transferring data to a second device, comprising: first transfer means for transferring data from the first device to the buffer area;
Second transfer means for transferring data to the device, first generation means for sequentially generating a first type of transfer request for requesting data transfer from the first device to the buffer area, and data transfer by the first transfer means Second generation means for generating a second type of transfer request instructing data transfer from the data area holding the data to the second device every time
Queue means having N or less areas for holding the generated second type transfer request as a queue, determining means for determining whether or not the queue means is full, and determining that the state is not full by the determining means The first control means causes the first transfer means to issue the first type transfer request generated by the first generation means, and the second type transfer request held in the queue means to the second transfer means. Second to run
Control means. According to this configuration, it is possible to determine whether or not there is an empty buffer area in the buffer memory by a simple process of checking whether or not the queue means is not full by the determining means. That is, before issuing the first type of transfer request, it is possible to determine whether or not there is an available area in the buffer memory by checking whether or not the queue means is in a full state. As a result, the first transfer request is issued promptly, so that the data transfer can be started earlier and the efficiency of the data transfer can be improved.

The queue means has N areas, and the second control means causes the second transfer means to execute the request in accordance with the second type of transfer request held in the queue means. The transfer request of the second type may be deleted from the queue means. According to this configuration, the same effect as described above can be obtained when the number of areas N of the queue means is the same as the number of areas of the buffer memory.

Further, the cue means has less than N areas, and the second control means controls the second
The transfer request of the second type may be extracted and the second transfer unit may execute the transfer request of the second type. According to this configuration, the same effect as described above can be obtained when the number of areas in the queue unit is smaller than the number N of areas in the buffer memory.

Further, the data transfer apparatus of the present invention comprises a first transfer means for transferring data of the same size as the buffer area from the first apparatus to the buffer area, and a transfer function of the buffer area from the buffer area to the second apparatus. A second transfer unit for transferring data having a size of (1 / m is an integer), and a first transfer unit for requesting data transfer from the first device to the buffer area.
First generation means for sequentially generating transfer requests of the type;
A second generation unit configured to generate m transfer requests of a second type instructing data transfer from the data area holding the data to the second device each time data is transferred by the transfer unit; Counting means for counting the number of free areas; determining means for determining whether or not the count value of the counting means is not 0; First control means for causing the first transfer means to execute the first type transfer request and subtracting 1 from the value of the counting means, and holding the second type transfer request generated by the second generation means as a queue. A queue unit having k (k is an integer of 1 or more and less than n) areas, and a transfer request of the second type generated by the second generation unit is stored in the queue unit and is executed m times Storage means for incrementing the counting means each time the data is stored, and second control means for extracting the second type of transfer request held in the queue means and causing the second transfer means to execute the second type of transfer request. Prepare. According to this configuration, when the transfer data size by the first transfer unit is m times the transfer data size by the second transfer unit, before the data is read from the first device by the first transfer unit, Counting means 0
It is possible to determine whether or not there is a free buffer area in the buffer memory by a simple process of checking whether or not there is a buffer. That is, before issuing the transfer request of the first type, it is possible to determine whether or not there is an available area in the buffer memory by checking whether or not the counting means is operating. As a result, the first transfer request is issued promptly, the data transfer can be started earlier, and the efficiency of the data transfer can be improved.

Further, the data transfer device of the present invention may be arranged such that the first device transfers the buffer area from the first device to the buffer area by a factor of 1 / m.
A first transfer unit for transferring data having a size of, a second transfer unit for transferring data from the buffer area to the second device,
A first type of transfer request for sequentially generating a first type of transfer request for requesting the first transfer unit to transfer the data having the data size of 1 / m;
Generating means for generating a second type of transfer request instructing data transfer from the data area holding the data to the second device every time m data transfers are performed by the first transfer means; Generating means, queue means having N or less areas for holding the generated second type transfer requests as queues, determining means for determining whether the queue means is full, and determining means Each time the result shifts from the determination of the full state to the determination that the result is not the full state, the first
A first control unit for causing the first transfer unit to execute the m first type transfer requests generated by the generation unit, and a second type transfer request held in the queue unit are extracted, and the second type transfer is performed. A second request for the second transfer means to execute the request.
Control means. According to this configuration, when the transfer data size of the first transfer unit is 1 / m of the transfer data size of the second transfer unit, the determination unit checks whether or not the queue unit is full. It is possible to determine whether or not there is a free buffer area in the buffer memory by a simple process. That is, before issuing the first type of transfer request, it is possible to determine whether or not there is an available area in the buffer memory by checking whether or not the queue means is in a full state. As a result, the first transfer request is issued promptly, so that the data transfer can be started earlier and the efficiency of the data transfer can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a video server including a data transfer device 1 and a video request receiving unit 6 according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating a request queue unit 5;

FIG. 3 is a flowchart showing processing for generating and issuing requests A and B by a processor 7;

FIG. 4 is a diagram illustrating the operation of the data transfer device 1.

FIG. 5 is a block diagram of a video server including a data transfer device 11 according to a second embodiment of the present invention.

FIG. 6 is a diagram illustrating a request queue unit 15;

FIG. 7 is a diagram for explaining the operation of the data transfer device 11;

FIG. 8 is a flowchart showing a process of generating and issuing a request A by a processor 17;

FIG. 9 is a flowchart showing a process of generating and issuing a request B by a processor 17;

FIG. 10 is a block diagram illustrating a configuration of a data transfer device according to the related art.

FIG. 11 shows a specific example of a request queue unit 35 according to the related art.

FIG. 12 is an explanatory diagram showing a relationship between a pointer unit 36 and a transfer buffer 34 according to the related art.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 data transfer device 2 interface unit 3 interface unit 4 transfer buffer 5 request queue unit 6 video request receiving unit 7 processor 8 magnetic disk device 9 external output device 11 data transfer device 15 counter 16 request queue unit 17 processor

Claims (5)

[Claims] 1. A method for continuously transferring data stored in a first device to a second device via a buffer memory having N (N is an integer of 2 or more) buffer areas used cyclically. A first transfer unit for transferring data from the first device to the buffer area; a second transfer unit for transferring data from the buffer area to a second device; First generation means for sequentially generating a first type of transfer request for requesting data transfer to a buffer area; and each time data is transferred by the first transfer means, from a data area holding the data to the second device. Second generation means for generating a second type of transfer request instructing data transfer of the second type; queue means having N or less areas for holding the generated second type of transfer request as a queue; Judging means for judging whether or not the checking means is in a full state; and
The transfer request of the first type generated by the generation means is transmitted to the first
A data transfer apparatus, comprising: a first control unit that causes a transfer unit to execute; and a second control unit that causes a second transfer unit to execute a second type of transfer request held in a queue unit. 2. The queue means has the N number of areas, and the second control means causes the second transfer means to execute according to a second type of transfer request held in the queue means, 2. The data transfer device according to claim 1, wherein the transfer request of the second type is deleted from the queue unit. 3. The queue means has less than the N areas, and the second control means fetches a second type of transfer request from the queue means, and transfers the second type of transfer request to the second type. 2. The data transfer device according to claim 1, wherein the data transfer device is executed by two transfer means. 4. Data stored in a first device is continuously transferred to a second device via a buffer memory having N (N is an integer of 2 or more) buffer areas used in a cyclic manner. A first transfer unit for transferring data of the same size as the buffer area from the first apparatus to the buffer area; and m (m) of the buffer area from the buffer area to the second apparatus.
Second transfer means for transferring data having a size of (1 / integer), a first generation means for sequentially generating a first type of transfer request for requesting data transfer from the first device to the buffer area, Each time data is transferred by the first transfer means, a second generation means for generating m second-type transfer requests instructing data transfer from the data area holding the data to the second device; Counting means for counting the number of free areas of the memory; determining means for determining whether or not the count value of the counting means is not 0; and generating by the first generating means when the determining means determines that the value is not 0 And causing the first transfer means to execute the transferred first type transfer request, and subtracting 1 from the value of the counting means.
Control means; queue means having m * k (k is an integer of 1 or more and less than n) areas for holding a transfer request of the second type generated by the second generation means as a queue; A storage means for storing the generated second type transfer request in the queue means, incrementing the counting means every time the storage request is stored m times, and extracting a second type transfer request held in the queue means. A data transfer device comprising: a second control unit that causes a second transfer unit to execute a second type of transfer request. 5. The data stored in a first device is continuously transferred to a second device via a buffer memory having N (N is an integer of 2 or more) buffer areas used in a cyclic manner. A data transfer device for transferring data from the first device to the buffer
A first transfer unit for transferring data having a data size of 1 / second, a second transfer unit for transferring data from the buffer area to the second device, and a data transfer having the data size of 1 / m to the first transfer unit. A first type for sequentially generating a first type of transfer request to be made
Generating means, and each time m data transfers are performed by the first transferring means,
Second generation means for generating a second type of transfer request instructing data transfer from the data area holding the data to the second device; and N number of holding the generated second type transfer request as a queue. A queuing unit having the following areas; a judging unit for judging whether or not the queuing unit is in a full state; each time the judgment result of the judging unit shifts from judgment of full state to judgment of not being full state, 1st control means for causing the first transfer means to execute the m first type transfer requests generated by the 1st generation means, and the second type transfer request held in the queue means, and And a second control unit for causing the second transfer unit to execute the transfer request.