JPH1115550A - Electronic unit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To simplify a circuit and to reduce the cost by executing FM modulation so that the frequency of a clock signal is shifted with the clock signal frequency which the main function part of an electronic unit requests as a center. SOLUTION: A PLL circuit 5 changes the clock frequency of the clock signal based on a signal from a selector 6 while it follows a reference signal which a reference oscillator 3 oscillates. The selector 6 supplies a control signal for changing the oscillation frequency of VCO. A counter 7 selects/witches multiple equivalent DC voltage sources different in voltage levels, which are provided for the selector 6 for synthesizing the control signal that a clock signal control part 4 instructs. The clock signal control part 4 applies the control signal to VCO through the counter 7 and the selector 6, changes the oscillation frequency and changes the clock frequency. Namely, the clock signal is FM-modulated based on the control signal which the part itself instructs.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to reduction of electromagnetic noise radiated from inside to outside of an electronic device while the device is operating.

[0002]

2. Description of the Related Art In recent years, digitalization of electronic equipment has been rapidly advanced. With this trend, the amount of electromagnetic noise radiated from the inside of the electronic device to the outside is also increasing steadily. Clock noise is the largest element of the electromagnetic noise. Clock noise is noise caused by a clock signal that is a reference for the operation of a digital device. Clock noise is
It occurs in a spectrum at an odd multiple of the clock frequency. In this spectrum, as the frequency accuracy of the clock signal is improved, the spectrum width becomes narrower, and conversely, the spectrum level becomes higher.

[0003] Electromagnetic noise having a narrow spectrum width and a high spectral level has jumped into peripheral electronic devices, causing adverse effects such as causing malfunction of the electronic devices. In order to prevent this adverse effect, in the related art, the clock frequency is kept as low as possible, and the high-frequency components that are liable to be electromagnetic noise are reduced. In addition, great efforts have been made to shield the equipment in order to minimize the amount of electromagnetic noise radiated out of the equipment.

[0004]

However, the above-mentioned prior art has the following problems to be solved. 1. In order to supply a clock signal to a circuit in a device at a low frequency in which electromagnetic noise is unlikely to be generated, a circuit requiring a high frequency on a substrate needs to multiply the clock frequency. Therefore, a PLL circuit or the like is used for each high-frequency circuit, and the circuit becomes complicated and expensive. 2. Further, in order to enhance the shielding effect of the device case, the device case becomes expensive, and as a result, the cost of the device as a whole tends to increase.

[0005]

[Means for Solving the Problems]

<Configuration 1> A clock signal generator that supplies a clock signal serving as a reference for operation to a main function unit of an electronic device, and controls the operation of the clock signal generator to request the main function unit of the electronic device. A clock signal control unit that performs FM modulation so as to shift the frequency of the clock signal around the clock signal frequency;
Electronics.

<Structure 2> A clock signal generator for supplying a clock signal as a reference for operation to a main function unit of the electronic device, and controlling the operation of the clock signal generator so as to control the main function unit of the electronic device. An electronic device comprising: a clock signal control unit that performs PM modulation so as to shift the phase of a clock signal around a clock signal frequency required by the device.

<Configuration 3> A clock signal generator for supplying a clock signal as a reference for operation to a main function unit of an electronic device, and an output of the clock signal generator is received to remove a high frequency component of the clock pulse. An electronic device, comprising: a low-pass filter configured to:

<Structure 4> An electronic apparatus according to Structure 3, further comprising a clock signal control unit for periodically changing the connection of the low-pass filter.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the illustrated embodiments. FIG. 1 is a configuration diagram according to the first specific example. Before explaining the configuration of the specific example,
The radiation noise will be described. Further, in order to facilitate understanding of a specific example, a method of suppressing radiation noise will be described with reference to the drawings.

FIG. 2 is a spectrum diagram of clock noise. The horizontal axis indicates frequency, and the vertical axis indicates noise level. Assuming that the clock frequency used in the electronic device of the specific example is fc, the largest noise occurs near the horizontal axis fc. Odd frequency 3f of this fc
Noise occurs near c, 5fc... (2n + 1) fc. The generation of other noises in digital electronic equipment is relatively low.

The reason for this is that, in digital electronic equipment, most of the circuits in the equipment operate on the basis of a clock signal. Usually, this clock signal is precisely controlled. Therefore, the spectrum width of the noise of fc, 3fc, 5fc... Also becomes narrow, and conversely, the spectrum level becomes high. The electromagnetic noise with a narrow spectrum width and a high spectrum level jumps into peripheral electronic devices,
It has adverse effects such as inducing malfunction of electronic equipment. It is an object of the present invention to suppress this adverse effect. A method of suppressing radiation noise, which is a concept common to a plurality of specific examples described later, will be described with reference to the drawings.

FIG. 3 is a spectrum conversion diagram of clock noise. FIG. 3A is a diagram illustrating the spectrum of the clock noise with the frequency axis expanded. FIG. 3B is a diagram showing a state in which the spectrum of the clock noise is spread to lower the peak value of the noise level. In the specific example, a method is adopted in which the clock noise shown in FIG. 3A is spread spectrum to lower the peak value of the noise level to avoid the adverse effect of the radiation noise as shown in FIG. 3B. Hereinafter, FM modulation will be described as one method of the spread spectrum. When the clock noise V (fc) in FIG. 3A is expressed by a mathematical formula, V (fc) = A · COS (ωc + Nωn) T (1) where ωc is the angular frequency of the clock signal frequency.

As described above, since the clock signal is precisely controlled, the spectral width of the equation (1) is extremely narrow. Therefore, the explanation will be made ignoring Nωn to simplify the explanation. V (fc) = A · COSωcT (2) Using this equation (2) as a carrier,
FM modulation is performed with a signal wave S (P) prepared in advance. S (P) = ΔωCOSpT Expression (3) In Expression (3), Δω is an angular frequency shift.

A signal V obtained by FM-modulating equation (2) by equation (3)
fm (fc) is given by the following equation. Vfm (fc) = A · COS (ωcT + (Δω / p) SINpT) Expression (4) The relationship between Expressions (3) and (4) is shown in the figure.

FIG. 4 is an explanatory diagram showing an FM modulated wave.
FIG. 4A is a diagram illustrating the signal wave S (P) and the equation (3). A sine wave of angular velocity p is shown with Δω as the amplitude. FIG. 4B shows an FM-modulated signal Vfm (fc),
It is a figure showing a formula (4). The level of the frequency is shown according to the value of the equation (3).

In equation (4), (Δω / p) = M (5) and M is hereinafter referred to as a modulation factor. Using this M, equation (4) is expressed by the following equation when expressed by a Bessel function. Vfm (fc) = A [J0 (M) COSωcT + J1 (M) ｛COS (ωc + p) T-COS (ωc-p) T｝ + J2 (M) ｛COS (ωc + 2p) T + COS (ωc-2p) T｝ + ...] ... (6) Formula (6) is demonstrated using figures.

FIG. 5 is an explanatory diagram showing the Bessel function. The horizontal axis indicates the modulation factor M and equation (5), and the vertical axis indicates the value of the Bessel function. The value of the Bessel function is a value obtained by normalizing the values of the amplitudes J0, J1, J2,... Of each cosine function in the equation (6) to 1. Assuming now that the modulation factor M = 0, FIG. 5 shows that J0 indicates the value 1 at the point a0 and the other amplitudes are 0. This state shows a state of only the unmodulated carrier.
FIG. 6 shows this value as the value of the spectrum when M = 0.
(A).

FIG. 6 is an explanatory diagram of an FM modulated wave spectrum based on a modulation factor M. Assuming that the modulation factor M = 1, FIG. 5 shows that J0 represents the value at point a1, J1 represents the value at point b1, and J2 represents the value at point c1. However, from equation (6), the odd term J1 has two positive and negative amplitudes, and the even term J2 has the same sign two amplitudes. This value is shown in FIG. 6B as the value of the spectrum when M = 1. Similarly, the value of the spectrum when M = 2 is shown in FIG. It can be seen that the spectrum can be spread by changing the modulation factor M as shown in FIG. 6 to reduce the absolute value of the spectrum level. Further, M can be arbitrarily changed by changing the angular velocity p of the signal wave (3).

Next, the PM modulation (phase modulation) described in the second embodiment will be described. Since PM modulation and FM modulation have almost the same concept, only the difference will be described. F
Signal wave S (P) in M modulation, equation (3), and modulated wave V
fm (fc) and equation (4) are described again below. S (P) = ΔωCOSpT Equation (3) Vfm (fc) = A · COS (ωcT + (Δω / p) SINpT) Equation (4) Correspondingly, the signal waves R (P) and Vpm (f
c) is described below. R (P) = ΔφSINpT Expression (7) Vfm (fc) = A · COS (ωcT + ΔφSINpT) Expression (8)

The difference between FM modulation and PM modulation is given by the following equation (3).
Comparing the expressions (7), it can be understood that only the phase of the signal wave is different by π / 4, and both can be treated exactly the same. The details are described in, for example, the literature and the communication method (McGraw-Hill Publishing Co., Ltd., co-translated by Yamanaka and Usami). A specific example will be described based on the radiation noise suppression method described above.

<Structure of Embodiment 1> Referring back to FIG. 1, the structure of Embodiment 1 will be described. The electronic device according to the specific example 1 includes a main function unit 1, a clock signal generation unit 2, a reference oscillator 3, and a clock signal control unit 4. The clock signal generator 2 further includes a PLL (Phase Locked Loop) circuit 5, a selector 6, and a counter 7. The main function unit 1 is a part for performing a use function to fulfill the original purpose of the electronic device. The various circuits provided therein operate in synchronization with the clock signal supplied from the clock signal generator 2. Therefore, it is also a portion that emits radiation noise due to electromagnetic waves toward the outside of the device and becomes the largest noise source.

The clock signal generator 2 includes a main function unit 1
It is a part that supplies a clock signal based on the control of the clock signal control unit 4. A PLL circuit 5, a selector 6, and a counter 7 are provided therein. PLL circuit 5
Is a portion for changing the clock frequency of the clock signal based on the signal from the selector 6 while following the reference signal oscillated by the reference oscillator 3. Inside, VCO (Voltag
e Controlled Occilator). The oscillation frequency of the VCO changes according to a control signal externally applied to its control terminal. The selector 6 is a part that supplies a control signal for changing the oscillation frequency of the VCO.
In order to synthesize a control signal to be supplied to the VCO based on an instruction from the clock signal control unit 4, a large number of equivalent DC voltage sources having different voltage levels are provided.

The counter 7 is a section for selectively switching equivalent DC voltage sources having different voltage levels, which are provided in a large number of selectors 6, in order to synthesize a control signal specified by the clock signal control section 4. This is to change the frequency of the VCO faithfully. The clock signal control unit 4 is a unit that applies a control signal to the VCO via the counter 7 and the selector 6 to change the oscillation frequency and change the clock frequency.
In other words, this is a part for FM-modulating the clock signal based on a control signal instructed by itself.

<Operation of the Specific Example 1> When the power switch of the electronic apparatus (FIG. 1) according to the specific example 1 is turned on, the clock frequency fc and the odd multiple frequencies 3fc and 5fc shown in FIG.
... Noise is generated in the vicinity of (2n + 1) fc. This clock noise is spread spectrum and
Clock noise is FM-modulated in order to reduce the noise level as shown in FIG.
The operation will be described below with reference to FIG.

The clock signal control unit 4 instructs the counter 7 and the selector 6 to execute the above-described equation (3), S
(P) = ΔωSINpT, and applies it to the control terminal of the VCO. What should be noted here is that the value of Δω that defines the maximum change amount of the clock frequency is set to a value that does not adversely affect the device. It has been confirmed that a change of several percent with respect to ωc has no adverse effect, depending on the intended use of the device. In this equation (3), the clock signal is expressed as F
M-modulating is equivalent to FM-modulating the clock noise at the same time. Therefore, as described above, FIG.
The clock noise shown in FIG. 3A can be spread spectrum as shown in FIG. As a result, the noise level can be reduced.

Although only the noise near the clock frequency fc has been described, the odd multiple frequencies 3fc, 5fc... (2n
+1) Exactly the same result can be obtained for noise near fc. Further, in the specific example, the description has been given of the case where the control signal is the expression (3) and S (P) = ΔωSINpT, but it is not always necessary to stick to the expression (3). However, in order to increase the diffusion effect, a periodic function is desirable.

<Effects of Specific Example 1> As described above, in Specific Example 1, the following effects are obtained by FM-modulating the clock signal of the device with a predetermined function based on the control of the clock signal control unit. Get 1. Since the noise component is spread spectrum and the noise level is reduced, there is no need to forcibly lower the clock frequency and supply the circuit in the device at a low frequency where noise is less likely to occur. Therefore, the circuit is simplified and the cost can be reduced. 2. Because the noise level is reduced, neighboring devices are
Malfunction of its own device circuit is reduced, and operation is stabilized. 3. Further, since the radiation noise is reduced, the device case is simplified, and the cost can be reduced.

<Structure of Embodiment 2> FIG. 7 is a diagram showing the structure of Embodiment 2. The electronic device according to the specific example 2 includes a main function unit 1, a reference transmitter 3, a clock signal generation unit 8, and a clock signal control unit 9. Further, the clock signal control unit 9 includes the PLL circuit 5, the counter 7, and the selector 12
, N delay circuits, and N switches.
Hereinafter, only the difference from the first specific example will be described.

The main function unit 1 and the reference oscillator 3 are the same as in the first embodiment. The clock signal generator 8 includes a main function unit 1
It is a part that supplies a clock signal based on the control of the clock signal control unit 4. It includes a PLL circuit 5, a selector 12, a counter 7, N delay circuits, and N switches. The PLL circuit 5 divides a reference signal oscillated by the reference oscillator 3 to generate a clock signal. On the output side of the PLL circuit 5, N delay circuits are arranged in a row. One switch is connected to the input side of each of the N delay circuits so that a clock signal can be directly supplied to the main function unit 1. This N
One switch is always ON. The clock signal control unit 4 switches this switch by the counter 7.
And selector 12.

The clock signal control section 9 is a section for applying a control signal to N switches via the counter 7 and the selector 6 to delay the clock signal. This is a part that periodically changes the magnitude of the delay time and performs PM modulation of the clock signal based on a control signal instructed by itself.

<Operation of Specific Example 2> Clock signal controller 9
Indicates to the counter 7 and the selector 12
To the switch N to adjust the delay time. Equation (7) already described, R (P) = ΔφSIN
Delay the clock signal to approximate pT. Here, it should be noted that Δ which defines the maximum phase amount of the clock signal is used.
is to set the value of φ to a value that does not adversely affect the equipment. It has been confirmed that changing the pulse width of the clock pulse by several percent has no adverse effect, depending on the application function of the device. In the equation (7), PM-modulating the clock signal is equivalent to PM-modulating the clock noise at the same time.

Therefore, as described above, FIG.
Can be spread spectrum as shown in FIG. 3 (b). As a result, the noise level can be reduced. Further, in the specific example, the description has been given by limiting the control signal to equation (7) and R (P) = ΔφSINpT, but it is not always necessary to stick to equation (7).
However, in order to increase the diffusion effect, a periodic function is desirable.

<Effects of Specific Example 2> As described above, in Specific Example 2, the following effects are obtained by PM-modulating the clock signal of the device with a predetermined function based on the instruction of the clock signal control unit. Get 1. All the effects described in the specific example 1 are obtained. 2. Further, by performing PM modulation of the clock signal using a delay circuit while controlling the clock signal at a constant frequency without changing the frequency, the stability of the device can be further maintained.

<Structure of Embodiment 3> FIG. The electronic device according to the third example includes the main function unit 1, the reference oscillator 3, the clock signal generation unit 13, and the clock signal control unit 14.

The main function unit 1 and the reference oscillator 3 are the same as in the first embodiment. The clock signal generator 13 is a main function unit 1
And a section for supplying a clock signal under the control of the clock signal control unit 14. In the specific examples 1 and 2, the clock signal generator 2 and the clock signal generator 8
The noise emission from the main function unit 1 is reduced without focusing on the radiation of noise by itself. On the other hand, the clock signal generator 1
3 focus on reducing radiated noise in itself.

The clock signal control unit 13 includes the PLL circuit 5
, Counter 7, selector 12, and N gates 1 to N
N gates from gate 1a to gate N
0 and 2N + 1 gates from gate 1b to gate Nb, and N low-pass filters from R1 and C1 to RN and CN. The PLL circuit 5 divides a reference signal oscillated by the reference oscillator 3 to generate a clock signal. On the output side of the PLL circuit 5, N low-pass filters each including a resistor R and a capacitor C are connected in a row. N switches are connected from the input side of each of the N low-pass filters to the gate 1a to the gate Na. It is configured such that a clock signal can be directly supplied to the main function unit 1 from the input side of each low-pass filter.

Further, N switches from the gate 1b to the gate Nb are inserted in each of the N low-pass filters connected in one row. N gate pairs from the gate 1a and the gate 1b to the gate Na and the gate Nb are connected to the selector outputs S0 to SN of the selector 12 with the corresponding N gates from the N gate 1 to the N gate N interposed therebetween. ing. When only S0 is set to 1 and all other selector outputs are set to 0, the gate 1a is ON and the gate 1
b is OFF, and the output of the PLL circuit 5 is directly connected to the main function unit 1 without passing through a low-pass filter at all.

When only S1 is set to 1 and all other selector outputs are set to 0, the gate 2a is ON and the gate 2b is OFF.
And the gate 1a is OFF and the gate 1b is ON
The outputs of the PLL circuit 5 are low-pass filters R1 and C
1 and is connected to the main function unit 1 only. As described above, when only a specific selector output is set to 1 and all other selector outputs are set to 0, N rows of N low-pass filters connected in a row between the output of the PLL circuit 5 and the main function unit 1 Is cut off on the way. The disconnection position is a position corresponding to the specific selector output. The output of the PLL circuit 5 is connected to the main function unit 1 at the disconnected position. This corresponds to changing the time constant of the low-pass filter through which the clock signal passes.

The counter 7 selectively switches the selector output of the selector 12 to 1 based on the control of the clock signal control unit 14. The selector 12 is connected between the output of the PLL circuit 5 and the main function unit 1 as described above.
This is a switching signal generating portion for cutting a row of N low-pass filters connected to the row and connecting the row to the main function section 1. The clock signal control unit 14 is a part that controls the selector output via the counter 7 and the selector 12 and periodically switches the connection of the plurality of low-pass filters.

<Operation of Embodiment 3> When the power switch of the electronic apparatus (FIG. 8) according to Embodiment 3 is turned on, the clock frequency fc shown in FIG. 2 and the odd multiple frequencies 3fc, 5fc... Noise occurs near 2n + 1) fc. These noise sources can be broadly classified into the following two types. (Noise 1) is mainly caused by the operation of various and various circuits provided in the main function unit 1 in synchronization with the clock signal supplied from the clock signal generation unit 13. (Noise 2) is noise from a signal path for supplying a clock signal to various circuits provided inside the main function unit 1. This noise is greatly affected by the waveform of the clock pulse generated by the clock signal generator 13. In the specific examples 1 and 2, the noise 1 is mainly handled, but in the specific example 3, the noise 2 is mainly handled.
The connection of a plurality of low-pass filters is switched to remove high-frequency components of clock pulses to reduce radiation noise.

(Noise 2) is noise from a signal path supplied to a variety of circuits, and greatly varies depending on the type and quantity of the circuit, the length and shape of the signal path, and the like. Generally, it has poor regularity and periodicity. Therefore, the noise level is reduced by the following operation. Step S1, turning on the power switch of the electronic device according to the third example,
The measurement of radiation noise is started using a radiation noise measuring instrument. Step S2: The connection of the low-pass filter is changed by controlling the clock signal control unit 14 to select the connection that minimizes the radiation noise level. If the noise level reaches the target value in this state, the clock signal control unit 14 maintains this connection thereafter. If the noise level has not reached the target value, the process proceeds to the next step S3. Step S
3. Based on the connection selected in step S2, the clock signal control unit 14 is controlled to periodically change the connection of the low-pass filter to select a cycle in which the radiation noise level is reduced most.

<Effect of Specific Example 3> As described above, the specific example 3 has the following effects because the connection of the low-pass filter provided in the clock signal generator is changed to remove the high frequency component of the clock pulse. 1. Noise with poor regularity and periodicity can be reduced. 2. Since the connection of the low-pass filter is changed without changing the frequency of the clock signal and keeping the frequency at a constant frequency, there is no possibility that the stability of the device is impaired.

[Brief description of the drawings]

FIG. 1 is a configuration diagram according to a specific example 1.

FIG. 2 is a spectrum diagram of clock noise.

FIG. 3 is a spectrum conversion diagram of clock noise.

FIG. 4 is an explanatory diagram showing an FM modulated wave.

FIG. 5 is an explanatory diagram showing a Bessel function.

FIG. 6 is an explanatory diagram of an FM modulated wave spectrum based on a modulation factor M.

FIG. 7 is a configuration diagram according to a specific example 2.

FIG. 8 is a configuration diagram according to a specific example 3.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Main function part 2 Clock signal generation part 3 Reference oscillator 4 Clock signal control part 5 PLL circuit 6 Selector 7 Counter

Claims (4)

[Claims] A clock signal generating unit for supplying a clock signal serving as a reference for operation to a main function unit of the electronic device; controlling an operation of the clock signal generating unit to request the main function unit of the electronic device F so that the frequency of the clock signal is shifted around the clock signal frequency
An electronic device comprising a clock signal control unit for performing M modulation. 2. A clock signal generation unit for supplying a clock signal serving as a reference for operation to a main function unit of the electronic device; and controlling an operation of the clock signal generation unit so that the main function unit of the electronic device can request the main function unit. PM so as to shift the phase of the clock signal around the clock signal frequency
An electronic device comprising a clock signal control unit for performing modulation. 3. A clock signal generator for supplying a clock signal serving as a reference for operation to a main function unit of an electronic device, and a low-pass receiving an output of the clock signal generator and removing a high-frequency component of the clock pulse. An electronic device comprising a filter. 4. The electronic apparatus according to claim 3, further comprising a clock signal control unit that periodically changes a connection of the low-pass filter.