JPH11154471A - Electron emitting element and switching circuit using it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate loss at a gate, prevent the breakage of an element. SOLUTION: An electron emitting element comprises an emitter 2 emitting electrons, a gate electrode 1 extracting electrons by applying an electric field to the emitter 2, an anode electrode 3 collecting the electrons extracted by the gate electrode 1. A resistor 23 is connected between the gate electrode 1 and a signal applied to the agate electrode 1. A signal source 5 is provided between the emitter 2 and the gate electrode 1, and a voltage source 4 is provided between the gate electrode 1 and the anode electrode 3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electron-emitting device and a switching circuit using the same, and more particularly to a device used for performing a switching operation in a linear region.

[0002]

2. Description of the Related Art In recent years, fine field emission type electron-emitting devices of the same size as semiconductor devices have been developed by using advanced Si semiconductor fine processing technology, and application to flat panel displays and the like has been advanced. Have been. A typical example is Journal of A, by Spindt (CASpindt) et al.
The one described in pplied Physics, vol. 47, 5248 (1976) is known.

FIG. 16 shows an example of a conventional field emission type electron-emitting device. FIG. 16A is a diagram showing an overall configuration of a circuit using a conventional electron-emitting device, and FIG. 16B is a diagram showing VI characteristics of the circuit shown in FIG. The axis is voltage, the vertical axis is current, the solid line is the anode current, and the broken line is the gate current.

As shown in FIG. 16A, a positive voltage _Vg is applied to the gate electrode 1 of the emitter 2 of the electron-emitting device to generate a large electric field at the tip of the emitter 2. Electrons are drawn out into a vacuum. By the anode electrode 3 provided opposite the emitter 2 applies a high positive voltage V _a than the gate electrode 2, draw from the emitter 2 further anode electrode 3 electrons toward the gate electrode 1, emitted from the emitter 2 The collected electrons are used for collection.

In the operation of the electron-emitting device described above, the number of electrons emitted from the emitter 2 is determined only by the electric field generated at the tip of the emitter 2. Usually, since the anode electrode 3 is provided at a sufficiently large distance as compared with the gate electrode 1, when the anode voltage is low, the emitted electrons are strongly attracted to the gate electrode 1. It does not reach the anode electrode 3.

As the anode voltage increases, the number of electrons traveling toward the gate electrode 1 decreases, and the number of electrons reaching the anode electrode 3 increases. When the anode voltage becomes sufficiently high, all the electrons emitted from the emitter 2 reach the anode electrode 3.

In FIG. 16B, for simplicity, the gate electrode 1 is grounded, a negative voltage −V _g (that is, the gate voltage is V _g ) is applied to the emitter 2, and a positive anode voltage V _{a is} applied to the anode electrode 3. Is applied. At this time, assuming that the current flowing through the emitter 2 in the direction of the arrow in the drawing is I _e , the current flowing through the gate electrode 11 is I _g , and the current flowing through the anode electrode 3 is I _a , as described above, I _e is V _g determined by the only, also I _e = I _g + I _a becomes relationship. Further, as the voltage V _a of the anode electrode 3 is higher, the anode current increases, the region where the gate current is reduced (hereinafter referred to as the linear region), further increases the anode voltage, anode current is constant, the gate current Is substantially zero (hereinafter referred to as a saturation region).

Further, when changing the gate voltage V _g, the current I _a flowing through the emitter 2 in the saturation region varies. As Vg is increased from V _g3 → V _g2 → V _g1 ,
_Ia also increases. This is the number of electrons emitted from the emitter 2 because only depends on the gate voltage V _g.

The characteristics inherent to the field emission type electron-emitting device are not problematic when the value of the anode current is controlled by the gate voltage as in a flat panel display or the like. When used as a switching element for electric power, there is a big problem.

FIG. 17 shows a circuit configuration when an electron-emitting device is used as a switching circuit. FIG. 17A is a diagram illustrating an overall configuration of a switching circuit using an electron-emitting device, and FIG. 17B is a diagram illustrating a VI characteristic of a load.
The horizontal axis is voltage and the vertical axis is current. Further, the solid line anode current I _a, the dashed line the load line, the broken line denotes a gate current I
Indicates _g . The operating point when the present switching circuit is used is the intersection of the characteristic curve shown by the solid line and the load line shown by the dashed line.

As shown in FIG. 17A, an electron-emitting device is connected to a load 6 having an impedance of Z (here, a pure resistor R for simplicity) and a voltage source 4 of a voltage V ₀ to perform a switching operation. Do. Considering the case of performing the switching operation in the saturation region, the anode voltage V _a increases in the on state in the saturation region as shown in FIG. 17 (b), the loss of large power.

Further, since the thus determined anode current I _a by independent gate voltage V _g to the size and the power source voltage V ₀ which load 6, due to variations in device characteristics, unreliable operation. Because of these problems, when an electron-emitting device is used as a switching circuit, a linear region is used.

When the electron-emitting device is used in the linear region, the on state of the switching operation in FIG. 17B corresponds to a point a in the figure, and the off state corresponds to a point b in the figure. However, at the point a, the gate current I _{g1a of the} same order as the anode current exists, and therefore, there is a problem that a large power loss of I _g1a × V _g1 occurs at the gate to be controlled. In addition, there is a problem that the electron-emitting device itself is easily broken due to the flow of an excessive gate current.

FIG. 18 is a cross-sectional view of an electron-emitting device to which the present invention is applied. As shown in FIG. 18, an SiO ₂ layer 12 is selectively formed on a Si single crystal substrate 11,
On the iO ₂ layer 12, a Mo layer 13 is formed. A conical emitter 17 is formed on the surface of the Si single crystal substrate 11 where the SiO ₂ layer 12 is not formed.

This electron-emitting device is usually used by arranging an emitter having a plurality of conical emitters 17 as shown in FIG. 18 in an array. The sharpness of the tip of the emitter 17 and the Mo that serves as a gate with the emitter 17 are used. Because it was difficult to make the distance between the layers 13 uniform, it was not possible to obtain uniform electron emission in the array. For this reason, when the gate voltage is increased, the current of some of the emitters 17 starting to emit electrons at a gate voltage lower than that of the other emitters 17 reaches the limit value before the other emitters 17. As a result, a short circuit occurs between the emitter 17 and the Mo layer 13 serving as a gate, causing a current to flow between the emitter and the gate.

As a method for solving this problem, Ghis et al.
Known from the IVMC90 Technical Digest. The electron-emitting device described in this document is shown in FIG.
Shown in FIG. 19A is a cross-sectional view thereof, and FIG.
Is a layout view as seen from above.

As shown in FIG. 19A, in this electron-emitting device, a mesh-like emitter line 192 and a resistance layer 193 are sequentially formed on a glass substrate 191, and a Si layer is formed on the emitter line 192.
The O ₂ layer 12, the Mo layer 13, and the conical emitter 17 are formed.

In this structure, as can be seen from FIG. 19B, since the resistance layer 193 is inserted between the emitter line 192 and the emitter 17, when the emission current increases at a certain emitter 17, the potential of the emitter 17 becomes lower. Rise,
The potential difference from the gate decreases, and the emission current decreases. That is, the negative feedback action by the resistance layer 193 works. For this reason, a large negative feedback action is exerted on some of the emitters 17 in which electron emission starts at a gate voltage lower than the others, and the electron emission characteristics become uniform as a whole.
And the gates are not easily short-circuited. Further, even if a short circuit occurs, the voltage is supported by the resistance layer 193, so that the entire array does not become inoperable.

However, the emitter 1 as described above
The electron-emitting device in which the resistive layer 193 is inserted on the 7th side has no problem for applications requiring only a relatively small current, such as a flat panel display. When the switching element is used as a switching element, a large current flows through the resistance layer 193, so that there is a problem that the loss in the resistance layer 193 increases.

In an application such as a flat panel display, the voltage of the anode electrode for collecting the extracted electrons is kept sufficiently higher than the gate voltage, so that most of the extracted electrons go to the anode electrode. On the other hand, in the switching element, when the switch is turned on, the anode voltage decreases to about the same as the gate voltage, so that an excessive gate current flows, which may cause the element to be destroyed. However, the resistance layer 193 inserted on the emitter side is not effective for this problem.

[0021]

In the above-mentioned conventional electron-emitting device, when applied to a switching circuit in the linear region, the on state of the switching operation is at point a in FIG. Is equivalent to However, at point a, there is a gate current of the same order as the anode current, and as a result, a large loss of I _g1a × V _g1 occurs at the gate to be controlled as shown in FIG. 17B. There is. In addition, there is a problem that the element is easily broken due to the flow of an excessive gate current.

As described above, when a switching operation is performed by a field emission type electron-emitting device, there is a problem that a large loss occurs in a gate to be controlled and that the device is easily broken by an excessive gate current. Had occurred.

When an electron-emitting device in which a resistance layer is inserted on the emitter side is used as a switching element, the loss in the resistance layer increases because the resistance layer is inserted on the emitter side where a large main current flows. was there.
Further, when the anode voltage is reduced to about the same level as the gate voltage when the switch is turned on, the device is not effective against the problem that the element is destroyed by an excessive gate current.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to reduce the power loss at the gate electrode and to prevent the destruction of the element itself due to an excessive gate current at the time of switching on. An object of the present invention is to provide an electron-emitting device for preventing the light emission and a switching circuit using the same.

[0025]

According to a first aspect of the present invention, there is provided an electron-emitting device, comprising: an emitter for emitting electrons by applying an electric field; and a positive voltage applied to the emitter by a signal source from the emitter. A gate electrode for extracting electrons,
An anode electrode for collecting electrons extracted by the gate electrode, and a gate resistor inserted between the signal source and the gate electrode for reducing a gate voltage by using a voltage drop due to a gate current. It is characterized by the following.

Further, in the electron-emitting device according to a second aspect of the present invention, a plurality of the emitters are two-dimensionally arranged, and a gate electrode is provided independently for each of the emitters. A gate resistor is inserted between the source and the source.

The preferred embodiment of the present invention is as follows.

(1) A conical or quadrangular pyramid emitter is used.

(2) Vacuum sealing between the emitter and anode electrodes.

According to a third aspect of the present invention, in the electron-emitting device, the gate resistor is integrally formed on a substrate on which an emitter and a gate electrode are formed.

According to a fourth aspect of the present invention, there is provided a switching circuit using an electron-emitting device, wherein the emitter emits electrons by applying an electric field, a gate electrode extracts electrons from the emitter, and the gate electrode extracts electrons. An anode electrode for collecting electrons, a signal source for applying a positive voltage to the gate electrode with respect to the emitter, and a gate resistor connected in series to the signal source and reducing a gate voltage by utilizing a voltage drop due to a gate current. A voltage source for applying a positive voltage higher than the gate electrode to the anode electrode with respect to the emitter, and a load connected in series to the voltage source. As the anode voltage increases, the anode current increases. The switching operation is performed using an area where the gate current increases and the gate current decreases.

The preferred embodiments of the present invention are as follows.

(1) A conical or quadrangular pyramid emitter is used.

(2) The space between the emitter and the anode is vacuum-sealed.

(3) A gate resistor is made of a low melting point metal.

An electron-emitting device according to a fifth aspect of the present invention is formed on a substrate, a first conductive layer having a plurality of projecting emitters, and formed on the first conductive layer,
An insulating layer formed so as to cover the first conductive layer except for the tips of the plurality of emitters, and a second insulating layer formed by coating the insulating layer so that the tips of the plurality of emitters are open. A region surrounding the region where the plurality of emitters are formed, wherein the second conductive layer forms a gate electrode by increasing the thickness of the peripheral portion of each of the emitters. A gate wiring is formed by increasing the thickness of a region at a predetermined distance from the plurality of gate electrodes, and the film thickness of a region sandwiched between the gate electrode and the gate wiring is reduced by the gate electrode and the gate electrode. It is characterized in that a resistance layer is formed by making the thickness smaller than the thickness of the gate wiring.

Preferred embodiments of the present invention will be described below.

(1) The second conductive layer between the respective gate electrodes is made thinner than the gate electrode to operate as a resistance layer.

(2) The plurality of emitters are arranged in an array.

(3) A first gate wiring is formed so as to surround a region where a plurality of emitters arranged in an array in (2) are arranged with a resistance layer interposed therebetween.

(4) The first gate wiring of (3) is formed of the same layer as the resistance layer and the gate electrode.

(5) The gate electrode and the first gate wiring of (3) are formed on a resistive layer having a predetermined thickness.

(6) The gate electrode, the resistance layer, and the gate wiring are each made of either a metal or a semiconductor.

(7) An insulating film is formed so as to surround the gate wiring of (3), a second gate wiring is formed so as to surround the insulating film, and the first gate wiring and the second gate wiring are formed. A thin resistive layer penetrates the wiring.

(8) The gate wiring of (3) is formed such that the distance between each emitter and each emitter is uniform.

(9) The difference between the distance between the farthest emitter and the nearest emitter when viewed from the gate wiring in (3) is smaller than a predetermined value.

(10) The predetermined value of (9) is determined based on an allowable difference in resistance value when the resistance layer operates as a resistor.

(Operation) When a resistor is inserted between the gate electrode and the signal source, the voltage applied between the emitter and the gate is slightly higher than the ideal voltage. This is because a gate current flows when a voltage higher than the ideal voltage is applied between the emitter and the gate. When the gate current flows, the current also flows through the resistor, and a voltage drop occurs in the resistor. The voltage applied between the emitter and the gate decreases due to the voltage drop at this resistor, but if the voltage drop is too large, the voltage between the emitter and the gate becomes smaller than the ideal voltage, the gate current does not flow, and the voltage drop at the resistor decreases. No longer occurs.

Therefore, by the operation of the resistor, the balance is achieved at a voltage slightly higher than the ideal emitter-gate voltage. The gate current in this balanced state is small, and the power loss at the gate is significantly reduced as compared to the power loss without a resistor.

Further, since the gate current can be made sufficiently small as compared with the case where there is no resistance, it is possible to prevent the destruction of the element due to an excessive current flowing through the gate electrode.

In the electron-emitting device according to the present invention, the resistance layer is inserted on the gate side where almost no current flows in a normal operation state, and the gate electrodes are connected to each other by the resistance layer. The occurrence can be suppressed, and even if some of the emitters are short, the entire array can be prevented from becoming inoperable.

[0052]

Embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) FIG. 1 is a view showing a manufacturing process of an electron-emitting device according to a first embodiment of the present invention.
As shown in FIG. 1, a SiO ₂ layer 12 is formed as an insulating layer on a Si single crystal substrate 11 by thermal oxidation, a Mo layer 13 serving as a gate electrode is formed by vacuum deposition, and a hole 14 is formed by etching. (FIG. 1 (a)). Next, while rotating the Si single crystal substrate 11, Al is vacuum-deposited obliquely to the substrate surface to form an Al layer 15 (FIG. 1B).

Next, Mo as an emitter is vacuum-deposited on the Si single crystal substrate 11 in a direction perpendicular to the substrate surface, and the hole 14 is closed by the deposition of the Mo layer 16 by utilizing the hole. A conical emitter 17 is formed by depositing Mo in a conical shape within 14 (FIG. 1C), and finally removing the Al layer 15 and the Mo layer 16 other than the holes 14 (FIG. 1C). FIG. 1 (d)).

FIG. 2A is a diagram showing the overall configuration of a switching circuit using the electron-emitting devices manufactured by the above steps. In FIG. 2A, an anode electrode 3 is provided on a device composed of a plurality of conical emitters 2 and a gate electrode 1 via a spacer 21, and the inside of the electron-emitting device is vacuum-sealed. . The wiring 22 is taken out from the emitter electrode 2, the gate electrode 1 and the anode electrode 3, respectively.

The gate electrode 1 is grounded via a resistor 23 having a resistance value r. The emitter 2 is grounded via a signal source 5 for generating a negative pulse wave of a voltage -V _g1. A voltage is applied between the emitter 2 and the gate electrode 1 by the pulse wave generated by the signal source 5, and Electrons are emitted toward the gate electrode 1 from the two tips. That is, the signal source 5
The state where a pulse wave is generated corresponds to the ON state of the present switching circuit, and the state where no pulse wave is generated corresponds to the OFF state.

The anode electrode 3 is connected to a voltage source 4 of a voltage V ₀ via a load 6 having an impedance Z (here, a pure resistor R for simplicity). The voltage source 4 further reaches the anode electrode 3.

The operation of the switching circuit using the electron-emitting device according to the above embodiment will be described.

When a pulse voltage of voltage V _g1 is applied by the signal source 5, a positive voltage is applied between the emitter 2 and the gate electrode 1. This applied voltage generates a large electric field at the tip of the emitter 2. Then, the electrons inside the emitter 2 are extracted into a vacuum by the field emission.

On the other hand, a voltage V ₀ is applied to the anode electrode 3 in series with the resistor 23 and the load 6 by the voltage source 4. The voltage V ₀ is a positive voltage higher than that of the gate electrode 1. With this applied voltage, the electrons extracted into the vacuum travel from the vicinity of the gate electrode 1 toward the anode electrode 3 and are collected at the anode electrode 3.

Although the number of electrons emitted from the emitter 2 is determined only by the electric field generated at the tip of the emitter 2, the emitted electrons are usually provided because the anode electrode 3 is provided at a sufficiently large distance from the gate electrode 1. The number of electrons mainly goes to the gate electrode 1 and does not reach the anode electrode 3. When the anode voltage increases, the number of electrons traveling toward the gate electrode 1 decreases, and the number of electrons reaching the anode electrode 3 increases. When the anode voltage becomes sufficiently high, all the electrons emitted from the emitter 2 reach the anode electrode 3.

FIG. 1B shows the VI characteristic of the load 6 in the circuit shown in FIG. 1A. The horizontal axis is voltage,
The vertical axis indicates the current, the solid line is the anode current I _a , the dashed line is the load line, and the broken line is the gate current _Ig . The load line has a relational expression V _a = V regarding the voltage between the ground point and the anode electrode 3.
It illustrates a ₀ -RI _a.

If there is no resistor 23, the aforementioned FIG.
As shown in (b), the operating point is determined by the intersection of the characteristic curve and the load line, so that the on state corresponds to a in the figure and the off state corresponds to b in the figure. Further, from the straight line indicating the gate current I _g1 when the voltage of V _g1 is applied to the gate, since I _g1a flows through the gate in the ON state, I _g1a ×
A large loss of V _g1 will occur.

In the case of this switching circuit, the ideal gate voltage is V _g4 , that is, when the ON state is at the boundary between the linear region and the saturation region. Because the gate voltage is V
For _g4 case greater than the increase in the gate current I _g as indicated by the broken line, not appropriate for a loss of power will occur in the gate electrode 1. Conversely, when the gate voltage is V
If it is smaller than _{g4, the} ON state enters a saturation region, and the ON voltage increases. However, it is actually difficult to change the gate voltage according to the load 6, and there is a problem of variation in elements.

In order to solve these problems, in this embodiment, a resistor 23 is inserted to realize a state close to an ideal. When the resistor 23 is inserted, the voltage applied between the emitter and the gate becomes _Vg5 slightly larger than the ideal voltage _Vg4 . This is because, when a voltage V _g1 that is sufficiently higher than the ideal voltage V _g4 is applied between the emitter and the gate, a gate current I _g1 flows. Therefore, a current also flows through the resistor 23, and a voltage drop occurs at the resistor 23. This resistance 2
Due to the voltage drop of 3, the voltage applied between the emitter and the gate decreases. When this voltage drop across the resistor 23 is too large emitter-gate voltage is smaller than V _g4, the gate current I _g is not flow, the voltage drop across the resistor 23 does not occur.
Therefore, the characteristic curve shifts upward from the curve at the ideal voltage.

After all, the ideal emitter-gate voltage V
_{The balance} is _achieved by the emitter-gate voltage V _g5 through which a small gate current I _g5a slightly higher than _g4 flows. At this time, losses in the gate _I g5a × V _g5 next, I _G5a
<< I _g1a , V _g5 <V _g1 , so that it is greatly reduced as compared with I _g1a × V _g1 when the resistor 23 is not provided.

_{Further, since} the value of the gate current I _g5a can be made sufficiently smaller than the value of I _g1a , the gate current I _g can be reduced and the destruction of the element can be prevented.

The above operation is essentially unchanged even when the characteristics of the device vary, and the ideal voltage V _g4
Balancing at a slightly higher voltage _Vg5 allows a stable operation to be realized. Note that, if the allowable value of the gate current I _g5 is determined for the resistance r, the gate voltage at which field emission starts can be set to V _{th and set} to be larger than (V _g1 −V _th ) / I _g5a . However, if the resistance value r is too large, the emitter
Since the switching operation speed decreases due to the capacitance between the gates, it is desirable to set the resistance value r as small as possible.

As described above, by connecting the resistor 23 between the gate electrode 1 and the signal source 5, the power loss at the gate electrode 1 is reduced, and an excessive current does not flow through the gate electrode 1. The device is not destroyed.

In this embodiment, the signal source 5 is provided on the wiring 22 taken out from the emitter 2. However, the signal source 5 is connected to the wiring 2 taken out from the gate electrode 1.
It is needless to say that the present invention can be applied to a circuit provided with the resistor 2 and connected in series with the resistor 23.

(Second Embodiment) FIG. 3 is a diagram showing an overall configuration of a switching circuit using an electron-emitting device according to a second embodiment of the present invention. 3, parts corresponding to those in FIG. 2 are denoted by the same reference numerals, and detailed description thereof will be omitted.

The switching circuit according to the first embodiment is different from the switching circuit according to the first embodiment in that an anode electrode 3 is provided on a device including an emitter 2 and a gate electrode 1 via a spacer 21 and the inside is vacuum-sealed. Is the same as the switching circuit according to the first embodiment.

The feature of this embodiment is that the gate electrode 1 is divided into one conical emitter 2. Then, the wiring 22 is taken out from each of the gate electrodes 1. One resistor 33 is connected to one wiring 22 extracted for each emitter, and a plurality of resistors 33 connected in this manner are connected.
Are connected to one signal source.

The provision of one resistor corresponding to one conical emitter 2 as described above is intended to cope with a case where the characteristics of a plurality of emitters in an electron-emitting device vary.

In this case, the resistor 33 may be formed on the element by using a semiconductor fine processing technique. In this embodiment, the emitter 2 is grounded and a positive voltage is applied to the gate electrode 1. Further, the resistor 33 may be made of a low melting point metal or the like, and may have a role of a fuse so that the connection is cut off when an excessive gate current _Ig flows.

The operation of the switching circuit using the electron-emitting device according to the above embodiment will be described.

When a pulse voltage is applied by the signal source 5, a positive voltage is applied between the emitter 2 and the gate electrode 1. This applied voltage generates a large electric field at the tip of the emitter 2. Then, the electrons inside the emitter 2 are extracted into a vacuum by the field emission.

On the other hand, a voltage V ₀ is applied between the anode electrode 3 and the gate electrode 1 via the load 6 by the voltage source 4. The voltage V ₀ is a positive voltage higher than that of the gate electrode 1. With this applied voltage, the electrons extracted into the vacuum travel from the vicinity of the gate electrode 1 toward the anode electrode 3 and are collected at the anode electrode 3.

Although the number of electrons emitted from the emitter 2 is determined only by the electric field generated at the tip of the emitter 2, the emitted electrons are usually provided because the anode electrode 3 is provided at a sufficiently large distance from the gate electrode 1. The number of electrons mainly goes to the gate electrode 1 and does not reach the anode electrode 3, but as the anode voltage increases, the number of electrons going to the gate electrode 1 decreases and the number of electrons reaching the anode electrode 3 increases.
When the anode voltage becomes sufficiently high, all the electrons emitted from the emitter 2 reach the anode electrode 3.

In this embodiment, one resistor 33 is inserted corresponding to one conical emitter 2 to realize a state close to ideal. When the resistor 33 is inserted, the voltage applied between the emitter and the gate becomes _Vg5 slightly larger than the ideal voltage _Vg4 . This is because when a voltage V _g1 that is sufficiently larger than the ideal voltage V _g4 is applied between the emitter and the gate, a gate current flows, and the voltage applied between the emitter and the gate decreases due to the voltage drop of the resistor 33. Resistance 33
If the voltage drop is too large, the emitter-gate voltage
smaller than _g4, not the gate current I _g flowing, resistor 33
No voltage drop occurs.

After all, the ideal emitter-gate voltage V
_{The balance} is _achieved by the emitter-gate voltage V _g5 through which a small gate current I _g5a slightly higher than _g4 flows. At this time, losses in the gate _I g5a × V _g5 next, I _G5a
<< I _g1a , V _g5 <V _g1 , so that it is greatly reduced as compared to I _g1a × V _g1 in the absence of the resistor 33.
In addition, since the value of the gate current I _g5 can be made sufficiently smaller than the value of I _g1a , the gate current I _g can be reduced and destruction of the element can be prevented.

Since the above operation is performed for each conical emitter 2, there is essentially no change even if the characteristics of the device vary. That is, even if the characteristic curve varies for each emitter 2, the operation according to each characteristic curve is performed by the resistor 33 corresponding to each emitter 2. Therefore, to balance all the emitters 2 at a voltage V _g5 slightly higher than the ideal voltage V _g4 ,
Stable operation can be realized.

As described above, by connecting the resistor 33 between the gate electrode 1 and the signal source 5, the power loss at the gate electrode 1 is reduced, and no excessive current flows through the gate electrode 1. The device is not destroyed.

Also, by connecting one resistor 33 to one emitter 2 and inserting it between the emitter and the signal source 5, the characteristics of a plurality of emitters 2 in the element may vary. Even if there is, the gate current can be reduced for each emitter 2 according to the characteristics of the emitter, the power loss at the gate electrode can be reduced, and the device can be prevented from being destroyed.

Although the present invention has been described with reference to the illustrated embodiments, the present invention is not limited to these embodiments. For example, a plurality of emitter arrays including a plurality of emitters may be formed on an element, and a resistor may be inserted into each emitter array. That is, in this case, one resistor corresponds to a plurality of emitters.

In the first and second embodiments, the resistance 2
3 and 33 show the case where they are connected to the wiring 22 taken out from the electron-emitting device, but the case where they are integrally formed in the electron-emitting device, that is, on the substrate of the emitter 2 and the gate electrode 1. Of course, it may be possible. Also,
Various modifications can be made without departing from the spirit of the present invention.

(Third Embodiment) FIGS. 4 to 6 are views showing a manufacturing process of an electron-emitting device according to a third embodiment of the present invention. The electron-emitting device according to the present embodiment is obtained by realizing the electron-emitting device and the resistance shown in the second embodiment by a semiconductor device.

First, as shown in FIG.
A p-type Si substrate 41 having a crystal orientation is prepared. Next, this S
A thermally oxidized SiO ₂ film 42 is formed on an i-substrate 41 by dry oxidation. Then, the Si on which the SiO ₂ film 42 is formed is formed.
The substrate 41 is placed on a rotating table called a spinner, and a resist solution is dropped while rotating at a high speed. Next, this resist solution is spread over the entire surface of the SiO ₂ film 42 by centrifugal force, and the solvent is evaporated to form a resist film. Next, after performing patterning such as exposure and development using lithography technology,
Using the patterned resist as a mask, NH ₄ F /
The SiO ₂ film 42 is etched with the HF mixed aqueous solution until the Si substrate 41 is exposed to form a plurality of openings.

Next, for example, P (phosphorus) is ion-implanted to form an n-type region 43 in the Si substrate 41 corresponding to the opening of the SiO ₂ film 42. FIG. 7A shows a top view after the n-type region 43 is formed. As shown in FIG.
The mold region 43 becomes a gate electrode after completion, for example, 4 μm.
It comprises an n-type region 43a having a square corner and an n-type region 43b to be a gate wiring after completion.

Next, as shown in FIG. 4B, a concave portion 44 having a sharpened bottom is formed so as to penetrate the square n-type region 43a by anisotropic etching using a KOH aqueous solution. At this time, the n-type region 43b is prevented from being etched using electrochemical etching.

This selective etching is performed by the following method. The electrochemical etching is to etch only the p-type portion and to prevent the n-type portion from being etched by applying a voltage while applying a reverse bias to the pn junction. In the embodiment, a reverse bias voltage is applied between the n-type region 43b and the p-type portion of the Si substrate 41. At this time, the n-type region 4
3b is not etched because a reverse bias is applied, but the n-type region 43a is etched. This is because, as shown in FIG. 7A, the n-type region 43a and the n-type region 43
This is because b is separated by the p-type portion of the Si substrate 41 and therefore no reverse bias is applied.

Next, a resist is spin-coated on the surface of the processed Si substrate 41 as shown in FIG. 4C, and then a resist etch back is performed so that the resist 45 remains only in the concave portion 44. Then, the SiO ₂ film 42 is removed by etching or the like.

Next, as shown in FIG.
(Phosphorus) is ion-implanted to form a shallow n
By forming a mold region, the resistance layer 46 is formed. At this time, since the resist 45 serves as a mask, the ion implantation is not performed on the concave portion 44, and the ion implantation can be selectively performed only on the Si substrate 41. After the ion implantation, the resist 45 used as a mask is removed.

Next, as shown in FIG. 5E, a thermally oxidized SiO ₂ film 47 having a predetermined thickness is formed on the surface of the Si substrate 41 including the concave portion 44 by wet oxidation.

Next, as shown in FIG. 5F, an emitter material made of a metal such as Mo is deposited on the surface of the SiO ₂ film 47 including the concave portion 44 by a sputtering method or the like to form an emitter layer 48. Emitter layer 48 further including recess 44
An adhesive layer 49 of, for example, Al for electrostatic adhesion is formed on the surface.

Next, as shown in FIG. 6G, for example, a glass substrate 51 having an Al layer 50 formed on one surface is prepared. The surface of the glass substrate 51 on which the Al layer 50 is not formed is applied to the adhesive layer 49. Then, a high voltage is applied to the adhesive layer 49 and the Al layer 50 on the surface of the glass substrate 51 at a high temperature to perform electrostatic bonding. After this electrostatic bonding, the Al layer 5
Remove 0.

Next, as shown in FIG. 6H, the p-type portion of the Si substrate 41 is removed by electrochemical etching.
Note that FIG. 6H is an inverted view of FIG. 6G.

Next, as shown in FIG. 6 (i), a thermally oxidized SiO ₂ film 47 covering the periphery of the tip 52a of the emitter 52 is formed.
Is removed by etching to complete the electron-emitting device.

The electron-emitting device completed by the above-described manufacturing steps is one in which the electron-emitting device and the resistor 33 shown in FIG. 3 shown in the second embodiment are realized by semiconductor devices. Hereinafter, the correspondence will be described.

In FIG. 6I, the resistance of the n-type region 43a around the emitter 52 is small due to its large film thickness. In FIG. The plurality of n-type regions 43a are separately provided on the resistance layer 46 having a small thickness and a large resistance. The thin resistive layer 46 around the n-type region 43a corresponds to the resistor 33, and the resistor 33 is connected to each emitter 2 as in FIG.

The n-type region 4 having a large thickness and a small resistance
3b is a gate line for applying a voltage to the n-type region 43a via the resistance layer 46. For this reason, even if the emitter and the gate electrode are partially short-circuited, the entire array can be prevented from becoming inoperable. This will be described with reference to FIG. FIG. 7B is a top view schematically showing the completed electron-emitting device in FIG. 6I. The periphery of the emitter-gate electrode 71 is surrounded by the resistance layer 46.
The structure is such that the resistance layer 46 is connected to the n-type region 43b to be a wiring via the resistance layer 46. Accordingly, a configuration is adopted in which a resistor is connected to each of the emitter-gate electrodes 71, and the respective emitter-gate electrodes 71 are connected to each other by a resistor. With this configuration, for example, when a short circuit occurs in some of the emitter-gate electrodes 71, the
In the gate electrode 71, the potential of the gate and the potential of the emitter become equal, but the potential of the short-circuited gate and the potential of the adjacent gate are not affected because they are not short-circuited by the resistance connected between the gates, and the normal operation is performed. Can be.

The operation when used as a switching element is the same as the operation described in the second embodiment, and will not be described.

As described above, according to the electron-emitting device according to the present embodiment, similarly to the second embodiment, when the device is used as a switching device, the loss at the gate at the time of ON is reduced, and the device due to an excessive gate current is reduced. Can be prevented, and even if the emitter and the gate electrode are partially short-circuited, the entire array can be prevented from becoming inoperable.

Although the case where the SiO ₂ film 42 is formed by dry oxidation has been described, the case where the SiO ₂ film 42 is deposited by a CVD method or the like may be used. Further, although the emitter 52 is formed by the Mo layer, an emitter material such as LaB ₆ or TiN can be used, for example.

(Fourth Embodiment) FIGS. 8 to 10 are views showing a method of manufacturing an electron-emitting device according to a fourth embodiment of the present invention. 8 to 10, parts corresponding to those in FIGS. 4 to 6 are denoted by the same reference numerals, and detailed description thereof will be omitted.
The feature of the electron-emitting device according to this embodiment is that a metal is used instead of Si for the gate wiring.

First, a resistance layer 46 is formed on a p-type Si substrate 41 (FIG. 8A).
An O ₂ film 42 is formed. Then, the SiO ₂ film 42 is patterned to form a plurality of openings. Then, for example, P
And the like are implanted into the Si substrate 41 and n
The mold region 43a is formed (FIG. 8B).

Next, a concave portion 44 having a sharpened bottom portion penetrating the n-type region 43a is formed by etching.
(C)) Further, thermal oxidation Si
An O ₂ film 47 is deposited (FIG. 9D). Thereafter, similarly to FIGS. 5F, 6G, and 6H shown in the third embodiment, the emitter layer 48, the adhesive layer 49, the glass substrate 51, and the Al
A layer 50 is formed, and the Si substrate 41 is removed (FIG. 9).
(E), (f), FIG. 10 (g)). In the steps described so far, the difference from the third embodiment is that the resistance layer 46 is formed before forming the concave portion 44 and the n-type region 43b is not formed.

Next, in the third embodiment, instead of forming the gate wiring by the n-type region 43b, the gate wiring 81 is formed by, for example, an Al wiring (FIG. 10 (h)). This is formed by patterning after forming Al. This is a feature of the present embodiment. Thereafter, similarly to FIG. 6 (i), SiO 2 covering the periphery of the tip 52a of the emitter 52 is formed.
_The electron emission element is completed by removing the _second film 47 (FIG. 10).
(I)).

The operation when the electron-emitting device according to the present embodiment is used as a switching device is the same as that of the second embodiment, but differs from the electron-emitting device shown in the third embodiment in the following points. That is, instead of the n-type region 43b shown in the third embodiment, a metal such as Al is used for the gate wiring 81. Thereby, the potential drop in the gate wiring 81 is further reduced. Therefore, for example, when the size of the electron-emitting device itself to be formed is large and the gate wiring 81 acting as a wiring by increasing the film thickness is such that the potential drop cannot be ignored depending on the n-type region 43b in the third embodiment. It is especially effective for

(Fifth Embodiment) FIGS. 11 to 13 are views showing a method for manufacturing an electron-emitting device according to a fifth embodiment of the present invention. 11 to 13, parts corresponding to those in FIGS. 4 to 6 are denoted by the same reference numerals, and detailed description thereof will be omitted. The feature of the electron-emitting device according to the present embodiment is that a metal is used instead of Si for the gate electrode, the resistance layer, and the gate wiring. Further, the third embodiment is different from the third and fourth embodiments in that the gates are not connected by a resistor.

First, a thermally oxidized SiO 2 is formed on a p-type Si substrate 41.
_Two films 42 are formed, and a plurality of openings are formed by patterning. Then, a concave portion 44 is formed by etching (FIG. 11A), and a thermally oxidized Si
An O ₂ film 47 is formed. After that, the emitter layer 4 is formed similarly to FIGS. 5F, 6G, and 6H shown in the third embodiment.
8, an adhesive layer 49, a glass substrate 51, and an Al layer 50 are formed, and the Si substrate 41 is removed while leaving the SiO ₂ film 47 (FIGS. 11C and 12D).

Next, a gate layer 111 made of a metal such as Al is formed so as to cover the SiO ₂ film 47.
(E)).

Next, a resist 112 is spin-coated,
The resist 112 is used until the tip of the gate layer 111 is exposed.
Is etched back (FIG. 12F).

Next, the exposed tip of the gate layer 111 is removed by etching to expose the tip of the SiO ₂ film 47, and the resist 112 is removed (FIG. 13G).

Next, patterning of the gate layer 111 is performed. That is, a part of the gate layer 111 is thinned by etching to form the resistance layer 111a (FIG. 13).
(H)). Thus, the gate electrode 111b surrounding the tip of the SiO ₂ film 47 and the gate wiring portion 111c are formed.

In this step, the gate layer 111 has a two-layer structure, and first, a high-resistance metal to be the resistance layer 111a is formed thinly, and then a low-resistance metal to be the electrodes and wirings is formed to be thick.
After patterning the low-resistance metal in the portion to be the resistance layer, it may be removed by etching. In this case, the thickness of the resistance layer can be easily controlled.

Next, the thermally oxidized SiO ₂ film 47 covering the periphery of the tip 52a of the emitter 52 is removed by etching to expose the emitter layer 48, thereby completing the electron-emitting device (FIG. 13 (i)).

The operation in the case where the electron-emitting device according to the present embodiment is used as a switching device is the same as that of the second embodiment except for the operation due to the fact that the gates are not connected by resistors. Similarly to the fourth embodiment, since the gate wiring 111c is made of metal such as Al, it is effective when a potential drop in the gate wiring cannot be ignored.

In this embodiment, the gates are not connected by a resistor. However, by etching between the regions 111b to make them thinner, the gates can be connected by a resistor as in the third and fourth embodiments. Can also.

(Sixth Embodiment) FIG. 14 is a top view showing an electron-emitting device according to a sixth embodiment of the present invention. FIG.
4, parts corresponding to those in FIGS. 4 to 6 are denoted by the same reference numerals, and detailed description thereof will be omitted.

In the electron-emitting device according to the present embodiment, the resistance layer 46 is inserted in two stages in order to enhance the effect of the resistance layer 46. In FIG. 14, reference numeral 71 schematically shows an emitter and a low-resistance gate electrode surrounding the emitter.
Reference numeral 6a denotes a first-stage resistance layer, 43b ₁ denotes a first-stage n-type region, which operates as a gate wiring, and 46b denotes a pattern formed by patterning a thin line-shaped resistance layer to reduce the width in the line length direction. , the second stage of the resistive layer the resistance is increased, 43 b ₂ in the n-type region of the second stage, the portion that acts as a gate wiring, 47 denotes a SiO ₂ film. An electron-emitting device having such a configuration can be easily manufactured by using the method for manufacturing an electron-emitting device shown in FIGS. For convenience of description, the line length direction of the n-type region 43b serving as a gate wiring is defined as a vertical direction, and the line width direction is defined as a horizontal direction.

The two-stage resistance layers 46a and 46b
In the case of the configuration having, the width of the resistance layer 46a in the horizontal direction can be reduced. That is, according to the configuration shown in FIG. 7 of the third embodiment (b), the resistance layer 46 is single-stage, multiple emitters - of the gate electrode 71, the resistance of the closest ones to the n-type region 43 b ₁ is It depends on the lateral width of the resistance layer 46a. Therefore, such an emitter-gate electrode 71
In order to keep the resistance connected to
Most located outside the emitter - the width of the n-type region 43 b ₁ to be the gate electrode 71 and the gate wiring is required to be greater than a predetermined width. Note that the predetermined width refers to a width for maintaining a resistance value that allows the resistor 33 to operate effectively when operating as a switching element as described in the second embodiment.

On the other hand, in the present embodiment, since the second-stage resistance layer 46b is formed between the SiO ₂ films 47 with a narrow width in the vertical direction, the width of the resistance layer 46b in the horizontal direction is large. Therefore, the resistance value can be increased without reducing the resistance. As a result, the resistance of the resistance layer 46a itself does not need to be kept as large as that of the third embodiment, and the third embodiment can be implemented even when the width between the emitter-gate electrode 71 disposed closest to the gate wiring and the gate wiring is small. The same effect as in the embodiment can be obtained.

Although the present embodiment has shown the case where the resistance layers are connected in series in two stages, the present invention can be similarly applied to the case where the resistance layers are connected in three or more stages.

(Seventh Embodiment) FIG. 15 is a top view showing an electron-emitting device according to a seventh embodiment of the present invention. FIG.
5, parts corresponding to those in FIGS. 4 to 6 are denoted by the same reference numerals, and a detailed description thereof will be omitted.

In the electron-emitting device according to the present embodiment, for example, in the third embodiment, the effect of the resistance layer is large at the emitter near the center of the array, and the effect of the resistance layer is small at the emitter at the end of the array. It is to solve.

The emitter-gate electrode 71 of the third embodiment shown in FIG. 7B is formed in an island shape on the resistance layer 46. The distance to the n-type region 43b serving as the gate wiring is different from that in the portion. Therefore, the resistance value between each gate electrode and the gate wiring varies.

On the other hand, in the electron-emitting device according to the present embodiment, as shown in FIG. 15, the n-type region 43b serving as a gate wiring and the emitter-gate electrode 71 are connected to the resistance layer 4
6 in that the plurality of emitter-gate electrodes 71 are arranged in an array, and are common to those shown in FIG.
Keeps a uniform distance to the n-type region 43b. Accordingly, the resistance value connected to each emitter-gate electrode 71 has a uniform value, and each emitter-gate electrode 71 can perform a uniform switching operation.

Although FIG. 15 shows a case where a plurality of emitter-gate electrodes 71 are kept at a uniform distance from the n-type region, the number of emitters of an actually manufactured electron-emitting device is shown in FIG. The number is not limited to 15 and may include more than 10,000 emitters. In this case, it is difficult to produce electron-emitting devices that maintain uniform distances from each other, and it is not necessary to maintain exactly the same distances. If the difference between the resistances of the farthest emitter and the closest emitter as seen from the gate wiring falls within a predetermined value, substantially the same effects as in the present embodiment can be obtained.

Although the present invention has been described with reference to the illustrated embodiments, the present invention is not limited to these embodiments. Various modifications can be made without departing from the spirit of the present invention.

[0131]

According to the electron-emitting device of the present invention and the switching circuit using the same, a resistor is inserted between the gate and the signal applied to the gate, and the resistance is effectively applied to the gate so that almost no gate current flows. To change the voltage,
Power loss at the gate can be reduced, and the element can be hardly damaged.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a manufacturing process of an electron-emitting device according to an embodiment of the present invention.

FIG. 2 is a diagram showing an entire configuration of a switching circuit using the electron-emitting devices according to the embodiment.

FIG. 3 is a diagram showing an overall configuration of a switching circuit using an electron-emitting device according to a second embodiment of the present invention.

FIG. 4 is a diagram showing a method for manufacturing the electron-emitting device according to the first embodiment of the present invention.

FIG. 5 is a view showing the method for manufacturing the electron-emitting device according to the embodiment.

FIG. 6 is a view showing the method for manufacturing the electron-emitting device according to the embodiment.

FIG. 7 is a top view of the electron-emitting device in the same embodiment.

FIG. 8 is a diagram illustrating a method for manufacturing an electron-emitting device according to a second embodiment of the present invention.

FIG. 9 is a view showing the method for manufacturing the electron-emitting device according to the embodiment.

FIG. 10 is a view showing the method for manufacturing the electron-emitting device according to the embodiment.

FIG. 11 is a view showing a method for manufacturing an electron-emitting device according to a second embodiment of the present invention.

FIG. 12 is a view showing the method for manufacturing the electron-emitting device according to the embodiment.

FIG. 13 is a view showing the method for manufacturing the electron-emitting device according to the embodiment.

FIG. 14 is a top view showing an electron-emitting device according to a fourth embodiment of the present invention.

FIG. 15 is a top view showing an electron-emitting device according to a fifth embodiment of the present invention.

FIG. 16 shows the overall configuration of a conventional switching circuit and V-
The figure which shows an I characteristic.

FIG. 17 shows the overall configuration of a conventional switching circuit and V-
The figure which shows an I characteristic.

FIG. 18 is a cross-sectional view showing the overall configuration of an electron-emitting device to which the present invention is applied.

FIG. 19 is a view for explaining a conventional electron-emitting device in which a resistance layer is inserted on the emitter side.

[Explanation of symbols]

1 ... gate electrode 2 ... emitter 3 ... anode electrode 4 ... voltage source 5 ... source 6 ... load 11 ... Si single crystal substrate 12 ... SiO ₂ layer 13, 16 ... Mo layer 14 ... Hole 15 ... Al layer 17 ... conical The emitter 21 ... spacer 22 ... wire 23, 33 ... resistor 41 ... p-type Si substrate 42, 47 ... thermal oxide SiO ₂ film 43 ... n-type region 44 ... recess 45,112 ... resist 46 ... resistive layer 48 ... emitter layer 49 ... Adhesive layer 50 Al layer 51 Glass substrate 52 Emitter 52a Tip 71 Emitter-gate electrode 81 Gate wiring 111 Gate layer

Continuing on the front page (72) Inventor Kazuya Nakayama 1 Kosuka Toshiba-cho, Saiwai-ku, Kawasaki-shi, Kanagawa Inside the Toshiba R & D Center

Claims (6)

[Claims] An emitter for emitting electrons by applying an electric field; a gate electrode for applying a positive voltage to the emitter by a signal source to extract electrons from the emitter; and collecting electrons extracted by the gate electrode An electron-emitting device comprising: an anode electrode; and a gate resistor inserted between the signal source and the gate electrode, the gate resistor reducing a gate voltage by using a voltage drop caused by a gate current. 2. A plurality of the emitters are two-dimensionally arranged, and a gate electrode is provided independently for each emitter.
2. The electron-emitting device according to claim 1, wherein a gate resistor is inserted between each of said gate electrodes and said signal source. 3. The electron-emitting device according to claim 1, wherein said gate resistor is integrally formed on a substrate on which an emitter and a gate electrode are formed. 4. An emitter for emitting electrons by applying an electric field, a gate electrode for extracting electrons from the emitter,
An anode electrode for collecting electrons extracted by the gate electrode; a signal source for applying a positive voltage to the gate electrode with respect to the emitter; and a gate connected in series to the signal source and utilizing a voltage drop due to a gate current. A gate resistor for reducing the voltage, a voltage source for applying a positive voltage higher than the gate electrode to the anode electrode with respect to the emitter, and a load connected in series to the voltage source. A switching circuit using an electron-emitting device, wherein a switching operation is performed using a region where an anode current increases and a gate current decreases. 5. A first conductive layer formed on a substrate and having a plurality of projecting emitters; and a first conductive layer formed on the first conductive layer and excluding tips of the plurality of emitters. An insulating layer formed so as to cover the conductive layer, and a second conductive layer formed by coating the insulating layer so that tips of the plurality of emitters are opened, The second conductive layer forms a gate electrode by increasing the thickness of the periphery of each of the emitters, and is a region surrounding the region where the plurality of emitters are formed, and is a predetermined distance from the plurality of gate electrodes. The gate wiring is formed by increasing the thickness of the region where the gate electrode is formed, and the thickness of the region sandwiched between the gate electrode and the gate wiring is made smaller than the thickness of the gate electrode and the gate wiring. Characterized by layers Electron-emitting device. 6. The electron according to claim 5, wherein the second conductive layer between the respective gate electrodes is made thinner than the gate electrode so as to operate as a resistance layer. Emission element.