JPH11136044A - Differential amplifier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To increase the settling speed of a differential amplifier with its low power consumption by outputting the current output of a differential detection means which detects the difference of input voltage of differential input stages after converting the current output into the voltage output via a current/ voltage conversion means and using the voltage current as the charging current of the differential input stages via a current feedback part. SOLUTION: When the input signals of the fast changing voltage are applied to the input terminals 100 and 102 of an input amplifier stage 600, these input signals are transmitted to the input transistors TR 400 and 402 of a feedback circuit 500 according to the voltage change. If the voltage corresponding to the transmitted current varies at a level higher than the threshold voltage levels of the output TR 424 and 426, the current corresponding to the input signal is supplied to the stage 600. Thus, it's possible to fast settle the stage 600 with no useless power consumption just by supplying instantaneously the necessary current and without increasing the steady current.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a differential amplifier and, more particularly, to a low power consumption differential amplifier having good settling characteristics.

[0002]

2. Description of the Related Art FIG. 3 shows a circuit configuration of a conventional differential amplifier. The present differential amplifier is described in "Analog Integrated Circuit Design Technology for VLSI, Volume 2"
G. FIG. Mayer, Issuing Office Baifukan p. 317) is introduced.

The circuit of the differential amplifier shown in FIG. 3 will be described below. N-type MO connected to bias voltage 104
The S constant current source transistor 204 is connected to a common source of the pair of input n-type transistors 200 and 202, and functions to make the sum current flowing through the input transistors 200 and 202 constant.

[0004] Voltages input to input terminals 100 and 102 are converted into currents by input transistors 200 and 202, and the difference voltage is applied to active load p-type transistors 206 and 20.
8 and is converted into a voltage. The output voltage of the drain of the input transistor 202 is applied to the gate electrode of the output p-type transistor 210, and the output transistor 21
The signal is amplified by 0 and output to the output terminal 106.

A phase compensation capacitor 300 is connected between the gate of the output transistor 210 and the output terminal 106 to stabilize the operation of the differential amplifier.

Further, in order to drive a load resistor attached to the output terminal 106, the drain of the output constant current source n-type MOS transistor 212 is connected to the output terminal 106, and the gate of the output constant current source transistor 212 is connected to the bias voltage 104. Connected to.

The maximum value of the settling time of this differential amplifier is determined by the maximum value of the current flowing through the input transistor 202 and the active load transistor 206, that is, the current value i constantly flowing through the current source transistor 204, A capacitance t of 300 and a value t divided by the output fluctuation voltage V
= I / CV sec.

On the other hand, among the characteristics of the differential amplifier, the slew rate is obtained by observing the rise time of the output voltage with an oscilloscope when an ideal pulse having a fast rise is applied to the input, and measuring the change in the output voltage by V / μs. And so on. Using a sine wave instead of a pulse, increase the frequency little by little,
It can also be obtained from the maximum frequency at which the output waveform does not cause distortion and the amplitude at that time. Several hundred V / μs for high slew rate OP amplifier, several kV / μs for special one
Some are. This provides a measure of how large the amplitude voltage can be obtained at a high frequency from the output of the OP amplifier.

Therefore, although the settling time of the differential amplifier is reduced as the dynamic range and the high frequency characteristics of the input stage are higher at the rising of the input pulse, the same as the slew rate, the settling time of the phase compensating capacitor of the output stage is reduced. For this reason, the output waveform is dull and the settling time characteristics of the differential amplifier are deteriorated.

[0010]

In such a differential amplifier, it is necessary to increase the bias current of the input transistor pair in order to increase the settling speed.

Conventionally, as described above, since this bias current is provided by a constant current source, the current consumption must be constantly increased in order to secure a large current required only during settling. There was a point.

[Object of the Invention] An object of the present invention is to speed up the setting of a differential amplifier with low power consumption.

[0013]

SUMMARY OF THE INVENTION The present invention achieves the above object and comprises a differential input stage operating at a steady current, and a differential amplifier output stage receiving and outputting the output of the differential input stage. In a differential amplifier comprising a phase compensation circuit for compensating stable operation of a coupling circuit between the differential input stage and the differential amplification output stage, a difference occurs in an input voltage of the differential input stage. Detection stage, a current / voltage converter for converting a current output of the differential detection stage into a voltage output,
A current feedback unit that uses the output of the voltage conversion unit as a supplementary current for the differential input stage.

In the above differential amplifier, the differential input stage is connected to a pair of MOS transistors, a constant current source MOS transistor connected to a common source of the pair of MOS transistors, and each drain of the pair of MOS transistors. The differential amplification output stage includes an output MOS transistor having a gate connected to one of the active load transistor pairs, and a constant current source MOS transistor serving as a load of the output MOS transistor. Wherein the phase compensation circuit comprises one of the pair of active load transistors and the output M
It is characterized by being connected between the output of the OS transistor.

Further, in the above differential amplifier, the differential detection stage has a feedback differential transistor pair receiving an output of the differential input stage at one input terminal, and the current / voltage conversion section is configured to control the feedback differential stage. The current feedback section comprises a conversion MOS transistor having a gate connected directly to a drain connected to the load of the transistor pair, and the current feedback section comprises a feedback MOS transistor having a drain connected to the gate of the conversion MOS transistor. It is characterized in that it is connected to a current supply section of the differential input stage.

A high-speed settling differential amplifier according to the present invention supplies a bias current by connecting each gate to an input terminal, a pair of input transistors having sources commonly connected, and a common source of the input transistors. A current source transistor, an output current from the drain of the input transistor pair is input to each drain, an active load transistor pair having one drain connected to a common gate, and an output voltage of the active load transistor pair is input. An output amplifying stage to amplify, an output of the active load transistor pair, a phase compensation capacitor connected between output terminals of the output amplifying stage, and a gate voltage of the active load transistor pair as one input; Of the active load transistor pair when the input voltage of the input transistor pair is equal A voltage, and an input transistor pair of a feedback circuit having a source connected in common, a current source transistor of a feedback circuit that supplies a bias current to a common source of the input transistor pair of the feedback circuit, and a drain of the input transistor pair of the feedback circuit. A pair of current-to-voltage conversion circuits for inputting the output current to a voltage and connecting the output voltages of the pair of current-to-voltage conversion circuits to respective gates, and a common source for the input transistor pair of the input amplification stage. When the output voltage of the output voltage of the current-voltage conversion circuit is equal to the input voltage of the input transistor pair,
The differential amplifier is characterized in that the difference between the two input voltages applied to the gate of the input amplifying stage is equal to or lower than the threshold voltage of the output transistor of the feedback circuit. When the voltage deviates in a certain direction from the reference voltage applied to the input transistor of the feedback circuit, the output current of one input transistor of the feedback circuit increases, and when the voltage deviates in the reverse direction, the output current of the other input transistor of the feedback circuit increases. A pair of current-voltage conversion circuits of a feedback circuit that operates so that the output current increases and inputs the output current of each input transistor of the return circuit, with an increase in the current of the input transistor of the feedback circuit,
Operates to increase the output voltage, and when the output voltage of one of the pair of output transistors of the feedback circuit becomes equal to or higher than the threshold voltage, the output transistor of the feedback circuit operates to increase the bias current of the input amplification stage. The operation is performed so as to increase.

[Effect] A feedback circuit is provided which acts to increase the bias current of the input stage of the differential amplifier when a large differential voltage is applied to the input of the differential amplifier.

As a result, when the conventional high-speed settling is realized, the bias current at the input stage of the differential amplifier is steadily increased, but is increased only at the time of settling. It is possible to suppress a large increase in current consumption.

[0019]

Next, an embodiment of the present invention will be described in detail with reference to the drawings.

Referring to FIG. 1, the preferred embodiment of the present invention comprises an input amplifier stage 600, an output amplifier stage 800, a phase compensation capacitor 300, and a feedback circuit 500.
0 only when a differential voltage is present at the input amplification stage 600,
It is necessary to operate to increase the current of the input amplification stage 600.

[First Embodiment] Next, a first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram of a first embodiment of the present invention.

The high-speed settling differential amplifier of this embodiment has an input amplification stage 60 having differential input terminals 100 and 102.
0, an output amplification stage 800 having an output terminal 106, a phase compensation capacitor 300, a feedback circuit 500, and a bias voltage source terminal 104.

The input amplifying stage 600 includes a differential input transistor pair including n-type MOS transistors 200 and 202 and an n-type bias current source MOS transistor 204.
And an active load transistor pair composed of p-type MOS transistors 206 and 208.

The output amplifying stage 800 is connected to the input amplifying stage 6.
The output of the input amplifier stage 600 is connected between the output of the input amplifying stage 600 and the output terminal 106 by a series connection of a p-type MOS output transistor 210 controlled by an output of 00 and an n-type MOS constant current source transistor 212. To prevent the circuit from erroneously oscillating due to the phase rotation, thereby compensating for a stable operation.

Further, the feedback circuit 500 includes an input transistor pair composed of p-type MOS transistors 400 and 402, a p-type bias current source MOS transistor 404,
a p-type reference voltage source MOS transistor 408 for applying a reference voltage to the gate of the p-type MOS transistor 402;
A first current-voltage conversion circuit composed of n-type MOS transistors 416 and 422;
And a second current-to-voltage conversion circuit 420 and an output of the first current-to-voltage conversion circuit.
The first output MOS transistor 424 of the n-type feedback circuit that increases the bias current of the n-type feedback circuit, and the n-type feedback circuit that is controlled by the output of the second current-voltage conversion circuit and increases the bias current of the input amplification stage 600 A second output MOS transistor 426, a p-type MOS transistor 406 for applying a bias voltage to the p-type bias current source MOS transistor 404, an n-type MOS transistor 410 for applying a bias current to the MOS transistor 406,
N-type M for applying a bias current to S transistor 408
It is composed of an OS transistor 412.

When there is no difference between the voltages input to the input terminals 100 and 102, the drain current of each of the transistors 408 and 206 and the W of each transistor
/ L (W: channel width of gate of MOS transistor,
L: the channel length of the gate), and the input transistor 4 of the feedback circuit 500 is designed to have the same ratio.
02 to generate a reference voltage. Transistor 41
4 and 416 are の of the current flowing through the transistor 404.
Designed to have a size that allows a constant current of twice or more and less than one time to flow, and when there is no difference between the voltages input to the input terminals 100 and 102, the output currents from the drains of the transistors 400 and 402 are transistors 416 and 414 Since the current flows only through the transistors 422 and 420, the drain voltage of the transistors 422 and 420 becomes lower than the threshold voltage of the output transistors 424 and 426, and the transistors 424 and 426 are turned off. It works so that the bias current does not increase. As a result, the power consumption during normal operation is set to the minimum.

With the above configuration, the input terminals 100 and 10
When a difference occurs in the voltage input to the input terminal 2 and the input voltage of the input terminal 102 is higher than the input voltage of the input terminal 100,
The output current from the drain of the transistor 400 increases, the transistors 422 and 424 are turned on, a current flows, and the bias current of the input amplifying stage 600 increases, so that high-speed settling becomes possible.

When the input voltage of the input terminal 102 becomes smaller than the input voltage of the input terminal 100, the output current from the drain of the transistor 402 increases, and the transistors 420 and 426 are turned on to allow a current to flow. This has the effect that the bias current of stage 600 is increased, enabling fast settling.

Therefore, when the input signal of the high-speed change voltage is applied to the input terminals 100 and 102, the input signal is transmitted to the differential amplifier transistors 400 and 402 of the feedback circuit 500 in accordance with the change, and corresponds to the transmitted current. When the voltage changes more than the threshold voltage of the output transistors 424 and 426, a current corresponding to the input signal is supplied to the input amplification stage 6.
Since the input current is supplied to the input amplifier stage 600, the input amplifier stage 600 can perform high-speed settling only by passing a necessary current instantaneously, thereby preventing wasteful power consumption.

[Second Embodiment] FIG. 2 is a circuit diagram of a second embodiment of the present invention. The difference between the present embodiment and the first embodiment is that the current-voltage conversion circuit of the feedback circuit 500 is configured by resistors 430 and 432. The input amplifying stage 600 and the output stage 800 of the present embodiment are the same as those of the first embodiment, and a duplicate description will be omitted.

The resistances of the resistors 430 and 432 become lower than the threshold voltage (threshold voltage) of the output MOS transistors 424 and 426 of the feedback circuit 500 when a half of the current flowing through the p-type MOS transistor 404 flows. To be designed.

Here, when the input voltage of the input terminal 102 is higher than the input voltage of the input terminal 100, the output current from the drain of the MOS transistor 400 increases, the voltage of the resistor 432 increases, and the threshold of the MOS transistor 424 increases. When the voltage becomes larger than the MOS
A current flows through the transistor 424, and a supplementary current is supplied to a steady current corresponding to the input voltage.

When the input voltage of input terminal 100 is higher than the input voltage of input terminal 102, the output current from the drain of MOS transistor 402 increases, the voltage of resistor 430 increases, and the threshold voltage of MOS transistor 426 increases. When it becomes larger, a current flows through the MOS transistor 426, and a supplementary current is supplied in addition to the steady-state current corresponding to the input voltage.

Naturally, when the input voltage of the input terminal 100 and the input voltage of the input terminal 102 match, the current flowing through the input amplification stage is set to a minimum.

As described above, when a difference voltage equal to or more than a certain value is input to the input voltage, the bias current of the input amplification stage 600 increases, thereby enabling high-speed settling, and a difference voltage equal to or less than a certain value is input. In such a case, settling can be achieved with a steady current, and as a result, the effect of increasing the speed of settling and reducing power consumption can be achieved.

Thus, in the first embodiment, the increase in the output current of the input transistor of the feedback circuit 500 is proportional to the increase in the output current of the output transistor of the feedback circuit 500. in the form, the output current increases in accordance with V _GS -I _D characteristic of the MOS transistor, that is an increase in the output current of the input MOS transistors 400 and 402 of the feedback circuit 500, increasing the square characteristics of the output current of the feedback circuit 500 And the steep settling can be realized.

[0037]

As described above, the differential amplifier of the present invention has an effect that high-speed settling can be realized without increasing the steady-state current as compared with the conventional example.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a first embodiment of the present invention.

FIG. 2 is a circuit diagram according to a second embodiment of the present invention.

FIG. 3 is a circuit diagram of a conventional example according to the present invention.

[Explanation of symbols]

100, 102 Input terminal 104 Bias voltage terminal 106 Output terminal 200, 202 Input amplification stage input transistor 204 Bias current source transistor 206, 208 Active load transistor 210, 212 Output transistor 300 Phase compensation capacitance 400, 402 Feedback circuit input transistor 408 Reference voltage Generation transistors 416, 420 Output transistors 414, 416, 420, 422 of the feedback circuit Current-voltage conversion circuit transistors 430, 432 Current-voltage conversion resistors

Claims (6)

[Claims] 1. A pair of input transistors each having a gate as an input terminal and having a source connected in common, a current source transistor connected to a common source of the input transistor pair and supplying a bias current, and the input transistor pair. The output current from the drain of each is input to each drain,
An active load transistor pair having one drain connected to a common gate, an output amplifying stage for receiving and amplifying an output voltage of the active load transistor pair, an output of the active load transistor pair and an output of the output amplifying stage Between the terminals,
The connected layer compensation capacitance and the gate voltage of the pair of active load transistors are set as one input, and the other input is set as a reference voltage equal to the gate voltage of the pair of active load transistors when the input voltage of the pair of input transistors is equal. An input transistor pair of a feedback circuit having a source connected in common, a current source transistor of a feedback circuit for supplying a bias current to a common source of the input transistor pair of the feedback circuit, and a drain from an input transistor pair of the feedback circuit. A pair of current-voltage conversion circuits for inputting an output current and converting the voltage to a voltage, and connecting the output voltages of the pair of current-voltage conversion circuits to respective gates, to a common source of the input transistor pair of the input amplification stage. An output voltage of an output voltage of the current-to-voltage conversion circuit having an output transistor pair of the feedback circuit connected to a drain; , The input transistors when the input voltage of the pair are equal, the differential amplifier is characterized in that the Suresshuhorudo voltage below the output transistor of the feedback circuit. 2. A differential input stage operating at a steady current, a differential amplification output stage receiving and outputting an output of the differential input stage, and coupling the differential input stage and the differential amplification output stage. A differential amplifier comprising: a phase compensation circuit that compensates for stable operation of the circuit; and a differential detection stage that detects that a difference has occurred in the input voltage of the differential input stage; A differential amplifier, comprising: a current / voltage converter for converting a current output to a voltage output; and a current feedback unit for using an output of the current / voltage converter as a supplementary current for the differential input stage. 3. The differential amplifier according to claim 2, wherein
The differential input stage includes a MOS transistor pair and the MO transistor pair.
Constant current source MO connected to common source of S transistor pair
An S-transistor, and a current mirror active load transistor pair connected to each drain of the MOS transistor pair. The differential amplification output stage includes an output MO having a gate connected to one of the active load transistor pairs.
An S transistor and a constant current source MOS transistor serving as a load of the output MOS transistor, wherein the phase compensation circuit is connected between one of the pair of active load transistors and the output of the output MOS transistor. Characteristic differential amplifier. 4. The differential amplifier according to claim 2, wherein the differential detection stage has a feedback differential transistor pair receiving an output of the differential input stage at one input terminal, and wherein the current / voltage is different. The conversion unit includes a conversion MOS transistor having a gate and a drain directly connected to the load of the feedback differential transistor pair, and the current feedback unit includes a feedback MOS transistor having a drain connected to the gate of the conversion MOS transistor. A differential amplifier, wherein a drain of the feedback MOS transistor is connected to a current supply section of the differential input stage. 5. The differential amplifier according to claim 2, wherein the differential detection stage has a feedback differential transistor pair that receives an output of the differential input stage at one input terminal, and wherein the current / voltage is different. The conversion section comprises a resistor connected to the load of the feedback differential transistor pair, and the current feedback section comprises a feedback MOS transistor having each resistance connected to the gate, and the drain of the feedback MOS transistor is connected to the differential input. A differential amplifier connected to a current supply section of a stage. 6. The differential amplifier according to claim 4, wherein a constant current source MOS transistor is connected as a load of the feedback differential transistor pair, and a constant voltage bias is applied to a gate of the constant current source MOS transistor. A differential amplifier, wherein a voltage is supplied, and the bias voltage is supplied to a gate of a constant current source MOS transistor serving as a load of the output MOS transistor.