JPH11135529A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent bubbles from being taken between an electrode part and a bump electrode by setting at least a part of the periphery of a recessed part and the base of the recessed part to be on the almost same plane in a semiconductor device where the bump electrode is formed in the recessed part of the electrode part of a semiconductor element with a material having conductivity. SOLUTION: A insulating layer 31 being a passivation film is patterned on the electrode pad 2 of a Si substrate 1 of a semiconductor element so that a part of it opens in a deformed octagon. At that time, the insulating layer 31 is formed so that the partial area of a ring part 33b of a barrier metal layer 33 formed along the upper part of the pattern becomes the same plane as the base of a through hole part 33a and a barrier metal layer 33 is formed on the upper part so as to obtain a ring step part 33c. Thus, the bubbles taken into the step part of the through hole part 33a are easily discharged from the ring step part 33c at the time of melting a solder ball, and a solder bump 5 free from bubbles can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device in which a flip chip structure using bumps made of a conductive material such as solder is applied to a semiconductor element.

[0002]

2. Description of the Related Art Conventionally, as a semiconductor device in which a flip chip structure is applied to a semiconductor element, a device using solder bumps is generally well known. FIG. 7 is a process diagram showing a method of forming a solder bump by a conventional vapor deposition method for a semiconductor device. In the figure, reference numeral 1 denotes a silicon (Si) substrate of a semiconductor element, and 2 denotes aluminum (Al) formed on a Si substrate 1. 3) is an insulating layer which is a passivation film formed on the upper part of the electrode pad 2 and the Si substrate 1 so that a part of the electrode pad 2 is opened, and 4 is an opening of the electrode pad 2 and a surrounding insulating layer. The barrier metal metal layer 5 formed on 3 is a substantially hemispherical solder bump (protruding electrode) formed on the barrier metal metal layer 4.

In order to form the flip chip structure,
First, an electrode pad 2 and an insulating layer 3 are sequentially formed on a Si substrate 1, and then a metal mask 6 is placed on the electrode pad 2 and the insulating layer 3. A barrier metal layer 4 is formed so as to extend over the insulating layer 3, and a vapor deposition film 8 containing tin and lead as main components is formed (FIG. 7A). A hemispherical solder bump 5 is formed (FIG. 7B).

As another forming method, there is a forming method of a solder bump by a solder plating method shown in FIG.
First, an electrode pad 2 and an insulating layer 3 are sequentially formed on a Si substrate 1, a barrier metal layer 11 is formed on the electrode pad 2 and the insulating layer 3 by sputtering, and a photoresist 12 is further formed on the barrier metal layer 11. Is applied, and the photoresist 12 is opened only on the electrode pad 2.
Is patterned (FIG. 8A).

[0005] Next, using the barrier metal layer 11 as an electrode, solder is deposited by plating on the opening on the electrode pad 2 by electrolytic plating to form a solder plating film 13, and then the photoresist 12 is peeled off (FIG. 8). (B)).
Next, the unnecessary barrier metal metal layer 11 around the electrode pad 2 is removed by etching to form the barrier metal metal layer 4 over the opening of the electrode pad 2 and the surrounding insulating layer 3, and then the solder plating film 13 is removed. It is heated and melted to form a substantially hemispherical solder bump 5 (FIG. 8C).

In the above-described formation method using the vapor deposition method, a metal mask 6 is placed on a Si substrate 1 of a semiconductor element, a barrier metal layer 4 is vapor deposited 7, and then tin and lead are continuously formed. The vapor deposition film 8 is formed by vapor deposition 7. However, since a gap is generated between the metal mask 6 and the Si substrate 1, there is a problem that the vapor deposition film 8 easily goes around at the time of vapor deposition 7. . For example, if the electrode pitch is 10
In the case of a semiconductor element having a narrow pitch such as 0 μm, a short circuit is likely to occur due to the deposited film 8 wrapping around between the electrode pads 2, which is not suitable for forming the solder bumps 5 on the semiconductor element having a narrow pad pitch. .

In the formation method using the solder plating method, the composition of lead and tin contained in the plating solution tends to vary depending on the new and old plating solutions and lots of the plating solution. The composition of the formed solder plating film 13 also deviates from the initially planned composition, so that there is a problem that a desired solder melting temperature may not be obtained, and it is difficult to fill the composition with solder. Further, the height of the solder plating film 13 is adjusted by the thickness of the photoresist 12, but the thickness of the photoresist 12 is
There is a problem that the coating thickness has a limit depending on the patterning conditions, and the height of the solder bump 5 is limited by the limit of the coating thickness.

Therefore, as a semiconductor device which has solved the above various problems, there is a semiconductor device using a solder ball mounting method. In this solder ball mounting method, first, as shown in FIGS.
An electrode pad 2 is formed thereon, and an insulating layer 3 serving as a passivation film is formed thereon so that a part of the electrode pad 2 is opened. Next, a barrier metal layer 11 is formed on the electrode pad 2 and the insulating layer 3 by sputtering, and a pattern is formed on the barrier metal layer 11 by a general etching method to form the barrier metal layer 4.

The barrier metal layer 4 is composed of a through hole 4a formed of a concave portion of a step d formed so as to gradually expand upward, and a ring portion 4b formed around the through hole 4a. ing. Then
After applying the flux 21 on the insulating layer 3 and the barrier metal layer 4, the solder ball 2
2 is mounted. Thereafter, as shown in FIG. 11, the solder balls 22 are melted by a reflow apparatus to form the solder bumps 5, and the unnecessary flux 21 is removed to obtain a semiconductor element having the solder hump 5 formed thereon.

In this solder ball mounting method, since the solder balls 22 having a predetermined composition are used in advance, there is no deviation in the solder composition. In addition, according to the size of the target solder hump 5, the minute solder balls 22 having a diameter of about φ40 μm to φ600 μm can be freely selected and mounted. There is an advantage that a narrow bite having a pitch of 100 μm or less can be mounted.

[0011]

By the way, in the semiconductor device to which the above-mentioned conventional solder ball mounting method is applied,
An insulating layer 3 is patterned on the electrode pad 2 of the semiconductor element so that the electrode pad 2 is opened, and a barrier metal layer 4 composed of a through-hole 4a and a ring 4b is patterned on the insulating layer 3. Therefore, as shown in FIG. 9, when the flux 21 is applied on the barrier metal layer 4, there is a problem that bubbles 23 are easily taken in near the step of the through-hole portion 4a.

In this state, when the solder ball 22 is melted by the reflow device, the solder ball 22 is melted in a state in which bubbles 23 are taken into the solder ball 22, and solidified in the subsequent cooling process. The solder bump 5 in which the air bubbles 23 are taken in is formed.
And the electrode pad 2 will have poor adhesion. Also,
The solder bumps 5 incorporating the bubbles 23 are
In some cases, the diameter of the solder bump 5 may be larger than that of a solder bump that does not take in the solder bump, and there may be a problem that a desired solder bump height and a desired solder bump diameter cannot be obtained.

The present invention has been made in view of the above circumstances, and there is no danger that air bubbles will be trapped between the electrode portion of the semiconductor element and the protruding electrode, and the adhesiveness between the electrode portion and the protruding electrode will be described. It is an object of the present invention to provide a semiconductor device capable of improving the height and obtaining an electrode portion having a desired height and diameter.

[0014]

In order to solve the above problems, the present invention provides the following semiconductor device. That is, in a semiconductor device in which a protruding electrode is formed of a conductive material in a concave portion of an electrode portion of a semiconductor element, at least a part of the periphery of the concave portion is substantially flush with the bottom of the concave portion. .

[0015] The electrode section may include a pad formed on the semiconductor element, an insulating layer formed on the pad and having an opening, and a metal layer formed on the insulating layer. . Further, the metal layer may include a through hole having a recess, and a ring provided around the through hole, and at least a part of the ring may be substantially flush with a bottom of the recess. .

The conductive material may be a material containing solder as a main component. Further, the metal layer may be a barrier metal layer. Further, the electrode portion may be electrically connected to a second electrode portion provided inside or at the bottom of the semiconductor element via a through hole.

In the semiconductor device of the present invention, at least part of the periphery of the concave portion of the electrode portion of the semiconductor element is made substantially flush with the bottom portion of the concave portion, so that the projecting electrode is formed on the concave portion with a conductive material. At the time of formation, bubbles taken in between the recess and the protruding electrode are quickly discharged outward from a part of the periphery of the recess to remove bubbles between the recess and the protruding electrode.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Each embodiment of the semiconductor device of the present invention will be described with reference to the drawings. [First Embodiment] FIG. 1 is a plan view showing a semiconductor device according to a first embodiment of the present invention before a solder bump is attached, FIGS. 2 and 3 are cross-sectional views showing the semiconductor device, and FIGS. FIG. 2 is an exploded plan view of an electrode pad portion of the semiconductor device, and FIG.
3 corresponds to a cross section along the line AA in FIG. 1, and FIG. 3 corresponds to a cross section along the line BB in FIG.

In this semiconductor device, an insulating layer 31 serving as a passivation film is patterned on a square electrode pad 2 made of Al provided on a Si substrate 1 of a semiconductor element so that a part of the electrode pad 2 is opened. Is formed. In this insulating layer 31, a modified octagon, that is, an opening 32 in which one side 32a of the octagon is rectangularly expanded outward.
Are formed. An octagonal barrier metal layer 33 made of, for example, titanium (Ti) metal and copper (Cu) metal is formed on the pattern of the insulating layer 31.

The barrier metal layer 33 includes a through hole 33a forming a concave portion of the electrode pad portion, a ring portion 33b formed around the through hole portion 33a,
The insulating layer 31 includes a portion in which the octagon is deformed, that is, a ring low step portion 33c in which a part of the ring portion 33b is lowered. The ring low step portion 33c is flush with the bottom of the through-hole portion 33a because the insulating layer 31 does not exist below the barrier metal layer 33.

Next, a method of mounting a solder ball on the semiconductor device will be described. First, the Si substrate 1 of the semiconductor element
An electrode pad 2 is formed thereon, and an insulating layer 31 serving as a passivation film is formed on the electrode pad 2 so that a part of the electrode pad 2 is opened in a deformed octagon (FIGS. 1 and 4).

Next, a thin film of barrier metal is formed on the electrode pad 2 and the insulating layer 31 by sputtering.
Thereafter, an octagonal barrier metal layer 33 is formed by a general etching method (FIGS. 1 and 4). Thereby, the barrier metal layer 33 is formed in the through hole 33a.
And a ring portion 33b and a ring low step portion 33c (FIG. 1).

Next, a flux 21 is applied on the insulating layer 31 and the barrier metal layer 33 to form a solder ball 22.
Is mounted, the solder ball 22 is melted by a reflow device, and the unnecessary flux 21 is removed to obtain the solder bump 5 on the barrier metal layer 33 (FIG. 5).

In this semiconductor device, an insulating layer 31 as a passivation film is formed on the electrode pad 2 of the Si substrate 1 of the semiconductor element so that a part of the electrode pad 2 is opened in a deformed octagon. At this time, the pattern of the insulating layer 31 is such that a part of the ring portion 33b of the barrier metal layer 33 formed along the upper portion of the pattern of the insulating layer 31 is flush with the bottom of the through-hole portion 33a. After the insulating layer 31 is patterned, a low-ring step portion 33c is obtained by patterning the barrier metal layer 33 on the insulating layer 31.

A flux 21 is applied on the insulating layer 31 and the barrier metal layer 33, and the flux 21 is applied.
By mounting the solder ball 22 on the upper portion and melting and connecting to form the solder bump 5, the bubbles 23 taken into the step portion of the through-hole portion 33 a at the time of applying the flux 21 are removed.
When the solder balls 22 are melted, the solder balls 22 can be discharged outward from the ring low step portion 33c of the barrier metal layer 33 (in the direction of arrow E in FIG. 5), and the air bubbles in the solder bumps 5 can be removed.

Further, the ring low step portion 33c and the bottom portion of the through-hole portion 33a form the same plane and substantially widen the bottom portion of the through-hole portion 33a. Is easily discharged outward from the ring low step portion 33c when the solder ball 22 is melted.

According to the semiconductor device of the present embodiment, the through-hole portion 33 formed on the electrode pad 2 of the semiconductor element
Since the ring low step portion 33c where the insulating layer 31 is not formed under the barrier metal layer 33 is formed in at least a part of the ring portion 33b of the barrier metal layer 33 including the ring portion 33a and the ring portion 33b, Since the portion 33c and the bottom portion of the through-hole portion 33a are flush with each other, and the bubbles 23 taken into the step portion of the through-hole portion 33a are easily discharged from the ring low step portion 33c when the solder ball 22 is melted. This has the effect of removing the air bubbles 23 and obtaining a solder bump 5 having no air bubbles 23.

[Second Embodiment] FIG. 6 is a sectional view showing a semiconductor device according to a second embodiment of the present invention. The semiconductor device according to the second embodiment differs from the semiconductor device according to the first embodiment described above. The difference from the semiconductor device is that the electrode pad 2 is
It is electrically connected to a lower pad (second electrode portion) 42 formed inside via an interlayer through hole 43.

The Si substrate 41 of the semiconductor element has a multilayer wiring formed thereon, and the lower pad 42 and the uppermost electrode pad 2 are connected by an interlayer through hole 43. The interlayer through hole 43 is provided in a region corresponding to the ring low step portion 33c which is the end of the electrode pad 2. And
As in the first embodiment described above, an insulating layer 31 serving as a passivation film is patterned on the electrode pad 2 so that a part of the electrode pad 2 is opened. And a barrier metal layer 33 made of Cu metal.

As in the first embodiment, the barrier metal layer 33 includes a through-hole 33a, a ring 33b, and a low step portion 33c. Insulating layer 31 underneath
Therefore, it is formed on the same plane as the bottom of the through hole 33a. However, in the ring low step portion 33c,
Interlayer through hole 4 for connecting to lower layer pad 42
3, a recess is formed in a part of the ring low step portion 33c, and a solder bump 5 is formed on this upper portion by applying a flux, mounting a solder ball, and melting.

In the semiconductor device according to the second embodiment, a recess due to the interlayer through hole 43 occurs in the ring low step portion 33c, and the interlayer through hole 43 has a thickness of about 1 μm.
Since the size is smaller than the diameter, it is not affected by bubbles at the time of flux application, and bubbles taken in the step portion of the through-hole portion 33a at the time of flux application are also outward from the ring low step portion 33c when the solder ball is melted. Easily discharged. Therefore, the second embodiment has an advantage over the first embodiment that the interlayer through hole 43 can be formed in the region of the electrode pad 2 corresponding to the ring low step portion 33c.

Although the present invention has been specifically described based on the two embodiments, the present invention is not limited to the above-described first and second embodiments, and can be variously modified without departing from the gist thereof. Needless to say, there is. For example, in each of the embodiments of the present invention, the solder bump 5 is used, but any material having conductivity may be used, and a material composition other than solder may be used. Further, regarding the material of the electrode pad 2, the insulating layer 31 which is a passivation, the barrier metal layer 33 and the method of forming the same, the semiconductor element material and the form of various semiconductor elements, etc., are not limited to those described in the present invention. , The form can be applied.

[0033]

As described above, according to the semiconductor device of the present invention, at least a part of the periphery of the concave portion of the electrode portion of the semiconductor element is substantially flush with the bottom of the concave portion. When the protruding electrode is formed from a material having conductivity, the air bubbles taken in between the concave portion and the protruding electrode are quickly discharged outward from a part of the periphery of the concave portion, whereby the concave portion is formed. It is possible to remove bubbles between the electrode and the protruding electrode, thereby preventing the protruding electrode from protruding or having a large diameter due to the bubble. Therefore, the adhesion between the electrode portion of the semiconductor element and the protruding electrode can be increased,
An electrode portion having a desired height and diameter can be obtained.

[Brief description of the drawings]

FIG. 1 is a plan view showing a state before a solder bump is attached to a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating the semiconductor device according to the first embodiment of the present invention.

FIG. 3 is a cross-sectional view illustrating the semiconductor device according to the first embodiment of the present invention.

FIG. 4 is an exploded plan view showing an electrode pad portion of the semiconductor device according to the first embodiment of the present invention.

FIG. 5 is a cross-sectional view illustrating a method for mounting a solder ball on the semiconductor device according to the first embodiment of the present invention.

FIG. 6 is a cross-sectional view illustrating a semiconductor device according to a second embodiment of the present invention.

FIG. 7 is a process diagram showing a conventional method of forming a solder bump by a vapor deposition method for a semiconductor device.

FIG. 8 is a process diagram showing a method for forming a solder bump by a solder plating method in a conventional semiconductor device.

FIG. 9 is a cross-sectional view illustrating a conventional method of mounting a solder ball using a flux of a semiconductor device.

FIG. 10 is a plan view showing a conventional solder ball mounting method using a flux of a semiconductor device.

FIG. 11 is a cross-sectional view showing a semiconductor device obtained by a conventional solder ball mounting method.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Silicon (Si) substrate 2 Electrode pad 3 Insulating layer 4 Barrier metal metal layer 4a Through hole part 4b Ring part 5 Solder bump (protruding electrode) 6 Metal mask 7 Deposition 8 Deposition film 11 Barrier metal metal layer 12 Photoresist 13 Solder plating film DESCRIPTION OF SYMBOLS 21 Flux 22 Solder ball 31 Insulating layer 32 Opening 32a One side 33 Barrier metal gold layer 33a Through hole part 33b Ring part 33c Ring low step part 41 Si substrate 42 Lower pad (second electrode part) 43 Interlayer through hole

Claims (6)

[Claims] 1. A semiconductor device having a projection electrode formed of a conductive material in a recess of an electrode portion of a semiconductor element, wherein at least a part of the periphery of the recess is substantially flush with a bottom of the recess. A semiconductor device characterized by the above-mentioned. 2. The semiconductor device according to claim 1, wherein the electrode unit includes a pad formed on the semiconductor element, an insulating layer formed on the pad and having an opening, and a metal layer formed on the insulating layer. The semiconductor device according to claim 1, wherein: 3. The metal layer includes a through hole having a recess, and a ring provided around the through hole, and at least a part of the ring is substantially flush with a bottom of the recess. 3. The semiconductor device according to claim 2, wherein: 4. The semiconductor device according to claim 1, wherein the material having conductivity is a material containing solder as a main component. 5. The semiconductor device according to claim 2, wherein said metal layer is a barrier metal layer. 6. The semiconductor device according to claim 6, wherein the electrode portion includes a second electrode portion provided inside the semiconductor element or at a bottom thereof.
2. The semiconductor device according to claim 1, wherein the semiconductor device is electrically connected through a through hole.