JPH11133459A - Active matrix substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the deterioration of display quality due to the dispersion of voltage values to be charged to pixel electrodes in a signal line direction caused by the load of a signal line and the deterioration of display quality due to lack of charge to the pixel electrodes. SOLUTION: Respective pixel electrodes 2 arrayed like a matrix are connected to the drains of corresponding 1st and 2nd switching elements 3a, 3b, the gates of the elements 3a, 3b are connected to respective gate lines 4 from a scanning line driving circuit 7, 1st source lines 5a from a 1st signal line driving circuit 8a arranged on the outside of the 1st row are connected to the sources of the elements 3a, and 2nd source lines 5b from a 2nd signal line driving circuit 8b arranged on the outside of the final row are connected to the sources of the elements 3b.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention forms one substrate of an active matrix type liquid crystal display device,
The present invention relates to an active matrix substrate in which pixel electrodes arranged in a matrix are connected to scanning lines and signal lines via switching elements.

[0002]

2. Description of the Related Art FIG. 3 is a schematic configuration diagram showing an active matrix substrate and its peripheral circuits according to the prior art.
In FIG. 3, 1 is a transparent substrate, 2 is a pixel electrode formed in a matrix on the transparent substrate 1, 3 is a switching element such as a thin film transistor (TFT) arranged on the shoulder of each pixel electrode 2, and 4 is a scanning element. A gate line 5 as a line is a source line as a signal line, a gate line 4 is connected to a gate of the switching element 3, a source line 5 is connected to a source of the switching element 3, and a pixel electrode 2 is connected to the switching element 3 The active matrix substrate 6 has the above configuration. Reference numeral 7 denotes a scanning line driving circuit for supplying a pulse voltage to the gate line 4, and reference numeral 8 denotes a signal line driving circuit for supplying a signal voltage to the source line 5. A counter substrate having a transparent common electrode formed on a transparent substrate is disposed so as to face the active matrix substrate 6, and liquid crystal is sealed between the active matrix substrate 6 and the counter substrate to constitute a liquid crystal display device.

In the active matrix substrate 6, when a pulse voltage is applied from the scanning line drive circuit 7 to one gate line 4, the switching elements 3 of all the pixel electrodes 2 connected to the gate line 4 are turned on. The signal voltage output from the signal line driving circuit 8 at that timing is applied to the pixel electrode 2 via the on-state switching element 3, the pixel electrode 2 is charged by the applied voltage, and a pulse to the gate line 4 is applied. The signal voltage at the moment when the voltage is turned off is held in the pixel electrode 2. The liquid crystal is optically modulated by a potential difference between the holding voltage and the voltage applied to the common electrode of the counter substrate to perform display.

FIG. 4 is a timing chart of the output of the pulse voltage to the gate line 4. H _SYNC is a horizontal synchronizing signal, and a pulse voltage to each gate line 4 is sequentially applied every one horizontal cycle. That is, after the pulse voltage G _k-1 of the same period is applied to one horizontal period k-1-th line of the gate line, the pulse voltage G _k for the same period as the one horizontal period to the gate lines of the k-th line applied Then, the pulse voltage G _{k + 1} is applied to the ( _{k + 1) th} gate line, and the same operation is continued thereafter to display an image. The switching element connected to the gate line to which no pulse voltage is applied is turned off.

In recent years, as the market demands for larger and higher definition liquid crystal display devices, development of large and high definition liquid crystal display devices has been promoted. Large liquid crystal display
As the definition becomes higher, the period during which the pulse voltage is applied to the gate line greatly affects the display quality. That is, as the size and definition of the liquid crystal display device increase, the resistance of the gate line increases, the cross capacitance between the gate line and the source line increases, and the waveform of the pulse voltage applied to the gate line increases. Is distorted. For this reason, the period during which the TFT as a switching element is completely turned on is shortened. Further, as the definition of the liquid crystal display device becomes higher, the period of the pulse-like voltage applied to the gate line / source line becomes faster. Especially when the cycle of the pulse voltage applied to the gate line becomes faster,
The period during which the TFT is on is shortened. In the conventional active matrix substrate as described above, T
The ON period of the FT (the charging time for the pixel electrode) is determined by the width of the pulse voltage applied to the gate line. Further, an increase in the cycle means that the ON period of the TFT is directly shortened. As described above, when the ON period of the TFT is shortened, the liquid crystal cannot be completely charged. Therefore, there is a problem that display contrast is reduced, display unevenness is caused, and display quality is reduced.

In order to solve this problem, Japanese Patent Application Laid-Open No. 63-92928 and Japanese Patent Application Laid-Open No.
Techniques disclosed in 8676, JP-A-7-56544, JP-A-7-98461, and the like are considered.

[0007]

However, according to the conventional method, a difference in load such as a source line resistance and a parasitic capacitance (for example, a cross capacitance) between a pixel electrode close to the output terminal of the signal line driving circuit 8 and a pixel electrode far from the output terminal of the signal line driving circuit 8 is considered. Thus, the charged voltage value varies, and the display of the liquid crystal display device causes a luminance and contrast gradient, and the display quality deteriorates. That is, when a signal voltage is input from the upper region to the lower region of the display unit of the liquid crystal display device via the source line 5 and a solid screen of a certain gradation is displayed as a display screen, The brightness is higher on the upper side of the display screen and decreases as it goes on the lower side. With the screen size and resolution of the conventional liquid crystal display device, there was little effect on the display quality because the luminance difference etc. were small and inconspicuous, but as the LCD screen became larger and higher definition, the display quality was affected. It is coming out. That is, the resistance of the source line and the cross capacitance between the source line and the gate line increase as in the case of the gate line in the related art. For this reason, there is a large difference in load between a pixel near and far from the output terminal of the signal line driving circuit of the source line. FIG. 5 shows the waveform of the charging voltage for the pixel electrode in a plurality of lines.

FIGS. 5A to 5C respectively show that the signal voltage output from the signal line driving circuit 8 to the source line 5 is one.
The waveform of the charging voltage when applied to the pixel electrode of the line, the n / 2th line, and the nth line is shown. Here, the total number of gate lines 4 is n. It is assumed that the waveforms of the signal voltages on which these charging voltages are based are all rectangular waves having the same level and the same time width. The downward arrow indicates the timing of turning off the gate pulse voltage. As shown in (a), the charging voltage S ₁ to be applied to the pixel electrode of the first line by the rectangular wave signal voltage output from the signal line driving circuit 8.
Becomes almost undistorted waveform since the first line is closer to the signal line driving circuit 8, the holding voltage in the off timing of the gate pulse voltage becomes V _1. Charging voltage S ₂ a signal voltage having a rectangular wave output from the signal line driving circuit 8 is to be applied to the n / 2-th line of the pixel electrode as shown in (b) is, n / 2-th line signal a waveform slightly strained since slightly away from the line drive circuit 8, the holding voltage in the off timing of the gate pulse voltage is V _2. Charging voltage S ₃ a signal voltage having a rectangular wave output from the signal line driving circuit 8 is to be applied to the pixel electrode of the n-th line as shown in (c) is, n-th line is the signal line driving circuit 8 It becomes considerably distorted waveform because sufficiently far from the voltage held in the off timing of the gate pulse voltage is V _3. A _{V 1> V 2> V 3} . That is, in the state where a solid screen of a certain gradation is displayed on the liquid crystal display device, the luminance is caused by the difference in the holding voltage due to the difference in the number of pixel electrode lines (the difference in the number of lines away from the first line). There is a problem that unevenness occurs and display quality is reduced.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above problems and to provide an active matrix substrate suitable for a large-sized and high-definition liquid crystal display device having excellent display quality.

[0010]

The active matrix substrate according to the present invention has the following configuration. That is, a plurality of pixel electrodes are arranged on a transparent substrate in a matrix of vertical and horizontal directions, and two first switching elements and two second switching elements are arranged for each pixel electrode in the immediate vicinity of each pixel electrode. The pixel electrode is connected to the first and second switching elements corresponding to the pixel electrode. One scanning line each connected to the scanning line driving circuit has one
A scanning line of each row is arranged for each pixel electrode of the row, and is connected to the first and second switching elements of all the pixel electrodes of the corresponding row. 1 each connected to a first signal line drive circuit arranged outside the pixel electrode of the first row
A first signal line is provided for each pixel electrode in each column. Further, one second signal line connected to each of the second signal line driving circuits disposed outside the pixel electrodes in the last row is disposed for each pixel electrode in each column. Then, the first signal line of each column is connected to the first switching element of every pixel electrode of the corresponding column, and the second signal line of each column is connected to the second switching of all the pixel electrodes of the corresponding column.
Are connected to the switching element.

Although the signal voltage of the signal line decreases as the distance from the signal line drive circuit increases, the row of the pixel electrode in an arbitrary row increases as the row becomes farther from the first signal line drive circuit. It is close to the line drive circuit, and its row is the first
The closer to the signal line drive circuit, the farther the row is from the second signal line drive circuit, so that all pixel electrodes are charged on average with substantially the same signal voltage. In addition, when viewed from each of the first signal line driving circuit and the second signal line driving circuit, the load on the pixel electrode is reduced by half, so that the charging speed is increased and the response of driving the liquid crystal can be improved.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of an active matrix substrate according to the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a schematic configuration diagram showing an active matrix substrate and its peripheral circuits according to an embodiment of the present invention. A plurality of pixel electrodes 2 are arranged in a matrix of vertical and horizontal directions on a transparent substrate 1 such as a glass substrate, and a first switching element (TF
T; thin film transistor) 3a, a second switching element (TFT) 3b is arranged at the upper right shoulder, and each pixel electrode 2, each first switching element 3a, and each second
Are connected to the drain of the switching element 3b, and a plurality of gate lines 4 as scanning lines wired in parallel along the horizontal direction above the pixel electrodes 2 on the transparent substrate 1 are respectively connected to the first and the second. 2 switching elements 3a, 3
b, and each of a plurality of first source lines 5a as signal lines wired in parallel in the vertical direction on the left side of each pixel electrode 2 on the transparent substrate 1
And a plurality of second source lines 5b wired in parallel along the vertical direction on the right side of each pixel electrode 2 are connected to the sources of the respective second switching elements 3b. The active matrix substrate 6 has the above configuration.

Each output terminal of the scanning line drive circuit 7 is connected to each gate line 4. Further, a first signal line drive circuit 8a is arranged outside the pixel electrodes in the first row, and
Each output terminal of the signal line drive circuit 8a is connected to each first source line 5a, and the second signal line drive circuit 8b is arranged outside the pixel electrode in the last row, and the second signal Each output terminal of the line drive circuit 8b is connected to each second source line 5b.

A counter substrate having a transparent common electrode formed on a transparent substrate is disposed so as to face the active matrix substrate 6, and a liquid crystal is sealed between the active matrix substrate 6 and the counter substrate to constitute a liquid crystal display device. ing.

When a pulse voltage is applied from the scanning line driving circuit 7 to the first gate line 4, the first and second switching elements 3a and 3b of all the pixel electrodes 2 arranged in the first line are turned on. The ON state is maintained over the time width of the applied pulse voltage, and at this timing, the signal voltages output from the first and second signal line driving circuits 8a and 8b are turned on by the switching elements 3a and 3b in the ON state.
Is applied to the pixel electrode 2 on the first line via the gate line, and the pixel electrode 2 is charged by the signal voltage. Then, the signal voltage at the moment when each of the switching elements 3a and 3b is turned off is held in the pixel electrode 2. Since the first signal line drive circuit 8a and the second signal line drive circuit 8b have the same output characteristics, the signal voltages output from the two signal line drive circuits 8a and 8b are level-wise in terms of timing. However, since the first signal line drive circuit 8a is sufficiently close to the pixel electrode 2 of the first line, the signal voltage from the first signal line drive circuit 8a is Is applied with almost no distortion. Conversely, the signal voltage from the second signal line driving circuit 8b is one line because the distance from the second signal line driving circuit 8b to the pixel electrode 2 on the first line is sufficiently large. It is applied to the eye pixel electrode 2 in a considerably distorted state. In this way, for the pixel electrode 2 on the first line, the signal voltage from the first signal line driving circuit 8a with almost no distortion and the signal voltage from the second signal line driving circuit 8b are considerably distorted. Applied simultaneously.

After the first line, a pulse voltage is applied from the scanning line drive circuit 7 to the second gate line 4 for a certain time width, and all the switching elements 3a and 3b in the second line are turned on. At that timing 2
The signal voltage for the line is set to both signal line drive circuits 8a and 8
b. Below, 3rd line, 4th line
The same operation is performed on the nth line, and an image is displayed on the liquid crystal display device by repeating the above operation from the first line to the nth line.

FIG. 2 shows waveforms of signal voltages applied to some pixel electrodes. 2A to 2C respectively show the first signal line driving circuit 8a to the first source line 5a.
The signal voltage output to the first line, the n / 2 line,
FIG. 2D shows waveforms of the charging voltage when applied to the pixel electrode on the n-th line, and FIGS. 2D to 2F are output from the second signal line driving circuit 8b to the second source line 5b, respectively. The waveform of the charging voltage when the signal voltage is applied to the pixel electrodes on the first line, the n / 2th line, and the nth line is shown.
It is assumed that the waveforms of the signal voltages on which these charging voltages are based are all rectangular waves having the same level and the same time width. The downward arrow indicates the timing of turning off the gate pulse voltage.

First, the signal voltage output from the first signal line drive circuit 8a will be considered. In this case, it is assumed that there is no signal voltage from the second signal line drive circuit 8b. As shown in (a), the first signal line drive circuit 8a
Charging voltage S ₁ of the signal voltage of the rectangular wave is to be applied to the pixel electrode of the first line output from almost undistorted waveform since the first line is closer to the first signal line driver circuit 8a And the holding voltage at the off timing of the gate pulse voltage becomes V ₁ . As shown in FIG.
Charging voltage S ₂ of the signal line a signal voltage having a rectangular wave output from the drive circuit 8a of the be applied to the n / 2-th line of the pixel electrodes, n / 2-th line is the first signal line driver circuit a waveform slightly strained since slightly away from 8a, the holding voltage in the off timing of the gate pulse voltage is V _2. V ₂ <V ₁ . Charging voltage first signal voltage of the signal line square wave output from the drive circuit 8a, as shown in (c) is to be applied to the pixel electrode of the n-th line S ₃ is, n-th line is the first It becomes considerably distorted waveform because sufficiently distant from the signal line drive circuit 8a of the holding voltage in the off timing of the gate pulse voltage is V _3. V ₃ <V ₂ .

Next, the signal voltage output from the second signal line drive circuit 8b will be examined. In this case, it is assumed that there is no signal voltage from the first signal line drive circuit 8a. As shown in (f), the second signal line drive circuit 8b
The charging voltage S _{6, which} is applied to the pixel electrode on the n-th line, is a waveform having almost no distortion since the n-th line is close to the second signal line driving circuit 8b. And the holding voltage at the off timing of the gate pulse voltage becomes V ₁ . As shown in FIG.
The charging voltage S ₅ which signal line signal voltage having a rectangular wave output from the drive circuit 8b of the be applied to the n / 2-th line of the pixel electrodes, n / 2-th line and the second signal line driver circuit a waveform slightly strained since slightly away from 8b, the holding voltage in the off timing of the gate pulse voltage is V _2. Charging voltage S ₄ to the second signal voltage of the signal line square wave output from the drive circuit 8b is to be applied to the pixel electrode of the first line as shown in (d) is the first line and the second It becomes considerably distorted waveform because sufficiently distant from the signal line driver circuit 8b, the holding voltage in the off timing of the gate pulse voltage is V _3. Voltage V ₂ of the intermediate and the difference between the voltage V ₃ of differential and lower the voltage V ₁ of the upper are substantially equal. That is, V ₁ −V ₂ = V ₂ −V ₃ .

[0021] In practice, one for the line of the pixel electrode is charged voltage S ₄ and at the same time the application of the charging voltage S ₁ (d) and of (a), the average holding voltage (V ₁ + V ₃₎
/ 2 = a V _2. For the pixel electrode on the n / 2th line, the charging voltage S ₂ in (b) and the charging voltage S _{5 in} (e) are applied.
Are simultaneously applied, and the average holding voltage is (V ₂ +
V ₂ ) / 2 = V ₂ . Also, the charging voltage S ₃ of (c) and the charging voltage S of (f) are applied to the pixel electrode on the n-th line.
₆ are applied simultaneously, and the average holding voltage is (V ₃
+ V ₁ ) / 2 = V ₂ . Generally the voltage held by the first signal line driver circuit 8a for the i-th line of the pixel electrode is V _i, when the voltage held by the second signal line driver circuit 8b and _{V i ', V i = V} 1 - _{(V 1 -V 3) · i} / n V i '= V 1 - (V 1 -V 3) · a (n-i) / n, the average holding _{voltage, (V i + V i'} ) _{/ 2 = {2V 1 - (} V 1 -V 3)} /
2 = V ₂ , and the average holding voltage is V ₂ for the pixel electrodes on any line. That is, in a state where a solid screen of a certain gradation is displayed on the liquid crystal display device, the luminance is the same in any line, and a uniform display state without unevenness can be obtained.

As described above, the function of canceling the difference in the holding voltage due to the difference in the number of lines of the pixel electrode (the difference in the number of lines from the first line) is provided by the signal line driving circuit 8.
a, 8b, which applies regardless of how the level of the signal voltage changes in accordance with the display gradation, so that the quality is uniform without being affected by the difference in the number of lines of the pixel electrodes. Can be displayed. In addition, when viewed from each of the first signal line driving circuit 8a and the second signal line driving circuit 8b, the load on the pixel electrode is halved, so that the charging speed is increased, and the response of the liquid crystal driving is improved. it can.

[0023]

According to the present invention, a uniform signal voltage can be charged to all the pixels, and at the same time, the charging speed to the liquid crystal is increased. It is possible to eliminate both the deterioration of the display quality due to the variation of the charged voltage value and the deterioration of the display quality due to insufficient charging of the pixel electrodes. Therefore, a high-quality large-sized and high-definition liquid crystal display device can be realized.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram showing an active matrix substrate and its peripheral circuits according to an embodiment of the present invention.

FIG. 2 shows a signal voltage output from a first signal line driving circuit to a first source line, a first line, an n / 2 line,
The waveform of the charging voltage applied to the pixel electrode on the n-th line and the signal voltage output from the second signal line driving circuit to the second source line are the first line, the n / 2th line, and the nth line. Operation explanatory diagram showing the waveform of the charging voltage when applied to the pixel electrode of the eye

FIG. 3 is a schematic configuration diagram showing an active matrix substrate and its peripheral circuits according to a conventional technique.

FIG. 4 is a timing chart of outputting a pulse voltage to a gate line.

FIG. 5 is a waveform of a charging voltage applied to each pixel electrode on the first line, the n / 2th line, and the nth line according to the signal voltage of the same source line.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Transparent substrate 2 ... Pixel electrode 3a ... 1st switching element 3b ... 2nd switching element 4 ... Gate line 5a ... 1st source line 5b ... 2nd source line 6 ... Active matrix substrate 7 ... Scan line drive circuit 8a First signal line drive circuit 8b Second signal line drive circuit

Claims (2)

[Claims] 1. A plurality of pixel electrodes are arranged in a matrix of length and width on a transparent substrate, and two first switching elements and two second switching elements are arranged for each pixel electrode in the immediate vicinity of each pixel electrode. Each pixel electrode is connected to the first and second switching elements corresponding thereto, and one scanning line connected to the scanning line driving circuit is arranged for each pixel electrode in one row. Are connected to the first and second switching elements of all the pixel electrodes in the corresponding row, and are connected to a first signal line drive circuit arranged outside the pixel electrodes in the first row. One first signal line is arranged for each pixel electrode in each column, and one first signal line is connected to a second signal line driving circuit arranged outside the pixel electrode in the last row. Two signal lines are each one column of pixel electrodes The first signal line of each column is connected to the first switching element of every pixel electrode of the corresponding column, and the second signal line of each column is connected to the first switching element of every pixel electrode of the corresponding column. An active matrix substrate connected to the second switching element; 2. The active matrix substrate according to claim 1, wherein the first and second switching elements are constituted by thin film transistors.