JPH11133113A - Simulator for ic testing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To simulate all functions of an IC testing device by simulating the functions of setting of test conditions and display of test situations that the IC testing device has on a computer other than the IC testing device. SOLUTION: In the case of executing an IC test, test conditions ate set by an IC test control monitoring device C3, and start of a test is generated. The test conditions are transferred through a data delivery mail box to a simulator main process A by a transfer part C1. The simulator main process A conducts the test based on the given test conditions. As the test is started, and when test situations are changed, the simulator main process A transfers that through the data delivery mail box to a control monitoring process C. The control monitoring process C accepts this information by a test situlation information accepting part C2 to display it in the control monitoring device C3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a processing method for simulating a function of an IC test apparatus of a model different from a computer on which the IC test apparatus originally operates, and to an apparatus therefor.

[0002]

2. Description of the Related Art Hitherto, in the development and improvement of a control program and an IC test program for an IC test apparatus, the IC test apparatus itself or a simulator of the IC test apparatus is used to confirm and guarantee the operation. Was. However, this simulator does not have the functions of the test condition setting device and the test status display device of the IC test device.

[0003]

A simulator which does not have a test condition setting device and a test status display function of this conventional IC test device is used to set test conditions and to provide information on test status. In order to obtain, each command had to be entered, and the test took time. In addition, since the conventional simulator cannot check the operation of the test condition setting device and the control of the test status display device supported by the control program of the IC test device, the IC test device itself is required to check the operation. It became.

[0004]

In order to achieve the above object, a first aspect of the present invention is to store an IC test program in a simulator of an IC test apparatus which simulates the operation of an IC test apparatus on a computer. A management unit that operates asynchronously with the management unit, executes the IC test program, and operates asynchronously with each of the management unit and the execution unit.
A control unit for instructing control of execution of the C test program. Claim 2 is Claim 1
The control unit receives the supply of the program stored in the management unit, expands the program in the virtual memory unit, and instructs the execution unit to check the IC to be inspected in accordance with the program read from the virtual memory unit. And performing the same operation apparently. According to a third aspect of the present invention, in any one of the first and second aspects, the simulator of the IC test apparatus further includes a monitor, and the monitor changes initial conditions of the test to be executed and changes during the test. And a monitor unit for displaying at least one of the set conditions, the progress of the test, and the final result of the test.

[0005]

DESCRIPTION OF THE PREFERRED EMBODIMENTS As shown in FIG. 1, a simulator for executing a program for controlling an IC test apparatus is provided.
Main part A and IC test equipment management part B for inputting and outputting IC test programs and IC test measurement data
And a control monitor C for setting test conditions and displaying test status.

The simulator main section A controls an IC test apparatus monitor A7 for displaying various data such as test results and the like, and an IC test apparatus monitor processing section A1 for displaying necessary information. An instruction decoding execution unit A2 for decoding various instructions into the CPU virtual memory unit A5 as instructions for realizing conditions necessary for an actual test operation, and a CPU memory for managing the CPU virtual memory unit A5 The management processing section A3 and the test conditions developed in the CPU virtual memory section A5 are stored in the IC test apparatus resource section A6.
And an IC test apparatus control processing unit A4 to be supplied to the control unit. And this IC test device control processing part A4
The control is performed while exchanging data with the IC test apparatus resource unit A6 that performs an operation corresponding to the operation content of the IC test apparatus to be simulated.

The control monitor C receives the test condition setting and transfers the test condition setting to the simulator main unit A, and receives the test status information from the simulator main unit A and displays it on the screen. A part C2 and a control monitor device C3 including an operation panel and the like for performing operations such as operation input by an operator are provided. An outline of a procedure for performing a simulation will be described with reference to FIG. Step F1: Reading a test apparatus control program corresponding to the test apparatus to be simulated.

Step F2: Reading a test program according to the test contents. Step F3: Setting test conditions. Step F4: Test start. Step F5: Execution of a test by simulation. Display of test status during test (F7) Step F6: Display of test results.

Next, the operation of the simulation apparatus configured as shown in FIG. 1 during simulation will be described.
Both simulator main section A and control monitor section C
In order to perform independent operations similarly to the test apparatus, they operate as follows without synchronization with each other. Step S1: First, test conditions are set from the IC test control monitor device C3. Step S2: The test condition transfer section C1 sets the input test condition in the packet. Step S3: Further, the test condition transfer unit C1 transfers the test condition to the mailbox between the control monitor unit C and the simulator main unit B by packet.

Step S4: The test conditions transferred by the packet are transmitted / received to / from the simulator / main part B via a mailbox. Step S5: Develop the received packet into the CPU virtual memory unit A5 via the command decryption execution processing unit A2. Step S6: When a test start is issued from the control monitoring device C3, the test conditions are transferred to the transfer unit C as in the case of the packet.
1 is transferred to the simulator main unit A.
Here, the IC developed on the CPU virtual memory A5
The instruction program of the test program is decoded by the instruction decoding unit A2, and data is input / output to / from the IC test device resource unit A6 via the IC test device control processing unit A4. Step S7: A test is started based on the program.

As described above, when the test is started and the test status changes (R1), the simulator main unit A
The information is set in a packet (R2), and the packet is sent from the simulator main unit A to the mailbox 2 for transmission to the control monitor process (R3). The test status information receiving unit C2 of the control monitor unit C constantly monitors the mailbox 2, and when a packet enters the mailbox, reads the packet and displays the test status information on the control monitor device C3 ( R4).

[0012]

As described above, according to the simulator of the present invention, the test condition setting device and the test status display of the IC test device can be simulated. Therefore, the operation check of the control program and the IC test program of the IC test apparatus can be performed without using the IC test apparatus.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of the present invention.

FIG. 2 is a diagram showing a flow of data transfer between a simulator main unit and a control monitor unit according to the present invention.

FIG. 3 is a diagram showing a procedure of an IC test.

[Explanation of symbols]

 A Simulator main part A1 IC test equipment monitor processing part A2 Instruction decoding execution processing part A3 CPU memory management processing part A4 IC test equipment control processing part A5 CPU virtual memory part A6 IC test equipment resource part B IC test equipment management part C control Monitor section C1 Test condition transfer section C2 Test status information receiving section C3 Control monitor S1 to S6, R1 to R6 Data transfer method between processes F1 to F7 IC test procedure

Claims (3)

[Claims] 1. A simulator for an IC test apparatus for simulating the operation of an IC test apparatus on a computer, comprising: a management unit for storing an IC test program; An execution unit that executes the test program; and a control unit that operates asynchronously with each of the management unit and the execution unit and instructs the execution unit to control the execution of the IC test program. A simulator for IC testing equipment. 2. The control unit receives a program stored in the management unit, expands the program in a virtual memory unit, and instructs an execution unit according to the program read from the virtual memory unit. 2. The simulator for an IC test apparatus according to claim 1, wherein the same operation as the IC to be inspected is performed. 3. The simulator of the IC test apparatus further comprises a monitor device, the monitor device comprising: an initial condition of a test to be executed; a condition changed during the test;
3. The simulator according to claim 1, further comprising a monitor for displaying at least one of the progress of the test and the final result of the test.