JPH11129545A - Solid scanning type optical writing device and method for driving it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To set a quantity of an exposing light whereby a gradation of image data becomes linear with respect to an image density of a recording medium by providing a driving circuit for modulating a pulse width of a driving signal applied to an optical shutter element by using a basic clock signal to modulate the quantity of the exposing light to the recording medium. SOLUTION: Optical shutter element DA00-DAff, DB00-DBff are comprised of columns A, B because of the limitation of ceramics processing and two sets of driving circuits 40 are provided corresponding to the columns A, B. A common electrode 11 is provided in a central section of each of the columns of the optical shutter elements and individual electrodes 12 which are provided in both sides thereof are connected to the driving circuits 40, respectively. Each of the driving circuits consists of an 8-bit shift register 41 for shifting image data DATA (8 bits/256 gradations) of each pixel, a latch circuit 42 for latching 8-bit data, an 8-bit counter 43 for counting the number of gradations, an 8-bit comparator 44, a gate circuit 45 and a high voltage driver 46.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a solid-state scanning optical writing apparatus having an optical shutter array made of PLZT or the like and forming a latent image on a recording medium, and a driving method thereof.

[0002]

2. Description of the Related Art Heretofore, in order to form an image (latent image) on a photographic paper, a film, or an electrophotographic photoreceptor using a silver halide photographic material, one light is emitted using an optical shutter array made of PLZT. Various optical writing devices that perform on / off control for each pixel are provided. In this type of solid-state scanning optical writing device, gradation output is performed on a recording medium by modulating the pulse width of a drive signal for each optical shutter element. The basic clock signal of the drive signal was output after being divided into an appropriate period, and the pulse width was equal.

Therefore, in the conventional solid-state scanning optical writing device, the number of gradations and the exposure amount have a linear relationship. But,
The exposure amount and the sensitivity of the recording medium do not have a linear relationship. To obtain a good image having a density corresponding to the gradation of image data, increase the number of gradations (at least 1024 gradations).
Was supported.

More specifically, in the case of silver halide photographic paper, the relationship between the exposure and the image reflection density after development is proportional to the logarithm of the exposure, as shown in FIG. Therefore, when the equally spaced basic clock signals are used, the relationship between the number of gradations and the reflection density of the image becomes an exponential function as shown in FIG. 10, and is high γ in a low gradation region and low in a high gradation region. was γ. Conventionally, this has been dealt with by performing γ correction by increasing the number of gradations, but the control was complicated.

[0005]

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide an image processing apparatus that can set an exposure amount at which the gradation of image data and the image density of a recording medium have a linear relationship even with a small number of gradations.
An object of the present invention is to provide a solid-state scanning optical writing device and a driving method capable of obtaining a good image.

In order to achieve the above object, a solid-state scanning optical writing apparatus according to the present invention provides a basic scanning signal writing device capable of setting a cycle of a basic clock signal for driving an optical shutter element in accordance with the number of gradations of image data. A clock generation circuit; and a drive circuit that modulates a pulse width of a drive signal applied to each optical shutter element using the basic clock signal, thereby modulating an exposure amount on a recording medium.

The basic clock generation circuit changes the pulse width of the basic clock signal by increasing or decreasing the frequency division ratio of the basic clock signal. By appropriately setting the period of the basic clock signal according to the number of gradations of the image data so that the output light amount matches the γ curve of the recording medium, the gradation of the image data and the reflection density of the image can be reduced with a small number of gradations. The relationship can be linear, and a good image can be obtained.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a solid-state scanning optical writing device and a method of driving the same according to the present invention will be described below with reference to the accompanying drawings.

FIG. 1 shows an optical writing head 20 for writing a full-color image on photographic paper using a silver halide photosensitive material. The optical writing head 20 generally includes a halogen lamp 21, a heat insulating filter 22, a color correction filter 23, a diffusion tube 24, an RGB filter 25, an optical fiber array 26, a slit plate 27, an optical shutter module 30, an imaging lens array 35, It is constituted by dustproof glass 36.

The light emitted from the halogen lamp 21 is
The heat rays are cut by the heat-insulating filter 22 and the light quality is adjusted by the color correction filter 23 so as to match the spectral sensitivity characteristics of the photographic paper. The diffusion tube 24 is for improving the light use efficiency and reducing the light amount unevenness. The RGB filter 25 is rotationally driven in synchronization with writing by the optical shutter module 30 described below, and changes the passing color for each line.

The optical fiber array 26 is composed of a large number of optical fibers.
They face each other via the GB filter 25. The other ends 26b are arranged in the main scanning direction indicated by the arrow X, and emit light in a line. Slit end faces 27a, 27a of slit plate 27
Is mirror-finished, and guides light emitted from the optical fiber array 26 to the optical shutter module 30 efficiently. Further, the slit plate 27 is provided with a heater (not shown) for maintaining the optical shutter chip at a constant temperature,
Temperature control is performed based on a detection result of a temperature detection element (not shown) provided in the module 30.

The optical shutter module 30 has a slit-like opening in a ceramic substrate or a PLZT
A plurality of optical shutter chips are provided to form an array, and a drive circuit 40 described below is provided alongside the array. Each optical shutter chip is formed of a number of optical shutter elements corresponding to one pixel.
As a result, only the optical shutter element corresponding to a predetermined pixel is driven. A polarizer 3 is provided before and after the optical shutter chip.
3 and an analyzer 34 are provided. As is well known, PLZT is a translucent ceramic having an electro-optic effect having a large Kerr constant, and light linearly polarized by the polarizer 33 is generated by applying a voltage to an optical shutter element. Turning on / off the electric field causes rotation of the plane of polarization,
The light emitted from the analyzer 34 is turned on / off. The gradation control is performed by configuring the drive circuit 40 so that the time (light pulse width) during which each optical shutter element passes light can be varied.

The light emitted from the analyzer 34 passes through the imaging lens array 35 and the dust-proof glass 36 to form an image on photographic paper to form a latent image. The printing paper is transported at a constant speed in a direction (sub-scanning direction) orthogonal to the main scanning direction X.

FIG. 2 shows the configuration of the drive circuit 40 for multi-value reproduction, and FIG. 3 shows its operation timing. The optical shutter elements DA00... DAff and DB00... DBff are composed of columns A and B due to restrictions on ceramic processing, and two sets of drive circuits 40 are also arranged corresponding to columns A and B.
A common electrode 11 is provided at the center of each row of the optical shutter elements, and individual electrodes 12 are provided on both sides.

Each drive circuit 40 is provided with an image data D of each pixel.
An 8-bit shift register 41 for shifting ATA (8-bit 256 gradations), a latch circuit 42 for latching 8-bit data, an 8-bit counter 43 for counting the number of gradations, an 8-bit comparator 44, a gate circuit 45,
It consists of a high voltage driver 46.

The image data DATA is supplied from a shift clock signal SCLK from the image data control units 52 on the A column side and the B column side.
The data is transferred to the shift register 41 in synchronization with the strobe signal STB. At the same time, the image data control unit 52 clears the counter 43 via the CCLK generation circuit 53, generates the clock signal CCLK, and counts up the counter 43.

The comparator 44 compares the count value of the counter 43 with the latched data, and outputs "Hi" when the latch data is large. This output is a signal having a minimum 0 pulse width and a maximum 255 pulse width. When the output of the comparator 44 is “Hi” when the gate signal GATE is “Hi”, the gate circuit 45 changes “Hi” to “L”.
If it is "o", it outputs "Lo" to the high voltage driver 46 in synchronization with the rise of the clock signal CCLK.
The voltage Vdd2 supplied from the high-voltage power supply 51 is
2 to each optical shutter element.

FIG. 4 shows more detailed timing of each signal, and D (00h)... D (ffh) shows the timing when each optical shutter element is turned on (transmitting light). In the present embodiment, the ratio of dividing the basic clock signal CCLK is gradually increased, and the pulse width is increased exponentially.

Conventionally, the basic clock signal CCLK is frequency-divided so as to have a predetermined fixed cycle, and the pulse width is equally spaced. Therefore, as shown in FIG. 10, the relationship between the number of gradations and the light output is linear, but the relationship between the number of gradations and the reflection density of the image is affected by the sensitivity of the photographic paper (see FIG. 9). As a function, an image having a density corresponding to the gradation of the image data could not be obtained.

However, in the present embodiment, the amount of light output according to the number of gradations of image data is increased exponentially by making the pulse width of the basic clock signal CCLK variable. Therefore, the relationship between the number of gradations of the image data and the reflection density of the image becomes linear as shown in FIG. 11, and a good image corresponding to the gradation of the image data can be obtained.

FIG. 5 shows a basic clock generation circuit 60A as a first example. This circuit 60A includes an address counter 61 that counts twice the number of gradations, a basic clock signal C
Non-volatile memory 62 that stores the pulse width of CLK, down counter 63 that counts the “Hi” width and “Lo” width of basic clock signal CCLK, and down counter 6
And a T-type flip-flop 64 which is toggled by the borrow signal from the T.3. In the nonvolatile memory 62, the “Hi” clock count and the “Lo” clock count of 0 to 255 gradations are recorded alternately in advance.

FIG. 6 shows the operation timing of the basic clock generation circuit 60A. When the address counter 61 is preset by a reset signal after power-on, the stop signal is set to “Hi” to stop the operation. This down signal also stops the down counter 63. By the way, FIG.
After transferring the image data DATA to the shift register 41, the image data control unit 52 latches the image data DATA with the strobe signal STB, and at the same time, outputs a start signal to the basic clock generation circuit 60A. Upon receiving the start signal, the basic clock generation circuit 60A operates the counter 6
Clear 1,63. Thus, the address counter 6
1 sets the stop signal to “Lo” and the down counter 63
Outputs a borrow signal.

In the nonvolatile memory 62, 1 is programmed to address 0, 2 is programmed to 1, 1 ... 512 is programmed to 511. Therefore, the memory 62 receiving the 0 address from the address counter 61 outputs data 1. The down counter 63 loads this data 1 by the first borrow signal and starts counting. Further, the T-type flip-flop 64 is toggled by the borrow signal, and outputs the “Hi” portion of the basic clock signal CCLK.

The address counter 61 is incremented at the falling edge of the borrow signal and outputs the next address 1. In response, the memory 62 outputs the next data 2. When the count of the down counter 63 ends and becomes 0, a second borrow signal is output. Thus, the next data 2 is loaded again, and the “Lo” time of the basic clock signal CCLK is counted. Then, at the fall of the borrow signal, the address counter 61 is incremented again. The above processing is repeated until the address counter 61 outputs 511. The address counter 61 has 511
When a borrow signal is output when is output, a stop signal is output and the basic clock generation circuit 60A is stopped. Thus, one sequence is completed. To start the next sequence, a start signal may be sent to the basic clock generation circuit 60A as described above.

In the basic clock generating circuit 60A, the data that is increased one by one is stored in the memory 62. However, in practice, an optimum value corresponding to the sensitivity of a recording medium such as photographic paper is stored. , Basic clock signal CCL
K may be set to an optimum pulse width.

FIG. 7 shows a basic clock generation circuit 60B as a second example. This circuit 60B corresponds to the circuit 6 shown in FIG.
The memory 62 of 0A is changed to a normal SRAM, and the operation is the same as that of the circuit 60A. Memory 62 '
The data can be arbitrarily rewritten by using.

FIG. 8 shows a basic clock generation circuit 60C as a third example. This circuit 60C includes the circuit 60A,
The function of the address counter 61, the down counter 63, and the flip-flop 64 of the 60B is performed by the CPU 65. ROM, R
AM can be used.

It should be noted that the solid-state scanning optical writing apparatus and the method of driving the same according to the present invention are not limited to the above-described embodiment, but can be variously modified within the scope of the invention.

[Brief description of the drawings]

FIG. 1 is a perspective view showing an optical writing head according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a driving circuit of the optical shutter element.

FIG. 3 is a timing chart showing the operation of the driving circuit.

FIG. 4 is a timing chart showing details of the operation of the driving circuit.

FIG. 5 is a block diagram showing a first example of a basic clock generation circuit.

FIG. 6 is a timing chart showing the operation of the basic clock generation circuit.

FIG. 7 is a block diagram showing a second example of the basic clock generation circuit.

FIG. 8 is a block diagram showing a third example of the basic clock generation circuit.

FIG. 9 is a graph showing the relationship between the exposure amount of silver halide printing paper and the image reflection density.

FIG. 10 is a graph showing a relationship between an output light amount and an image reflection density based on a fixed period basic clock signal.

FIG. 11 is a graph showing a relationship between an output light amount and an image reflection density based on a basic clock signal having an exponential function period.

[Explanation of symbols]

 Reference Signs List 20 solid-state scanning optical writing head 30 optical shutter module 40 driving circuit 60A, 60B, 60C basic clock generation circuit

Claims (2)

[Claims] 1. A solid-scanning optical writing apparatus that forms a latent image on a recording medium by controlling on / off of a plurality of optical shutter elements having an electro-optical effect arranged in a main scanning direction based on image data. A basic clock generating circuit capable of setting a cycle of a basic clock signal for driving the optical shutter element in accordance with the number of gradations of image data; and a driving signal applied to each optical shutter element using the basic clock signal. And a drive circuit that modulates the pulse width of the recording medium and changes the amount of exposure to the recording medium. 2. A solid-state scanning optical writing device which forms a latent image on a recording medium by controlling ON / OFF of a plurality of optical shutter elements having an electro-optical effect arranged in a main scanning direction based on image data. In the driving method, a period of a basic clock signal for driving the optical shutter element is set according to the number of gradations of image data, and a pulse width of a driving signal applied to each optical shutter element using the basic clock signal Modulating the exposure amount of the recording medium to change the exposure amount of the recording medium.