JPH05183682A - Optical signal generator - Google Patents

Abstract

PURPOSE:To use a usual frequency clock signal by transferring picture data for a time zone other than a rise time and a fall time to a control circuit so as to avoid malfunction of the control circuit due to noise. CONSTITUTION:Picture data are inputted to a picture memory from a host computer and transferred to a shift register 21 for each of area data. The transfer is implemented synchronously with a transfer clock signal DCLOCK inputted from a picture data transfer timing counter to the shift register 21. When area data are prepared, a latch strobe signal LS is inputted to a latch circuit 22, in which the area data are latched. The latched area data are inputted to one input terminal of an AND gate 24 being a component of a drive circuit 23. The transfer clock signal DCLOCK is delayed by T1, T2, T3, T4 for each area and the data are transferred for a time zone other than the rise and fall of the drive signal CL.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical signal generator, and more particularly to an optical signal generator used as an image recording head of an image forming apparatus such as a printer or a facsimile.

[0002]

2. Description of the Related Art Conventionally, as an optical shutter means of an image recording head, a substance having an electro-optical effect, particularly PLZT having a large Kerr constant, is formed into an element corresponding to one pixel, and the optical shutter elements are arranged in at least one row. Then, an optical shutter array has been proposed, and a polarizer and an analyzer are installed before and after the array. Such an optical shutter means has a fast response speed of ON / OFF operation with respect to a drive signal, and is optimal for application to a high-speed printer.

By the way, in order to reproduce multi-gradation of an image using this type of optical shutter array, one pixel (one line in the sub-scanning direction) printing period is divided into several bits, and a drive signal is generated. It has been proposed to modulate the pulse width (see Japanese Patent Laid-Open No. 2-9652). For example, 1
In order to reproduce 6 gradations, one pixel printing period is divided into 4 bits and the pulse width of the drive signal is modulated to 1: 2: 4: 8.

On the other hand, since the optical shutter element acts as a capacitor, charge current and discharge current are generated at the rising and falling edges of the drive signal, and spike noise is generated in the ground line, which causes malfunction of the logic section of the control circuit. There was a risk of Specifically, the shift register to which the image data is transferred malfunctions. In order to avoid such a malfunction due to spike noise, it is conceivable to transfer image data during the ON period or OFF period of the drive signal while avoiding the rise or fall of the drive signal. However, if the above-mentioned pulse width modulation method is adopted for multi-gradation reproduction, for example, when image data is transferred during the off period of the drive signal, the transfer clock signal will have a considerably high frequency in consideration of a large pulse width. Must be set to. On the other hand, in order to secure the transfer time, if the off period of the drive signal is set long, the duty decreases,
The required amount of light cannot be obtained.

[0005]

SUMMARY OF THE INVENTION Therefore, the object of the present invention is to
An object of the present invention is to provide an optical signal generation device by a pulse width modulation method that can avoid malfunction due to noise and can transfer image data at a normal clock frequency without lowering the duty. In order to achieve the above object, an optical signal generator according to the present invention has an optical shutter array in which a large number of shutter elements having an electro-optical effect are arranged in at least one row, and the optical shutter elements are turned on according to image data. , Driving means for turning off, pulse width modulating means for modulating the pulse width of the drive signal for driving the optical shutter element, and timing for transferring the image data to the control circuit are changed according to the pulse width of the drive signal to drive. A control means for transferring the image data to the control circuit is provided in a time zone other than the rising and falling edges of the signal.

In the above structure, a multi-tone image is reproduced by modulating the pulse width of the drive signal for driving the optical shutter element. The transfer timing of the image data is changed according to the pulse width of the drive signal, and the image data is transferred to the control circuit while avoiding the rising and falling edges of the drive signal. For example, the image data is transferred during the off period of the drive signal when the pulse width of the drive signal is small, and transferred during the on period when the pulse width of the drive signal is large.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of an optical signal generator according to the present invention will be described below with reference to the accompanying drawings. The optical signal generator is shown in FIG.
The light source 7, which is configured as an image recording head for the photosensitive drum 14 and has a reflecting mirror 6, an optical fiber array 8, a rod lens 9, an optical shutter array 11, and an image forming lens array. It is composed of 13.

The optical fiber array 8 comprises a large number of optical fibers, one end of which is bundled to form a light collecting portion 8a, which faces the light source 7. Further, the other end of the optical fiber array 8 is arranged in the main scanning direction (indicated by the arrow X) to form the emitting portion 8b. The optical shutter array 11 is formed by linearly arranging optical shutter elements made of PLZT on a glass substrate, and a polarizer 10 and an analyzer 12 are installed before and after the optical shutter element. The lens array 13 is composed of a large number of converging rod lenses, and images light on the photosensitive drum 14.

In the above structure, the light emitted from the light source 7 is condensed by the reflecting mirror 6 and emitted linearly along the main scanning direction X from the emission portion 8b of the optical fiber array 8.
This light illuminates the optical shutter array 11 via the rod lens 9 and the polarizer 10. Each optical shutter element is turned on and off based on the image data, and the element to which the voltage is applied rotates the polarization plane of the light transmitted through the polarizer 10. Then, the light transmitted through the turned-on element is transmitted through the analyzer 12, and is exposed on the photosensitive drum 14 via the lens array 13. The photoconductor drum 14 is indicated by an arrow a.
Is driven to rotate at a constant speed in the direction, and an image based on turning on and off of light is formed on the surface as an electrostatic latent image.

Now, with reference to the timing chart of FIG. 2, multi-gradation image reproduction by the pulse width modulation method and image data transfer timing will be described. Here, a case where an image is reproduced with 16 gradations of 0 to 15 will be described as an example. First, a 1-pixel (1 line sub-scanning direction) printing period is divided into areas 1 to 4, and each area 1 to 4 is divided.
1: 2: 4: 8 to the pulse width of the drive signal CL output by
Is weighted. The voltage Vd is applied to the optical shutter element while the drive signal CL is on with its own pulse width, and the optical shutter element is turned on to expose the photosensitive drum 14. Then, the drive signal CL for each area 1 to 4
An image with 16 gradations is reproduced depending on the presence or absence of.

Table 1 below shows the drive signal CL that is turned on in accordance with each gradation of 0 to 15.

[0012]

[Table 1]

Usually, in this kind of optical signal generator, the image data DATA is transferred to the shift register in synchronization with the transfer clock signal DCLOCK, and when the data of one line is completed, it is latched in the latch circuit based on the latch strobe signal LS. , The voltage Vd is applied to each optical shutter element for the ON time of the drive signal CL. In the present embodiment, one line of image data DATA is divided into four areas in the sub-scanning direction into area 1 data to area 4 data in order to reproduce multiple gradations, and the timing for transferring these area data to the shift register in advance is driven. The area width is changed according to the pulse width of the signal CL, and the area data is transferred to the shift register in a time zone other than the rising and falling edges of the drive signal CL.

That is, the area 2 data is transferred to the shift register in the time zone of the area 1 while the drive signal CL is off, and the area 3 data is driven in the time zone of the area 2 in the drive signal C.
While L is off, area 4 data is in the time zone of area 3 while the drive signal CL is off, and area 1 data of the next pixel is in the time zone of area 4 while the drive signal CL is on. To the shift register respectively. And
As transfer time period of each of the area data does not match the rise and fall of a drive signal CL, the transfer start timing, that is, if there a transfer clock signal DCLOCK T ₁ In the area 1, the area 2 T ₂ , Area 3 is delayed by T ₃ , and area 4 is delayed by T ₄ .

3 and 4 show a control circuit for performing the above control. This control circuit includes a shift register 21, a latch circuit 22, a drive circuit 23, an image data memory 31,
Pulse width modulation circuit 32, image data transfer timing counter 33, count value memory 34, address counter 3
5. It is composed of a microcomputer 36. The individual electrodes 3 (3 ₁ , 3 ₂ , ... 3 _n ) formed on one side of each optical shutter element 2 (2 ₁ , 2 _2, ... 2 _n ) are drivers 25 (25 ₁ ) that constitute the drive circuit 3. , 25 ₂ …… 2
5 _n ) and the common electrode 4 formed on the other side is grounded.

The image data is input to the image data memory 31 from a host computer (not shown) and serially transferred to the shift register 21 for each area data.
This transfer is performed by the transfer clock signal DC output from the image data transfer timing counter 33 to the shift register 21.
It is performed in synchronization with LOCK. When the area data is complete, the latch strobe signal LS is output from the counter 33 to the latch circuit 22, and the area data is latched. The latched area data is immediately input to one input terminal of an AND gate 24 (24 ₁ , 24 ₂ ... 24 _n ) forming the drive circuit 23.

On the other hand, the pulse width modulation circuit 32 is driven by the drive signal C.
The L is modulated into a pulse width weighted corresponding to each of the areas 1 to 4 and output to the other input terminal of the AND gate 24. Therefore, the drive signal CL is output to the driver 25 only from the AND gate 24 to which the image data and the drive signal are input, and the voltage Vd is applied to the individual electrode 3 of the optical shutter element 2 corresponding to the driver 25 for the on time of the drive signal CL. Only (pulse width) is applied.

The next area data is time T after the latch strobe signal LS is switched from high to low.
It is transferred to the shift register 21 with a delay of _{1 to} T ₄ . The delay times T _{1 to} T ₄ are stored in advance in the count value memory 34, and are sequentially output to the counter 33 as the count value address Am and the count value data Tm.
Address clear signal ACL from the address counter 35
R, address increment signal AINC is counter 3
3 is output. The address clear signal ACLR is output corresponding to area 1, and the address increment signal A
INC is output corresponding to areas 2, 3, and 4. When the address clear signal ACLR is input, the counter 33 reads the address Am and the data Tm and delays the output timing of the transfer clock signal DCLOCK by T ₁ . Then, the address increment signal AINC
Every time is input, the next count value address Am and count value data Tm are read, and the transfer clock signal DCL
The output timing of OCK is delayed by T ₂ , T ₃ , and T ₄ . Further, the counter 33 has a basic clock signal CLOC.
K is input.

In the present embodiment, the addresses 1 to 4 of the count value memory 34 are repeatedly read, and the transfer clock signal DCLOCK is given to each of the areas 1 to 4 for a predetermined time T _{1 to} T _4.
The next area data is delayed by just the shift register 21.
Transferred to. Further, the microcomputer 36 can rewrite the data Tm in the count value memory 34. For example, even with the same 4 bits, the pulse width ratio of the drive signal CL can be rearranged in an arbitrary order such as 1: 8: 4: 2 other than 1: 2: 4: 8. It is also possible to finely adjust the pulse width ratio and the delay times T _{1 to} T ₄ .

By the way, the driver 25 (25 ₁ , 2
5 ₂ ... 25 _n ) is composed of drive transistors Q ₁ and Q ₂ connected to the respective optical shutter elements 2 (2 ₁ , 2 ₂ , ... 2 _n ) as shown in FIG. A DC power supply 5 capable of outputting Vd is provided. The individual electrode 3 of the optical shutter element 2 is connected to the emitter of the transistor Q ₁ and the collector of the transistor Q ₂ via the diode D. The emitter of the transistor Q ₂ and the common electrode 4 are grounded.

Since the optical shutter element 2 also functions as a capacitor when the drive voltage Vd is turned on and off in synchronization with the drive signal CL, a charge current Ion and a discharge current Ioff are generated at the time of rising and falling, and FIG. The spike noise shown in is generated. If spike noise occurs during the transfer of image data, the radiation may cause the logic section of the control circuit to malfunction, and the image data may not be accurately input to the shift register 21.

However, in this embodiment, as described above, the transfer clock signal DCLOCK for transferring the area data to the shift register 21 is delayed by T ₁ , T ₂ , T ₃ , T ₄ for each area. The data is transferred during the time period other than the rise and fall of the drive signal CL. Therefore, malfunction of the logic section can be prevented in advance, and the delay times T ₁ , T ₂ , T ₃ , and T ₄ are set according to the pulse width of the drive signal CL, so that the duty is not reduced and transfer is performed. Clock signal DCLOC
There is no need to transmit K at high frequency.

The optical signal generator according to the present invention is not limited to the above embodiment, but can be variously modified within the scope of the gist thereof. For example, in the above embodiment, 1
Although it has been described that a pixel is divided into four to reproduce an image with 16 gradations, if one pixel is divided into 6 and 8 parts, an image with 64 gradations and 256 gradations can be reproduced.

[0024]

As is apparent from the above description, according to the present invention, the pulse width modulation method is adopted, the image data transfer timing is changed according to the pulse width of the drive signal, and the rising and rising edges of the drive signal are changed. Since the image data is transferred to the control circuit at times other than the falling time, malfunction of the control circuit due to noise can be avoided, and the image data can be transferred with the clock signal at the normal frequency without lowering the duty. it can.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram showing an embodiment of an optical signal generator according to the present invention.

FIG. 2 is a timing chart showing the operation of the control circuit.

FIG. 3 is a block diagram showing a part of a control circuit.

FIG. 4 is a block diagram showing another part of the control circuit.

5 is a circuit diagram showing details of the driver shown in FIG.

FIG. 6 is a waveform diagram of a voltage flowing through a ground line when a drive signal is turned on and off.

[Explanation of symbols]

2 (2 ₁ , 2 ₂ , ... 2 _n ) ... Optical shutter element 11 ... Optical shutter array 21 ... Shift register 22 ... Latch circuit 23 ... Driver circuit 32 ... Pulse width modulation circuit 33 ... Image data transfer timing counter 34 ... Count Value memory 35 ... Address counter

Claims (1)

[Claims] 1. An optical shutter array in which a large number of shutter elements having an electro-optical effect are arranged in at least one row, drive means for turning on / off the optical shutter elements according to image data, and driving the optical shutter elements. The pulse width modulating means for modulating the pulse width of the drive signal and the timing of transferring the image data to the control circuit are changed according to the pulse width of the drive signal, and the image is displayed in a time zone other than the rise and fall of the drive signal. An optical signal generation device comprising: a control unit that transfers data to a control circuit.