JPH11126239A - Electronic equipment with automatic answering device for live-line connection - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable a host to access a storage device even if an MPU freezes by outputting a ready signal showing that access to a storage means becomes ready when the storage means may be accessed or a predetermined time after a connection with the host is established. SOLUTION: A controller 103 outputs the ready signal 109 showing that preparations for memory access is completed to the host 105 when knowing that the certain time is elapsed after the host 105 and a PC card are connected and/or when the MPU 101 in the PC card allows the host 105 to access the memory 102 with an access acknowledgement signal 108. The ready signal 109 is transmitted from the controller 103 to the host 105 through a ready signal terminal 113 of a PC card connection part. Then the host 105 becomes able to access the memory 102 in the PC card through a memory access terminal 112 of the connection part and the controller 103.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to electronic equipment,
In particular, the present invention relates to an electronic device capable of hot-line connection with another electronic device and having an automatic response device for the hot-line connection.

[0002]

2. Description of the Related Art PC cards have become widespread as accessories for portable computers. A PC card is an electronic device that can be attached to and detached from a computer called a “host”. The PC card is based on the PC card standard which is an extension of the conventional PCMCIA standard, and this standard is applied worldwide.

[0003] As PC cards, for example, those that serve as interfaces for connection to the outside world, such as modems and network cards, and storage devices, such as memory cards and hard disk cards, are already in widespread use.

[0004] There are two cases in which a PC card operates independently with a built-in battery or the like, and another case in which the PC card operates by power supplied from a host at the time of connection. Depending on the type of PC card, one that operates only when connected to the host without a built-in battery, one that stores data with a built-in battery,
Some have a built-in battery and can operate independently of the host.

[0005] P
Some C cards are themselves small computers. That is, at least MPU (Mic
roProcessor Unit, a microprocessor unit), a memory, an input / output device, and a connection portion to a host, and can be operated by a built-in power supply when not connected to the host. For example, an electronic organizer, a camera, a scanner, a barcode reader, or the like can be considered. These are PC cards that can be carried and operated alone and can exchange information obtained on the go with a host. In such a PC card, the exchange of data with the host computer is often performed by the MPU built in the PC card, or is designed to be started after the MPU issues permission.

[0006] These PC cards are characterized in that both the host and the PC card can be connected to each other or disconnected from each other in a power-on state, that is, a live state in which they operate.

[0007]

However, an MPU with a built-in PC card may run out of control or fall into an infinite loop due to the following reasons.

[0008] Depletion of the battery inside the PC card.

An error in the program given to the MPU.

Changes in environmental conditions such as temperature during operation.

[0011] Physical failure of the MPU in the PC card.

Even in such a case, it is often the case that the user wants to retrieve the information stored in the PC card while on the road. However, as described above, when access to the memory in the PC card is performed via the MPU in the PC card, access to the memory itself becomes impossible.

After the MPU issues access permission to the host via the controller as described above,
There is also a technique in which the host accesses the memory via the controller. As shown in FIG. 6, a signal 605 for permitting the host 604 to access the memory 606 is sent from the MPU 601 in the PC card 607 to the controller 60.
2, the controller transmits a ready signal 603 to the host 604, and performs a memory access process from the host 604. Therefore, after the MPU 601 issues the access permission signal 605, the memory access from the host 604 is started. However, in the case of a runaway of the MPU or the like, since the above signal is not issued from the MPU, the ready signal 603 is not transmitted to the host 604 after all. Therefore, the host 604 uses the PC card 607
Cannot access the memory 606 in the inside.

If the memory of the PC card is non-volatile, P
It is sufficient to reset the C card itself, but such a measure cannot be taken when the memory is volatile. In order to reduce the cost of the PC card, it is often advantageous to make the memory volatile, so other solutions need to be found. Further, even if the memory of the PC card is nonvolatile, if the MPU itself fails, it is difficult to retrieve information from the memory.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has at least a storage device such as an MPU and a memory, a controller, and a connection portion with a host, and a live connection with the host. It is an object of the present invention to provide a connectable electronic device such as a PC card, which can access a storage device from a host via a controller even when an MPU runs out of control.

[0016]

The invention for achieving the above object is the following invention.

According to a first aspect of the present invention, there is provided an electronic apparatus capable of hot-line connection to a host, comprising the following means.

(A) an MPU that can operate regardless of connection to a host; (b) storage means that can be accessed by the MPU; and (c) an MPU that can be connected to the host. An insertion detection terminal for outputting an insertion detection signal indicating whether or not it is connected thereto; and (d) a delay signal obtained by inputting the insertion detection signal output from the insertion detection terminal and delaying the input by a predetermined time. (E) an access permission signal output from the MPU indicating whether the host may access the storage means, and a delay signal output from the delay circuit. And if the predetermined time has passed since the connection with the host, preparation for access to the storage means is made. And (f) a controller for outputting a ready signal indicating that the storage means is not ready for access, and (f) connecting to the host. A ready signal terminal for outputting the ready signal to the host during the operation.

According to the present invention, even if the MPU runs out of control, the information stored in the internal memory of the electronic device can be retrieved to the host.

According to a second aspect of the present invention, there is provided an electronic apparatus capable of hot-line connection to a host, comprising the following means.

(A) an MPU that can operate regardless of connection to the host; (b) storage means that can be accessed by the MPU; and (c) an MPU that can be connected to the host. And (d) a delay signal obtained by inputting an insertion detection signal output from the insertion detection terminal and delaying the insertion detection signal by a predetermined time. A delay circuit for outputting, and (e) a BSY in which the MPU uses the storage means when the MPU is operating normally.
BSY output by the MPU indicating whether or not it is in a state
A signal, an RDY signal output by the MPU, indicating whether the host is in an RDY state in which the host may use the storage means when the MPU is operating normally, output by the delay circuit The delay signal and an insertion detection signal output from the insertion detection terminal, which indicates whether or not the host is connected to the host, are input to the BS.
Based on the states indicated by the Y signal, the RDY signal, the insertion detection signal, and the delay signal, are not in the BSY state and are in the RDY state and / or are not in the BSY state and are connected to the host. And, when it is determined that the predetermined time has elapsed since the connection with the host, it is informed that the state is ready for access to the storage means. A controller for outputting a ready signal indicating that the access is not ready; and
(F) A ready signal terminal that can be connected to the host and outputs the ready signal to the host while connected to the host.

According to the present invention, the above-described function can be achieved even in an electronic device in which the potentials of the connection terminals are all low when connected.

According to a third aspect, there is provided the electronic device, wherein the host can access the storage means via the controller. By adopting the controller as one means for the host to access the memory, the circuit can be shared.

According to a fourth aspect of the present invention, in the electronic device, the delay circuit includes a CR delay circuit including a resistor and a capacitor. According to the present invention, a simple and inexpensive delay circuit can be configured, and the cost of the electronic device can be reduced.

In a fifth aspect, the delay circuit comprises an oscillator,
And, from the time of connection with the host by the insertion detection signal, start counting the clock output from the oscillator, the delay signal depending on whether the number of clocks output from the oscillator exceeds a predetermined number The electronic device according to claim 1, further comprising a counter configured to output a signal.

According to the present invention, a delay circuit having a small occupied area can be formed, and the circuit inside the electronic device can be simplified.

According to a sixth aspect, in the electronic apparatus, the electronic device includes a count storage unit, wherein the predetermined count is stored in the count storage unit, and the count stored in the count storage unit is changed by the MPU or the host. The electronic device can change the predetermined time. According to the present invention, the delay time can be changed according to the situation.

According to a seventh aspect of the present invention, there is provided the electronic device, wherein the storage unit includes the number storage unit.
According to the present invention, the storage units can be put together, and the delay time can be set from both the host and the MPU.

According to an eighth aspect of the present invention, in the electronic device, a clock output from the oscillator is used as an operation clock of the MPU.

According to the present invention, the manufacturing cost can be reduced by sharing the oscillator.

[0031]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below. In the following, a PC is used as an electronic device according to the present invention.
The card will be described as an example, but this does not limit the scope of the present invention. In particular, in the following description, various signals will be described as low active or high active as examples, but it is possible to appropriately change which of H / L is active within the scope of the present invention.

The PC card according to the present invention comprises an MPU 101, a memory 102, a controller 103,
The circuit includes a delay circuit 104 and a connection unit with the host 105. A portion 120 surrounded by a dotted line in FIG. 1 is a PC card. The connection with the host 105 is the insertion detection signal 1
06, an insertion detection signal terminal 110 that outputs 06, a host 105
A ready signal terminal 113 for outputting a ready signal 109 to the
And a memory access terminal 112 for processing access from the host 105 to the memory 102. Access to the memory 102 by the host 105 is performed via the controller 103.

The MPU 101 is connected to the controller 103 via an access permission signal line. When the MPU 101 is operating normally, the access permission signal 1 indicating whether or not the memory access from the host 105 is permitted.
08 is transmitted via the access permission signal line. The access permission signal 108 can be expressed as a signal having the following two bits.

BSY signal. MPU 101 is memory 102
Indicates whether or not the BSY state is used.

RDY signal. The host 105 is the memory 102
Indicates whether or not the device is in the RDY state, in which may be used.

Therefore, if "RDY state and BS
If it is not "Y state", the memory access by the host 105 is permitted. However, during an MPU runaway or the like, these signals are generally in a state of "not in the RDY state and not in the BSY state".

The connection portion with the host 105 includes the host 10
5 and an insertion detection signal terminal 110 for receiving an insertion detection signal 106 transmitting that the PC card is connected. P
In the C card, power may be supplied from the host 105 at the time of connection since the card itself may not have power. This power supply terminal (pin 17 in PC card standard, 51
Insertion of the input for the Vcc pin No.
Can be used as

The delay circuit 104 to which the insertion detection signal 106 output from the insertion detection signal terminal 110 is input, outputs a delay signal 107 obtained by delaying this signal by a predetermined time to the controller 103. With a PC card operating at 5 V, it takes 20 msec for the signal at the connection to stabilize.
Therefore, the delay time in this case is preferably about 40 msec. The delay time can be changed according to the type of the device.

The controller 103 controls the delay signal 10
7 and the access permission signal 108 are received as inputs. In some embodiments, the insertion detection signal 1
06 is also input. Logic is provided in the controller, and this logic is used when the delay signal 107 indicates that a certain period of time has passed since the connection between the host 105 and the PC card and / or the access permission signal 108
When the MPU 101 in the PC card permits access from the host 105 to the memory 102,
A ready signal 109 for notifying the host 105 of the completion of the memory access preparation is output. The ready signal 109 is transmitted from the controller 103 to the host 105 via the ready signal terminal 113 of the PC card connection unit. The ready signal terminal 113 is connected to the R
This corresponds to the 16th pin of the EADY signal.

After the ready signal 109 indicates that the preparation for access to the memory 102 in the PC card has been completed, the host 105 sends the signal to the memory 102 in the PC card via the memory access terminal 112 of the connection unit and the controller 103. Be able to access.

FIG. 2 is a timing chart of these signals. The relationship between each signal and the potential H / L is as follows.

The insertion detection signal 106 is H when connected, and L when disconnected.

The delay signal 107 is a signal obtained by delaying the insertion detection signal 106 for a predetermined time.

The BSY signal is H when the MPU is using the memory, and L otherwise. L in most cases in case of MPU runaway.

The RDY signal is high when memory access by the host is allowed, otherwise it is low. L in most cases in case of MPU runaway.

The ready signal 109 is H when the preparation for access from the host is completed, and L otherwise.

In a PC card, when not connected to a host, the potential of a terminal at a connection portion is generally low.
In many cases, all terminals are set to L except for active terminals (enabled by L). This prevents the signal line from the connection terminal to the controller from floating, and
In order not to be destroyed and not to be destroyed by static electricity.

Therefore, it is natural to associate the relationship between logic and H / L as described above. However, it is easy for those skilled in the art to design a circuit when these correspondences are changed, and such a changed circuit is also included in the scope of the present invention.

FIG. 3 shows an example of the logic included in the controller 103. The configuration of this logic is as follows.

BSY signal 311 and RDY signal 310
Is stored in a register such as a flip-flop, that is, a BSY bit 301 and an RDY bit 302. The output of this register is combined with the insertion detection signal 308 and the delay signal 309 to generate a ready signal 307.

The inverter element (hereinafter referred to as “INV element”) 303 receives the output of the BSY bit 301,
It outputs whether or not “not BSY”.

The AND element 304 outputs the insertion detection signal 30
8. The delay signal 309 and the output of the INV element 303 are received, and whether or not “connected, delay time has elapsed since connection, and not BSY” is output.

The AND element 305 receives the output of the RDY bit 302 and the output of the INV element 303 and outputs "R
DY and not BSY. "

The OR element 306 receives the outputs of the AND elements 304 and 305 and outputs the OR of these signals to the ready signal 3
07 is output.

During normal operation of the MPU (FIG. 2A), if access by the host becomes possible, the AND element 305 outputs H. On the other hand, during abnormal operation of the MPU (FIG. 2B), the AND element 304 outputs H. Therefore, in any case, the ready signal 3
As H is output as 07, the host can access the memory 102 in the PC card via the connection unit and the controller. In any of the above cases, the ready signal 307 becomes L.

FIG. 4 shows a resistor 401 and a capacitor 402.
1 shows a delay circuit 405 according to the present invention.
This circuit is a delay circuit including a CR circuit, and outputs a delay signal 404 obtained by delaying the input from the insertion detection signal 403. Since the CR circuit has a simple circuit configuration and is inexpensive, it is useful for reducing the cost of the PC card of the present invention.

FIG. 5 shows a counter 501 and an oscillator 502.
3 shows the delay circuit 506 according to the present invention. MPU
In general, a PC card provided with an oscillator includes an oscillator, so that the oscillator 502 in the delay circuit and the oscillator used in the MPU or the like can be shared. For example, a counter that operates as follows can be used as the counter 501.

When not connected, L is output as the delay signal 504.

When the connection is detected by the insertion detection signal 503, the internally stored number is reset to 0 and the delay signal 5
L is output as 04.

During connection, the clock 505 output from the oscillator 502 is counted and the number stored therein is increased by one.

When the internally stored number reaches a certain value, the delay signal 50 is thereafter used until the connection is disconnected.
As H, H is output.

When the connection is disconnected, L is output as the delay signal 504.

Since it is generally difficult to reduce the size of the capacitor, the counter has the advantage that the size occupied by the required circuit can be reduced as compared with the CR circuit.

[0064]

As described above, according to the present invention, a PC including at least a storage device such as an MPU and a memory, a controller, and a connection portion to a host, and capable of live connection with the host. In an electronic device such as a card, it is possible to provide an electronic device capable of accessing a storage device from a host via a controller even when the MPU runs out of control. According to the present invention, when the MPU goes out of control, the host can access the memory after a lapse of a certain period of time from the connection. For example, valuable information in an electronic device such as a PC card that can store information alone can be obtained. Information can be extracted.

In the above description, a PC is used as the electronic device.
Although a personal computer is used as a host for the card, if any of a plurality of computers can be interconnected in an operating state, these computers should be adopted as the electronic device and the host, respectively, and the present invention should be applied. Is also possible.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram showing an embodiment of the present invention.

FIG. 2 is an explanatory diagram showing a timing chart of the present invention.

FIG. 3 is an explanatory diagram showing an embodiment of the logic of the present invention.

FIG. 4 is an explanatory diagram showing an embodiment of a delay circuit according to the present invention using a CR circuit.

FIG. 5 is an explanatory diagram showing an embodiment using a counter of the delay circuit of the present invention.

FIG. 6 is an explanatory diagram illustrating a configuration of a conventional electronic device.

[Explanation of symbols]

 101 MPU 102 Memory 103 Controller 104 Delay circuit 105 Host 106 Insertion detection signal 107 Delay signal 108 Access permission signal 109 Ready signal 110 Insertion detection signal terminal 112 Memory access terminal 113 Ready signal terminal 120 PC card 301 BSY bit 302 RDY bit 303 Inverter element 304 AND element 305 AND element 306 OR element 307 Ready signal 308 Insertion detection signal 309 Delay signal 310 RDY signal 311 BSY signal 401 Resistance 402 Capacitor 403 Insertion detection signal 404 Delay signal 405 Delay circuit 501 Counter 502 Oscillator 503 Insertion detection signal 504 Delay signal 505 Clock 506 Delay circuit 601 MPU 602 Controller 603 Ready signal 604 E Doo 605 access permission signal 606 memory 607 PC card

Claims (8)

[Claims] 1. An electronic device which is provided with the following means and which can be hot-wired to a host. (A) an MPU that can operate irrespective of the connection to the host; (b) storage means that can be accessed by the MPU; and (c) an MPU that can be connected to and connected to the host. (D) a delay circuit that receives an insertion detection signal received by the insertion detection terminal and outputs a delay signal obtained by delaying the input by a predetermined time. (E) an access permission signal output from the MPU and indicating whether the host may access the storage means,
And when the delay signal output by the delay circuit is input and the storage means may be accessed, and / or when the predetermined time has passed since connection with the host, the storage means A controller for outputting a ready signal indicating that the access to the storage means is not ready; otherwise, the controller is connected to the host. And a ready signal terminal for outputting the ready signal to the host while being connected thereto. 2. An electronic apparatus having a live connection to a host, comprising: (A) an MPU that can operate irrespective of the connection to the host; (b) storage means that can be accessed by the MPU; and (c) an MPU that can be connected to and connected to the host. An insertion detection terminal that outputs an insertion detection signal indicating whether or not the signal is inserted, and (d) a delay that receives an insertion detection signal output from the insertion detection terminal and outputs a delay signal obtained by delaying the input by a predetermined time. (E) if the MPU is operating normally, the MP
A BSY signal output by the MPU indicating whether or not U is in a BSY state using the storage means; if the MPU is operating normally, the host can use the storage means; An RDY signal output by the MPU, indicating whether the device is in a good RDY state, the delay signal output by the delay circuit, and indicating whether the device is connected to the host;
The insertion detection signal output from the insertion detection terminal is input, the BSY signal, the RDY signal, the insertion detection signal,
And BS based on the state indicated by the delayed signal
Not in Y state and in RDY state and / or BSY
If it is not in a state and is connected to the host and it is determined that the predetermined time has elapsed since the connection with the host, it is in a state that the storage means is ready for access. Otherwise, a controller for outputting a ready signal indicating that the access to the storage means is not ready, and (f) connection with the host. A ready signal terminal for outputting the ready signal to the host during the operation. 3. The electronic device according to claim 1, wherein the host can access the storage unit via the controller. 4. The delay circuit according to claim 1, further comprising a CR delay circuit comprising a resistor and a capacitor.
4. The electronic device according to any one of items 1 to 3. 5. The delay circuit starts counting the clock output from the oscillator from the time when the delay circuit is connected to the host by the insertion detection signal, and the number of clocks output from the oscillator is determined in advance. 4. The electronic apparatus according to claim 1, further comprising a counter that outputs the delay signal depending on whether a predetermined number of times has been exceeded. 6. The electronic device comprises a number-of-times storage means, wherein the predetermined number of times is stored in the number-of-times storage means, and the number of times stored in the number-of-times storage means is changed by the MPU or the host. 6. The apparatus according to claim 5, wherein the predetermined time can be changed.
An electronic device according to claim 1. 7. The electronic device according to claim 6, wherein the storage unit includes the number-of-times storage unit. 8. The electronic device according to claim 5, wherein a clock output from the oscillator is used as an operation clock of the MPU.