JPH11121556A - Semiconductor device suitable for inspection using integrated wafer type probe card, its inspection method and the probe card - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable electrical detection as to whether a bump electrode on a probe card is pressing on a pad electrode on a wafer with pressure in a specified range, in measurement inspection using an integrated wafer type probe card. SOLUTION: A transistor 50 for load measurement is arranged under a pad electrode 46. A transistor 51 having a constitution identical to that of the transistor 50 for load measurement is arranged at a distance from the pad electrode 46. The change in the electrical characteristics of the transistor 50, which is generated when the bump electrode on the probe card presses the pad electrode 46 on the wafer is detected electrically, thereby obtaining the level of pressing against the pad electrode by the bump electrode. The transistor 51 to which a load is not directly applied functions as a reference element.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor device suitable for inspection by a probe card for wafer batch type measurement inspection, an inspection method thereof, and a probe card.

[0002]

2. Description of the Related Art In recent years, electronic devices equipped with a semiconductor integrated circuit device (hereinafter, referred to as a "semiconductor device") have been remarkably reduced in size and price, and accordingly, the size of the semiconductor device has been reduced. Also, demands for lower prices are increasing.

In general, a semiconductor device is supplied after a semiconductor chip and a lead frame are electrically connected to each other by bonding wires, and then the semiconductor chip and the lead frame are supplied in a state of being sealed with resin or ceramics, and mounted on a printed circuit board. Is done. However, due to the demand for miniaturization of electronic equipment, a method of directly mounting a semiconductor device in a state of being cut out from a semiconductor wafer (hereinafter, the semiconductor device in this state is referred to as a bare chip) on a circuit board has been developed. It is desired to supply guaranteed bare chips at a low price.

In order to guarantee the quality of bare chips, it is necessary to inspect semiconductor devices such as burn-in in a wafer state. However, since it takes a lot of time to perform one or several separate inspections on a plurality of bare chips formed on a semiconductor wafer many times, it is realistic in terms of time and cost. is not. Therefore, it is required to perform inspection such as burn-in on all bare chips in a wafer state at once.

In order to inspect a bare chip collectively in a wafer state, a power supply voltage and a signal are simultaneously applied to electrodes of a plurality of semiconductor chips formed on a semiconductor wafer,
It is necessary to operate the plurality of semiconductor chips. For this purpose, it is necessary to prepare a probe card having a very large number of probe needles (usually several thousand or more). To do so, a conventional needle type probe card has a problem in terms of the number of pins. Also can not respond in terms of price.

Therefore, there has been proposed a probe card capable of collectively contacting probe electrodes with a large number of pad electrodes on a wafer (Japanese Patent Application Laid-Open No. Hei 7-231019). According to this technique, a large number of bumps are formed on a probe card, and these bumps are used as probe electrodes.

[0007]

The above-mentioned probe card has a large number of probe electrodes, and these probe electrodes need to reliably contact the pad electrodes of the wafer to be inspected. For accurate measurement and inspection, it is necessary that the pad electrodes formed on the entire surface of the wafer are pressed with uniform weight by the probe electrodes of the probe card.

However, the area of the wafer has been increasing, and the number and density of pad electrodes formed on each chip also tend to increase. For this reason, it becomes difficult for the probe electrode of the probe card to press the pad electrode of the wafer with uniform load. If the uniform weighting of the wafer by the probe card may not be achieved even in some areas of the wafer, the measurement and inspection results cannot be trusted.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and has as its object the purpose of performing an inspection using a probe card for a wafer batch type measurement and inspection, in which a probe electrode on the probe card connects each part of the wafer. It is an object of the present invention to provide a semiconductor device having a configuration capable of electrically detecting whether or not pressing is evenly performed, a method of inspecting the semiconductor device, and a probe card used in the method.

[0010]

According to the present invention, there is provided a semiconductor device comprising:
The probe card of the wafer batch type measurement / inspection probe card has an element whose electrical characteristics change according to a load applied by a probe electrode, and a plurality of pad electrodes connected to the element.

The element may be a MOS transistor, and the electrical characteristic may be a current-voltage characteristic of the MOS transistor.

The element may have a PN junction, and the electrical characteristic may be a reverse current-voltage characteristic of the PN junction.

[0013] The element may be a piezoelectric conversion element.

[0014] The device may be arranged on a scribe lane on a wafer.

The method for measuring a semiconductor device according to the present invention is the method for measuring a semiconductor device described above, wherein a plurality of two-dimensionally arranged probe electrodes and a multi-layer wiring electrically connected to the plurality of probe electrodes are provided. With a probe card provided with a substrate, superimposed on a wafer containing a plurality of the semiconductor device,
Thereby, a step of contacting the probe electrode with the plurality of pads of the element, a step of pressing the wafer with the probe card, and electrically detecting a change in an electrical characteristic of the element caused by the pressing. Performing the steps.

[0016] Of the plurality of semiconductor devices included in the wafer, only the elements in the selected semiconductor device may be directly pressed by the probe electrodes of the probe card.

[0017] Of the plurality of semiconductor devices included in the wafer, the change in the electrical characteristic of the element in the selected semiconductor device is determined by changing the electrical characteristics of the element in a semiconductor device other than the selected semiconductor device. It may be determined based on characteristics.

[0018] Of the elements of the plurality of semiconductor devices included in the wafer, only selected elements are directly pressed by the probe electrodes of the probe card, and the electrical characteristics of the pressed elements among the elements and the pressing force. It may be compared with the electrical characteristics of the element that does not.

[0019] The probe electrode may be a bump electrode.

A conductive rubber may be provided between the probe electrode and the multilayer wiring board for electrically connecting the probe electrode to the multilayer wiring board.

[0021] The probe electrode may be formed on a thin film that is stretched while tension is applied to a rigid ring.

The probe electrode may be formed from at least a part of the wiring of the multilayer wiring board.

The probe card according to the present invention is a probe card for performing a wafer batch type measurement inspection on the semiconductor device, wherein a plurality of two-dimensionally arranged probe electrodes and a plurality of probe electrodes are provided. An electrically connected multilayer wiring board, wherein the probe electrode includes a probe electrode capable of applying a weight to the element, and a probe electrode pressing the pad electrode of the element. And probe card.

[0024] The probe electrode may be a bump electrode.

A conductive rubber may be provided between the probe electrode and the multilayer wiring board for electrically connecting the probe electrode to the multilayer wiring board.

[0026] The probe electrode may be formed on a thin film that is stretched while tension is applied to a rigid ring.

[0027] The probe electrode may be formed from at least a part of the wiring of the multilayer wiring board.

[0028]

DESCRIPTION OF THE PREFERRED EMBODIMENTS First, in order to facilitate understanding of the present invention, a description will be given of a wafer collective type measurement / inspection technique to which the present invention is applied.

FIG. 1 shows a probe card 1 which can collectively contact probe electrodes with a large number of pad electrodes on a wafer. A wafer (for example, a silicon wafer having a diameter of 200 mm) on which elements and circuits to be measured and inspected are formed is placed on a wafer tray 3 as it is without being divided into chips.
During measurement and inspection, the wafer 2 is sandwiched between the probe card 1 and the wafer tray 3. A small space formed between the probe card 1 and the wafer tray 3 is sealed from the atmosphere by a seal ring 4. The space is depressurized through the vacuum valve 5 (for example, 200
The pressure is reduced to about millitorr), so that the probe card 1 uniformly presses the wafer 2 by applying the force of the atmospheric pressure. As a result, the probe electrodes of the probe card 1 can press the pad electrodes on the wafer 2 with a uniform force over the entire surface of the wide wafer 2. In order to ensure that a large number of bumps on the probe card 1 come into contact with predetermined pad electrodes on the wafer 2, it is necessary to perform alignment between the probe card 1 and the wafer 2 with high accuracy before the contact. is there.

According to such a wafer collective type measurement / inspection technique, a large number of pad electrodes formed on the probe card 1 are formed on a large number of pad electrodes of thousands to tens of thousands or more formed on the entire surface of the wafer 2. The probe electrodes can be simultaneously and reliably contacted.

FIG. 2 shows an example of a sectional configuration of the probe card 20 of the present invention.

The probe card 20 has a multilayer wiring board 21 to be electrically connected to a measuring / inspection device.
And a polyimide thin film 22 with bumps and a localized anisotropic conductive rubber 23 provided therebetween. The localized type anisotropic conductive rubber 23 is used for the multilayer wiring board 2.
This is an elastic member that electrically connects the first electrode wiring 21b and the bump 22b of the polyimide thin film 22 with bump. FIG. 2 shows a state in which the three members 21 to 23 are separated in the vertical direction. One probe card 20 is formed by tightly fixing these members 21 to 23.

As the multilayer wiring board 21, the glass substrate 2
1a in which a multilayer wiring 21b is formed can be used. The glass substrate 21a is preferable because a glass substrate having high flatness over a wide area can be relatively easily manufactured. In addition, since the thermal expansion coefficient of glass is close to the thermal expansion coefficient of a silicon wafer, glass is particularly suitable as a material for a multilayer wiring board of a burn-in probe card.

The formation of the multilayer wiring 21b can be performed by using a known thin film deposition technique and a known patterning technique. For example, if a conductive thin film such as copper (Cu) is deposited on a glass substrate 21a by a sputtering method or the like and then the conductive thin film is patterned by a photolithography and etching process, a wiring 21b having an arbitrary pattern is formed. be able to. Different levels of wiring 21b are
1c. The interlayer insulating film 21c is formed, for example, by coating a polyimide thin film on the glass substrate 2 by a method such as spin coating.
It is obtained by forming on 1a. The multilayer wiring 21b is
A large number of bumps (probe electrodes) 22b two-dimensionally arranged in a plane are electrically connected to connection electrodes and connectors (not shown) provided in a peripheral area of the probe card 20 to provide an external inspection device or inspection. This enables electrical connection between the circuit and the probe electrode 22b.

The bumped polyimide thin film 22 is obtained, for example, as follows. First, a large number of openings (20 to 30 μm in inner diameter) are formed in a base material in which a polyimide thin film 22 a having a thickness of about 18 μm and a copper thin film
Degree). Each opening is filled with a metal material such as Ni by using a method such as electrolytic plating to form the bump 22b. If unnecessary portions of the copper thin film are removed from the polyimide thin film 22a by etching, the bumped polyimide thin film 22 as shown is obtained. The height of the bump 22b is
As an example, it is about 20 μm. The lateral size of the bump is about 40 μm. Polyimide thin film 22a
The position of the bump 22b to be formed is determined depending on the position of the pad electrode 26 formed on the wafer 25 to be measured.

In the localized type anisotropic conductive rubber 23, conductive particles 23b are arranged at a specific location in a silicone rubber sheet (about 200 μm thick) 23a, and the conduction direction (film thickness direction) ) In a chain. By interposing elastic rubber between the multilayer wiring board 21 and the bumps 22b, the bumps 22b of the probe card 20 and the wafer 25 are not affected by the steps on the wafer 25 and the warpage of the wafer 25. The contact with the upper electrode 26 can be reliably realized.

When such a probe card 20 is used for burn-in inspection, the coefficient of thermal expansion of the polyimide thin film 22a (about 16 × 10 ⁻⁶ / ° C.) and the coefficient of thermal expansion of the wafer 25 (about 3 × 10 ⁻⁶ / ° C.) ), The bump 22b on the polyimide thin film 22a during heating for burn-in.
Is shifted laterally with respect to the position of the pad electrode 26 on the wafer 25. This displacement is greater at the peripheral portion than at the central portion of the wafer 25, and normal electrical contact between the wafer 25 and the probe card 20 cannot be obtained. To solve such a problem, Japanese Patent Laid-Open No. 7-2
As disclosed in Japanese Patent Publication No. 31019, it is effective to attach a polyimide thin film 22a to a rigid ring (not shown) such as a ceramic ring having a thermal expansion coefficient close to that of a silicon wafer, and to apply a tension to the polyimide thin film 22a in advance. It is. In this case, it is better to form the bump 22b after attaching the polyimide thin film 22a to the rigid ring. This is because the position of the bump 22b is not easily shifted.

The wafer 25 is placed on a wafer tray 28. After the wafer tray 28 on which the wafer 25 is mounted is arranged at an appropriate position with respect to the probe card 20, the distance between the probe card 20 and the wafer tray 28 is reduced. As a result, the pad electrode 26 on the wafer 25 and the bump 22b of the probe card 20 make physical contact. As described above, by reducing the pressure in the sealed space between the probe card 20 and the wafer tray 28,
Each bump 22b presses the pad electrode 26 on the wafer 25 with substantially equal force. After that, the electric signal and the power supply voltage from the drive circuit and the inspection circuit (not shown)
It is supplied to the pad electrode 26 on the wafer 25 via the bump 22 of the probe card 20. In the case of the burn-in inspection, the probe card 20, the wafer 25, and the wafer tray 28 are integrally inserted into the burn-in device and heated in a state as shown in FIG.

The probe card 20, the wafer 25, and the wafer tray 28 are maintained in the state shown in FIG. 3 before and after the inspection / measurement. These members integrally hold the wafer without detaching from the probe card 20 in the wafer tray 28 in which the above-mentioned closed space is in a reduced pressure state.

When the wafer type inspection / measurement is completed,
The pressure in the closed space formed between the probe card 20 and the tray 28 is increased to restore the pressure to about atmospheric pressure. As a result, the tray 28 is separated from the probe card 20, and the wafer 25 is taken out from the inside.

An embodiment of the semiconductor device according to the present invention will be described below with reference to FIGS.

The semiconductor device shown in FIG.
9 is provided with a weight measuring element 50 formed in the same. The weight measuring element 50 is provided immediately below the pad electrode 46 and is a transistor having a normal MOS structure. The pad electrode 46 may be a normal pad electrode that performs an electric function of supplying a power supply voltage or an electric signal necessary for various electric measurements to the chip, or may be a measurement of a weight (pressure) level. (An electrode that does not exhibit an electrical function) specially provided for this purpose.

The element 50 for weight measurement includes the source / drain region 40a and the channel region 41a
Nine surface areas. Further, a gate insulating film 42a formed on the silicon substrate 49 and a gate insulating film 42
a for controlling the conductivity of the channel region 41a. Each of the source / drain regions 40a is connected to a wiring 44a. The element 50 is covered with the insulating film 45, and the pad electrode 46 is provided on the insulating film 45.

The weight measuring element 50 is connected to the pad electrode 4
6, when the probe electrode 48 of the probe card 47 presses the pad electrode 46, the probe card 48 receives a weight. The weight changes the transistor characteristics (current-voltage characteristics) of the element 50. This change is shown in FIG. FIG. 5 is a graph showing the dependence of the drain current on the gate voltage.
Shows the drain current measured without being given to
Curve B shows the drain current measured with weight applied to device 50. In each case, the same voltage (for example, 5 volts) is applied to the drain electrode.

As shown in FIG. 5, when a weight is applied to the element 50, the electrical characteristics of the element 50 change. This change is caused by the increase in the threshold voltage of the device 50 due to the weight applied to the device 50. Further, the rate of change increases depending on the magnitude of the applied weight. Therefore, values representative of the electrical characteristics in advance (for example, “the magnitude of the drain current when a predetermined gate voltage and drain voltage are given”, “the magnitude of the threshold voltage”, etc.) are hereinafter referred to as “characteristics”. A value is referred to as “value”) and the weight level is determined in advance, and the weight level can be estimated from the relationship and the amount of change in the measured characteristic value.

Referring again to FIG. In the present embodiment, the weight measuring element 50 is provided immediately below the pad electrode 46, and a reference element 51 having the same structure as the weight measuring element 50 is provided at a position distant from the pad electrode 46. The reference element 51 and the weight measuring element 5
“0” is designed to show the same electrical characteristics in a state where a weight is applied. At the time of measurement by the wafer batch type probe card, since the pad electrode 46 of FIG. 4 is pressed by the probe electrode 48 of the probe card 47, the element 50 thereunder is subjected to weight, but the element 50 located at a position away from the pad 46 51 receives little weight. Therefore, a change occurs between the electrical characteristics of the two elements 50 and 51. If this change is detected by an external device via the probe card 47, the degree of weight can be determined.

In FIG. 4, transistor elements other than the weight measuring element 50 and the reference element 51 are not shown, but each transistor constituting the semiconductor integrated circuit and other circuit elements are provided on the silicon substrate 49. Needless to say.

FIG. 6 is a plan layout diagram showing an example of the arrangement of the weight measuring element 50 and the reference element 51. The weight measuring element 50 of the present embodiment includes the pad electrode 4
6, the reference element 51
Are arranged at positions away from the pad electrode 46.
FIG. 6 shows a plurality of pad electrodes other than the press pad electrode 46. The pad electrode 55 is an electrode for applying a gate potential to each gate electrode of the weight measuring element 50 and the reference element 51, and is connected to a common gate wiring 53. The pad electrode 56 is an electrode for applying a potential to each source / drain region of the weight measuring element 50 and the reference element 51, and is connected to each of the source / drain wirings 54a and 54b.

From the wiring on the probe card to the pad electrode 5
5 and 56, both devices 50 and 51 in the wafer
Of the pad electrode 46 can be known from the difference in the electrical characteristics.

In the arrangement example shown in FIG. 6, the weight measuring element 5
Although the 0 and the reference element 51 do not particularly constitute a circuit, one weight measurement circuit may be formed by combining these elements 50 and 51 with other circuit elements. For example, the weight measuring element 5
A circuit may be formed such that a voltage corresponding to the difference between the characteristic value of 0 and the characteristic value of the reference element 51 is amplified and output. Further, the pad electrode 46 in FIG. 6 is not electrically connected to a circuit element in the semiconductor device, and
Although it is formed only to receive the weight from the bump, a normal pad electrode is used as the pad electrode 46 for weight measurement.
It is also possible to use them together.

The weight measuring element 50 and the reference element 51 may be arranged in empty areas in each chip,
It may be arranged on a scribe lane of a wafer located between chips. When the elements 50 and 51 are provided in a chip, a plurality of sets of the elements 50 and 51 are provided in each chip.
May be provided, and more elements 50 may be provided than elements 51.

When measuring the characteristics of the weight measuring element 50 and the reference element 51 with the probe card, it is not necessary to measure the characteristics of all the elements 50 and 51 arranged on the wafer. For example, as shown in FIG.
The bumps on the probe card may be brought into contact only with the weight measurement element 50 and the reference element 51 at the five positions 71 to 75 of 0. Or,
Five points on one wafer (eg, position 7
1 to 75), while measuring the electrical characteristics of the weight measuring element 50, the reference element 51 is only located at one position (for example, position 73) in the wafer.
The electrical characteristics may be measured.

The weight measuring element may be provided in a region other than immediately below the pad electrode. It is preferable that the arrangement be such that the characteristic value changes most sensitively to the load (or local stress or strain due to the load) applied to the pad electrode. For this reason, if it is more responsive to the weight to arrange the element for weight measurement so that the center of the element is located at a position shifted by about several μm from the center position of the pad electrode, the weight measurement is performed at such a position. It is preferable to arrange the element for use. When the load applied to one pad electrode is relatively small, as shown in FIG.
A weight measuring element may be provided between two or more pad electrodes 48. By doing so, higher sensitivity may be exhibited as compared with the case where the weight measuring element is provided immediately below the pad electrode. In the above embodiment, MO is used as the weight measuring element.
Although an S transistor is used, another element, for example, a diode may be used. The leakage current flowing through the PN junction while applying a reverse bias to the PN junction diode having the PN junction may be measured as a characteristic value. Since the magnitude of the leak current changes due to the stress generated at the PN junction, the degree of the weight can be obtained from the value of the leak current. This takes advantage of the fact that when stress is applied to the junction, the band gap and recombination current of the semiconductor change.

A piezoelectric transducer (or a piezoresistive element) may be arranged below the pad electrode as a weight measuring element.
If a material having a large piezoresistance coefficient such as tellurium (Te) is used as the material of the piezoelectric transducer, high sensitivity can be obtained. However, the piezoelectric conversion element may be formed using silicon itself because of its easy combination with silicon-based process technology. The positive and negative of the elastic specific resistance of silicon are reversed depending on the conductivity type of the impurity to be doped. By utilizing these characteristics, a highly sensitive semiconductor gauge may be formed on a wafer.

When the semiconductor device is an integrated circuit including a bipolar transistor, a bipolar transistor may be used as the weight measuring element. The DC current gain h _FE of the bipolar transistor greatly changes due to local stress generated between the emitter and the base. By utilizing this change, highly sensitive weight measurement can be performed.

A piezoelectric element including a piezoelectric material such as BaTiO ₃ may be used as the weight measuring element, but in that case, the manufacturing process becomes complicated. For this reason, it is preferable to form a weight measurement element from the above-described transistors and diodes. In this case, it is possible to form the weight measuring element by using the step of forming the integrated circuit inside the chip, and the necessity of adding a special step is reduced.

According to each of the above embodiments, it is possible to electrically measure the local pressure level by the probe electrode of the probe card. As a result of the measurement, for example, when it is detected that the pressurization level at the central portion of the wafer is relatively low, a configuration may be adopted in which the central portion of the wafer can be further pressurized by auxiliary pressurizing means. . If the auxiliary pressurization (weight correction) is performed while performing the electric measurement of the pressurization level, the in-plane uniformity of the pressurization level can be improved with high accuracy. As a method of performing auxiliary pressurization, a rigid plate on which a plurality of piezo elements are arranged may be arranged on the probe card so that each piezo element can press the back surface of the probe card. By controlling the voltage applied to each piezo element, it is possible to finely adjust the degree to which the probe electrodes (bumps) on the probe card press each part of the wafer.

In the embodiment shown in FIG. 2, the bumps are electrically connected to the multilayer wiring board on the multilayer wiring board by using the localized anisotropic conductive rubber 23. Instead of using the anisotropic conductive rubber 23, the multilayer wiring board may directly contact the bump. Conversely, if bumps are formed on the wafer to be measured, there is no need to form bumps on the probe card side. In this case, if the tip of the localized anisotropic conductive rubber 23 of the probe card is pressed against the bump on the wafer, the wafer batch type measurement / inspection can be executed. The wiring of the multilayer wiring board may be directly contacted with the bump on the wafer without using the localized anisotropic conductive rubber 23.

[0059]

According to the present invention, since the semiconductor device is provided with an element whose electric characteristics change in accordance with the load applied by the probe electrode of the probe card for wafer-type measurement and inspection, In addition, it is possible to electrically detect whether the contact between the probe electrode and the pad electrode is performed under a normal pressing level.

When the element is a MOS transistor, the threshold voltage fluctuates depending on the weight of the probe electrode, so that the weight can be easily detected. In the case where the element has a PN junction, by measuring the reverse current-voltage characteristic of the PN junction, the degree of the load can be easily detected.

When the element is a piezoelectric element, the level of the weight can be detected with high sensitivity. When the elements are arranged on the scribe lane on the wafer, the wafer can be used efficiently.

According to the probe card of the present invention, since the probe card includes a probe electrode that can apply a weight to the element and a probe electrode that presses the pad electrode of the element, a wafer is provided for the semiconductor device. Suitable for performing batch measurement inspection.

[Brief description of the drawings]

FIG. 1 is a perspective view for explaining a wafer batch type measurement / inspection technique.

FIG. 2 is a sectional view showing a probe card and the like of the present invention.

FIG. 3 is a sectional view showing the relationship between a probe card, a wafer, and a wafer tray during measurement.

FIG. 4 is a sectional view showing a main part of the semiconductor device according to the embodiment of the present invention;

FIG. 5 is a graph showing gate voltage dependence of drain current.

FIG. 6 is a plan layout view showing an example of the arrangement of a weight measurement element and a reference element according to the embodiment of the present invention.

FIG. 7 is a plan view of a wafer showing an example of arrangement of measurement points.

FIG. 8 is a sectional view showing a main part of a semiconductor device according to another embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Probe card 2 Wafer (for example, 200 mm diameter silicon wafer) 3 Wafer tray 4 Seal ring 5 Vacuum valve 20 Probe card 21 Multilayer wiring board 21a Glass substrate 21b Multilayer wiring 21c Interlayer insulating film 22 Polyimide thin film with bump 22b Bump 23 Localized type Conductive rubber 25 Wafer 26 Pad electrode on wafer 28 Wafer tray 40a Source / drain area of weight measurement element 50 40b Source / drain area of reference element 51 41a Channel area of weight measurement element 50 41b Channel area of reference element 51 42a Gate insulating film of the weight measuring element 50 42b Gate insulating film of the reference element 51 43a Gate electrode 43b of the weight measuring element 50 Gate electrode 44a of the reference element 51 44a Weight measurement Source / drain wiring of constant element 50 b Source / drain wiring of reference element 51 45 interlayer insulating film 46 pad electrode for weight measurement 47 probe card 48 probe electrode (bump) 50 element for weight measurement 51 reference element 53 gate wiring 54a weight Source / drain wiring 54b of measurement device 50 Source / drain wiring of reference device 51 55 Pad electrode for gate 56 Pad electrode for source / drain 70 Wafer 71-75 Measurement points on wafer

Claims (18)

[Claims] 1. An element having an electrical characteristic that changes according to a load applied by a probe electrode of a wafer batch type measurement / inspection probe card, and a plurality of pad electrodes connected to the element. Characteristic semiconductor device. 2. The semiconductor device according to claim 1, wherein said element is a MOS transistor, and said electric characteristic is a current-voltage characteristic of said MOS transistor. 3. The semiconductor device according to claim 1, wherein the element has a PN junction, and the electrical characteristic is a reverse current-voltage characteristic of the PN junction. 4. The semiconductor device according to claim 1, wherein said element is a piezoelectric conversion element. 5. The semiconductor device according to claim 1, wherein said elements are arranged on a scribe lane on a wafer. 6. The method for inspecting a semiconductor device according to claim 1, wherein a plurality of probe electrodes are two-dimensionally arranged on a wafer including the plurality of semiconductor devices. A step of superimposing a probe card comprising a multilayer wiring board electrically connected to the plurality of probe electrodes, thereby contacting the probe electrodes with the plurality of pads of the element; A method for inspecting a semiconductor device, comprising: a step of pressing a wafer; and a step of electrically detecting a change in electrical characteristics of the element caused by the pressing. 7. The device according to claim 6, wherein, among the plurality of semiconductor devices included in the wafer, only the elements in the selected semiconductor device are directly pressed by the probe electrodes of the probe card. Semiconductor device measurement method. 8. A semiconductor device other than the selected semiconductor device, wherein a change in an electrical characteristic of the device in the selected semiconductor device among the plurality of semiconductor devices included in the wafer is changed by the device in a semiconductor device other than the selected semiconductor device. 8. The method for measuring a semiconductor device according to claim 7, wherein the determination is made based on the electrical characteristics of the semiconductor device. 9. An electric characteristic of a pressed element of the plurality of semiconductor devices included in the wafer, wherein only a selected element is directly pressed by the probe electrode of the probe card. 7. The method for measuring a semiconductor device according to claim 6, wherein the electrical characteristics of the element that is not pressed are compared with those of the element that is not pressed. 10. The method according to claim 6, wherein the probe electrode is a bump electrode. 11. A conductive rubber for electrically connecting the probe electrode to the multilayer wiring board between the probe electrode and the multilayer wiring board. 10. The method for inspecting a semiconductor device according to claim 9. 12. The method for inspecting a semiconductor device according to claim 11, wherein said probe electrode is formed on a thin film in which a tension is applied to a rigid ring. 13. The semiconductor device inspection method according to claim 6, wherein the probe electrode is formed from at least a part of the wiring of the multilayer wiring board. 14. A probe card for performing a wafer batch type measurement and inspection on the semiconductor device according to claim 1, wherein the plurality of probe electrodes are two-dimensionally arranged; A multi-layer wiring board electrically connected to a plurality of probe electrodes, wherein the probe electrodes include a probe electrode capable of applying a weight to the element, and a probe electrode pressing the pad electrode of the element. A probe card characterized in that 15. The probe card according to claim 14, wherein the probe electrode is a bump electrode. 16. The semiconductor device according to claim 15, further comprising a conductive rubber between said probe electrode and said multilayer wiring board for electrically connecting said probe electrode to said multilayer wiring board. Probe card. 17. The probe card according to claim 15, wherein said probe electrode is formed on a thin film that is stretched while tension is applied to a rigid ring. 18. The probe card according to claim 14, wherein the probe electrode is formed from at least a part of a wiring of the multilayer wiring board.