JPH11121528A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an area array bump type mounting structure semiconductor device, in which the generation of connection failures is reduced. SOLUTION: This area array bump mounting type semiconductor device comprises an insulation base material 32 which forms a bumping land 33 and a bonding pad, a semiconductor chip die-bonded to the insulation base material, a means for electrically connecting the semiconductor chip to the bonding pad, an opening 35 opened in response to the bumping land from a back face of the insulation base material, and a solder bump 34 jointed to the bumping land 33 via the opening. The opening has a location where a hole diameter is reduced locally, and as a results the portion in the opening of the solder bump is formed mechanically weak at the location and can be readily deformed by external stresses.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device which is finally mounted on a printed circuit board using an area array bump type mounting structure in which solder bumps are arranged in a grid.

[0002]

2. Description of the Related Art Various techniques for mounting a semiconductor device on a printed circuit board have been introduced. The mounting method is mainly determined by the terminal arrangement of electronic components such as an LSI. As the terminal arrangement of LSI etc.,
Peripheral-type terminal arrangements such as quad flat packages (QFP), in which terminals extend outward from the periphery of an LSI package, are well known.

However, in recent years, in response to the miniaturization and high-density of electronic devices, a mounting structure using a face-down solder bump that requires a relatively small area for external connection when mounting an LSI or the like is required. Is often used. In an electronic component such as an LSI having a large number of built-in gates, there are necessarily many input / output terminals. on the other hand,
Each of the bump lands (terminals) on the base material to which such solder bumps are attached requires a predetermined area. Therefore, in a mounting structure using solder bumps, a bump grid array (Bump Grid Array) configuration in which bump lands are generally arranged in a grid pattern in order to arrange a large number of bump lands on a substrate in order. Has been adopted. Such a mounting structure is also called an area array bump (Area Array Bump) type mounting structure.

FIG. 5A is a vertical partial cross-sectional view for explaining a main part of a solder bump structure of a semiconductor device according to the prior art. On an upper surface of an insulating substrate 52 such as a polyimide substrate, a plurality of bump lands 53 for attaching solder bumps are formed along with various pads and lines. On the upper surface of the insulating base material 52, a semiconductor chip (not shown) such as an LSI is die-bonded to a predetermined position using an appropriate adhesive.

[0005] If necessary, the terminals of the semiconductor chip and the bonding pads (not shown) formed on the insulating substrate 52 are electrically connected by a method such as wire bonding. Furthermore, a sealing resin 51 is applied and hermetically sealed to ensure the reliability of these electronic components. In each of the bump lands 53, a through hole (opening) 55 having a hole diameter relatively smaller than the area of the land 53 is formed from the lower surface of the insulating base material 52. In these through holes 35, solder bumps 54 are respectively formed and joined.
Specifically, the insulating base material 52 is turned upside down, the solder bumps 54 are disposed in the through holes 55, and the solder reflow process is performed to join the solder bumps 54 and the bump lands 53.

The diameter of the through hole 55 is the same throughout the thickness direction of the insulating base material 52, and therefore, the solder bump 54
The shape of the portion inside the through hole 55 is generally cylindrical. The portion of the solder bump 54 overflowing from the through hole 55 is generally spherical due to surface tension. Thus, a semiconductor device is formed.

[0007]

Conventionally, the above-mentioned area
In a semiconductor device employing an array bump type mounting structure, when the semiconductor device is mounted on a printed circuit board and attached to an electronic device or thereafter, a connection failure may occur in the area array bump type mounting structure. . The present inventor has investigated a large number of connection failures in the area array bump type mounting structure. As a result, as shown in FIG. 5B, many connection failures were found to occur between the solder bump lands 53 and the solder bumps on the semiconductor device side. It was found that a peeling phenomenon (see reference numeral 42) occurred at a bonding interface with the substrate 54, and as a result, a connection failure was found.

Further, the inventor of the present invention has found that such a peeling phenomenon at the bonding interface between the bump land 53 and the solder bump 54 can be caused, for example, by handling a semiconductor device or a printed board 61, attaching the printed board 61 to the main body of an electronic device, or the like. Semiconductor device bump forming base material 52 and printed circuit board 6
Due to the difference in thermal expansion / deformation 1, external stress applied to the printed circuit board 61 or the semiconductor device concentrates on this bonding interface, and the stress exceeds the bonding force between the solder bump 54 and the bump land 53, and as a result, It was assumed to occur.

Therefore, a portion having relatively lower mechanical strength than the bonding interface is actively formed in the semiconductor device so that these external stresses are concentrated at this portion, and furthermore, this portion is bent or deformed. It has been found that by employing a configuration capable of absorbing these external stresses, it is possible to avoid the peeling phenomenon at the bonding interface between the bump land 53 and the solder bump 54 which occurs conventionally. The present invention has been made based on such a finding.

Regarding the initial shape of the solder bump itself, the shape in the opening (in the through hole) of the base material is a cylindrical shape,
It is relatively easy to assume that the barrel portion has a relatively large diameter at the middle portion, and a narrowed shape (hourglass shape) at the middle portion.
However, the present inventor still has a portion having weak mechanical strength as a bump shape, actively forms a solder bump having a structure capable of absorbing external stress, and still mounts the semiconductor device on a printed circuit board. It is believed that a technique for maintaining a structure having low mechanical strength and absorbing external stress applied to a printed circuit board or a semiconductor device at this location is a novel invention that has never been seen before.

Accordingly, the present invention has been made in view of the above problems,
An object of the present invention is to provide an area array bump type mounting structure type semiconductor device in which occurrence of connection failure is reduced.

[0012]

In the area array bump mounted semiconductor device according to the present invention, a mechanically weak portion is formed in a part of a solder bump so that external stress is concentrated on the portion. . Such mechanically weak spots are
For example, it can be formed by setting the opening of the base material to which the solder bump is attached to a minimum hole diameter at that location.

When the minimum hole diameter is formed at the lower end in the thickness direction of the base material, the opening of the base material to which the solder bump is attached is formed such that the hole diameter gradually increases from the upper part to the lower part. May be tapered. In such a semiconductor device, the base may be formed of a flexible material, and each of the openings may be pressed to form the minimum hole diameter of the base before forming the solder bump. I can do it.

Alternatively, the minimum hole diameter may be formed at an intermediate portion in the thickness direction of the base material. The semiconductor device thus formed has a portion where the hole diameter is locally reduced in the opening formed in the base material. As a result, the portion of the solder bump in the opening is mechanically It is weakly formed. Therefore, when an external stress is applied to the semiconductor device or the printed circuit board on which the semiconductor device is mounted, the mechanically weakly formed portion easily bends or deforms to absorb the external stress, and the conventional technology is used. No separation occurs at the interface between the solder bump and the bump land as described. Therefore, it is possible to reduce the occurrence of the connection failure which has conventionally been a problem.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor device according to the present invention will be described below with reference to the accompanying drawings. The same elements shown in the drawings have the same reference characters allotted, and redundant description will be omitted. [First Embodiment] FIG. 1 shows a semiconductor device according to the present embodiment. Here, FIG. 1 (A) is a sectional view of a main part thereof, and FIG. 1 (B) is a sectional view of FIG. 3 is a partially enlarged view of the semiconductor device of FIG.

In the figure, reference numeral 32 denotes an insulating base made of a polyimide base or the like, and a bump land 3 is provided on the upper surface thereof.
3. Wire bonding pads (not shown), conductor patterns (not shown) for connecting these lands and pads, and the like are formed. Of these patterns, the bump lands 33 have a bump grid array configuration in which the bump lands 33 are arranged on the insulating base material 32 on a plane in a generally lattice-like manner, as shown in FIG. 2A.

On the upper surface of the insulating base material 32, a sealing material layer 31 is formed for sealing a semiconductor chip (not shown). Therefore, although not shown in FIG. 1A, a semiconductor chip such as an IC or an LSI is fixed and disposed inside the sealing material layer 31 with an appropriate die attaching agent. In each of the bump lands 33, an opening (through hole) 35 having a hole diameter relatively smaller than the area of the land 33 is formed from the lower surface of the insulating base material 52. Solder bumps 34 are respectively formed in the through holes 35 and are joined to the bump lands 33. In particular,
The insulating base material 32 is turned upside down, solder bumps 34 are arranged in the respective through holes 35, and solder reflow processing is performed to join the solder bumps 34 and the bump lands 33.

The feature of this embodiment is that, as shown in FIG. 1B, the hole diameter of the through-hole 35 is not constant in the thickness direction of the insulating base material 32, and the minimum hole diameter is almost at the bottom. There is a point. Therefore, the shape of the portion inside the through hole 35 of the solder bump 34 is constricted at the lower portion, and forms a portion having low mechanical strength. The portion of the solder bump 34 that overflows the through hole 35 is generally spherical due to surface tension. Thus, a semiconductor device is formed.

With such a solder bump structure, such a semiconductor device is mounted on a land pattern of a printed circuit board (not shown) positioned below the semiconductor device. As a result, a plurality of semiconductor devices and other semiconductor devices are mounted. The electronic components are electrically connected. Each of these elements will be described. The insulating base material 32 may be any insulating material capable of forming the through-holes 35, the bump lands 33, and the like by a manufacturing method described later. For example, a polyimide tape, a polyimide laminated board, NEMA standard FR-4 material (difficult (Flammable glass epoxy laminates) or the like can be used. In this embodiment, the thickness is about 40.
A polyimide tape of about 60 μm is used.

As will be described later, when each of the through holes 35 is pressed before the formation of the solder bump to partially deform the opening 35 to form a locally small hole diameter, the insulating base material 32 is It is preferable to have flexibility. In addition, as described later, when realizing a tapered hole shape due to a difference in etching rate, a plurality of insulating substrates having different etching rates are fixedly used.

The bump lands 33 are formed by solder bumps 34.
Has a predetermined size that can be joined from the back side. The bump land 33 is made of a conductive material, and has a solder wettability (solder) during a reflow process of the solder bump 34.
erability) should be good. For example, typically, copper (Cu) is formed by performing a surface treatment for maintaining solder wettability.

The sealing layer 1 maintains the reliability and environmental resistance of the internal semiconductor chip, and is therefore made of an air-tight insulating material. Typically, various sealing resins, sealing glass, and the like are used. The through-hole 35 formed in the insulating base material 32 is about 0.3 to 0.4 m at the upper end.
m, having a hole diameter of about 0.2 mm at the lower end. Through hole 3
As the method of forming 5, an optimum method is selected from various methods such as a punching method, a laser processing method, and an etching method according to the material of the insulating base material 32.

FIG. 3 (A)
When forming the tapered through hole 35 having the minimum hole diameter at the lower end as shown in (1), a tapered punch jig is used. The solder bump 34 is what is known as a solder bump structure, and is preferably made of eutectic solder that can be re-melted at a relatively low temperature during a solder bump reflow process.

The manufacturing method and overall structure of the semiconductor device according to the present embodiment will be briefly described with reference to FIG. FIG.
(A) is 1/1 of the semiconductor device on which various patterns are formed.
FIG. 4 is a plan view of a portion 4 (upper left portion), in which a die attaching agent, an LSI chip, a sealing resin, and the like are removed for easy viewing. The other portion, that is, the lower left portion of the semiconductor device is symmetric with respect to the center line CL-H, the upper right portion is symmetric with respect to the center line CL-V, and the lower right portion is symmetric with respect to the center C. Please be aware of this.

A solid line 41 indicates the outer shape of the semiconductor device.
A broken line 37 indicates the outer shape of the semiconductor chip. On the insulating base material 32, a large number of bump lands 33 are arranged in a plane and generally in a grid around a peripheral region of the outer shape of the semiconductor chip 37 in order to arrange them neatly. That is, a bump grid array configuration is employed.

Between these bump lands 33, wire bonding pads 40 are formed at appropriate positions for connecting bonding wires from the semiconductor chip 37. Further, a conductor pattern 39 connecting the bump lands 33 and the wire bonding pads 40 is formed as necessary. In addition, in another method,
A type in which the semiconductor chips 37 are connected by a flip chip method may be used. These mounting structures are called semiconductor devices having an area array bump type mounting structure.

FIG. 2B is a sectional view taken along the line BB of FIG. 2A. For convenience of explanation, the die attaching agent, LSI chip, sealing resin, etc. removed in FIG. Is drawn.
A method for manufacturing a semiconductor device having an area array bump type mounting structure is as follows. As shown in FIG. 2B, an insulating base material 32 such as polyimide is prepared. FIG.
As described in (A), typically, the bump lands 33, the wire bonding pads 40, and the conductor patterns 39 connecting these lands and pads are formed on the upper surface thereof.
Etc. are formed. Using a very thin copper-clad laminate, these patterns can be formed by etching using a known lithography method.

Laser processing, etching of the insulating base material, and punching processing (however, in the case of punching processing, first perform punching processing, After pasting the foil,
Patterning is performed by etching. )
A through hole 35 is formed. At this stage, the hole diameter of the through-hole 35 is the same vertically. However, the tapered through hole 35 may be formed in advance as described above.

If the through hole 35 is not tapered,
Each of the through holes 35 is pressed and deformed by an appropriate means to deform the insulating base material 2 at the lower end (the end opposite to the bump land) of the through hole 35, and to make the hole diameter of this portion relatively small. Deform. In this case, a cold press having a suitable parallel flat plate and a pressing jig may be used. Turn the insulating substrate 32 over,
A solder ball is placed on each through hole 35. Alternatively, a solder paste having an appropriate thickness may be applied to the position of each through hole 35 by screen printing. Thereafter, the insulating base material 32 is held in an atmosphere at a solder melting temperature for an appropriate time, and the solder is reflowed to fill the through hole 35.

The shape of the through-hole 35 whose hole diameter has been reduced as described above is maintained after the solder reflow process and further after the semiconductor device is mounted on the printed circuit board 41. Therefore, the shape inside the through hole of the solder bump 34 also
Note that this section has the smallest diameter. An electronic component such as an LSI chip 37 is die-bonded to the upper surface of the insulating base material 32 using a die attaching agent (appropriate resin). If necessary, the lead frame 41 of the electronic component such as the LSI chip 37 and the wire bonding pad 40 formed on the insulating base material 2 are wire-bonded with a bonding wire.

The bump land 3 on the insulating base material 32
3, wire bonding pad 40, conductor pattern 3
9. The LSI 37 and the like are sealed with the sealing resin 31, and heated at a resin curing temperature as needed. This semiconductor device,
The solder bumps 34 are placed on the printed circuit board 41 and are positioned and held on the lands 42 of the printed circuit board 41.
And the solder bumps 34 are connected. At this time, the shape of the through hole 35 whose hole diameter has been partially reduced is still maintained, and therefore, the shape inside the through hole of the solder bump 34 still has the minimum diameter at this portion. For example, when attaching the printed circuit board 41 to an electronic device (not shown) or thereafter,
Even if external stress is applied to the semiconductor device 1 or the semiconductor device to cause deformation such as bending or twisting, no problem such as separation between the bump land 33 and the solder bump 34 occurs. The reason is that the minimum hole diameter of the through hole 35 is at the lower end in the thickness direction of the insulating base material 32, and the diameter of the solder bump 34 at that portion is inevitably small. Therefore, external stress is concentrated on this relatively small diameter portion of the solder bump 34,
The solder bump 34 is bent or plastically deformed at this portion.
As a result, the load stress applied to the bonding interface between the bump land 33 and the solder bump 34 is greatly reduced. Therefore,
As described with reference to FIG. 5B, it is possible to significantly reduce the connection failure due to the peeling phenomenon at the bonding interface between the solder bump land 53 and the solder bump 54, which has conventionally occurred. [Second Embodiment] FIG. 3 shows a semiconductor device according to a second embodiment, in which FIG. 3A is a sectional view of a main part thereof, and FIG. 3A is a partially enlarged view of the semiconductor device of FIG.

The semiconductor device according to the present embodiment differs from the semiconductor device according to the first embodiment only in the shape of the through hole 35. That is, in the semiconductor device according to the present embodiment, the hole diameter continuously decreases from the upper end to the lower end. The method of manufacturing the semiconductor device according to the present example is different from that of the first embodiment in the step of forming the through-hole 35. As shown in FIG. 3 (B), a plurality of insulating base materials 32 whose diameters are gradually reduced are prepared in advance, and these are formed by bonding or thermocompression bonding. That is, the insulating base material 3 having the through hole having a relatively large diameter is formed.
2-1 and an insulating substrate 32-2 having a nominal diameter,
An insulating base material 32-3 having a relatively small through hole,
It is formed by bonding using an appropriate adhesive or by thermocompression bonding in the case of a thermosetting resin.

Alternatively, with respect to the etchant used for the resin constituting the insulating base material 32, the insulating base material 32-1 having a relatively high etching rate and the insulating base material 32-2 having an intermediate speed. Then, the insulating base material 32-3 having a relatively low etching rate may be bonded by using an appropriate adhesive or bonded by thermocompression bonding or the like, and then the through-hole 35 may be formed by an etching method.

Other configurations and manufacturing methods of the semiconductor device according to the present embodiment are the same as those of the first embodiment except for the matters described above.
These are the same as those according to the embodiment. According to this embodiment, when the printed circuit board 41 is subsequently mounted on an electronic device (not shown), even if external stress is applied to the printed circuit board 41 and deformation such as bending or twisting occurs, the bump land 33 and the printed circuit board 41 are not deformed. There is no problem such as peeling between the solder bumps 34. External stress on the printed board 41 or the semiconductor device is concentrated on a portion of the solder bump 34 having a relatively small diameter, and the solder bump 34 bends or plastically deforms at this portion. The load is greatly reduced. [Third Embodiment] FIG. 4 shows a semiconductor device according to the present embodiment. Here, FIG. 4A is a cross-sectional view of a main part thereof, and FIG. 3) shows a partially enlarged view of the semiconductor device of FIG.

The semiconductor device according to the present embodiment differs from the semiconductor device according to the first embodiment only in the shape of the through hole 35. That is, in the semiconductor device according to the present embodiment, the hole diameter is narrowed and reduced at the middle portion of the insulating base material in the plate thickness direction. The manufacturing method of the semiconductor device according to the present embodiment is different from that of the first embodiment in that
5 is different. As shown in FIG.
An insulating base material 32-1 having a through hole having a relatively large diameter and an insulating base material 32 having a relatively small diameter formed in advance.
-2 and an insulating substrate 32-3 having a relatively large through hole
Are bonded by using an appropriate adhesive, or are formed by thermocompression bonding in the case of a thermosetting resin.

Alternatively, the insulating base material 32-1 having a relatively high etching rate and the insulating base material 3 having a relatively low etching rate can be used for the etchant used for the resin constituting the insulating base material 32.
The through hole 35 can be formed by bonding the 2-2 and the relatively fast insulating base material 32-3 by using an appropriate adhesive or by thermocompression bonding or the like, and thereafter by etching.

Other configurations and manufacturing methods of the semiconductor device according to the present embodiment are the same as those of the first embodiment except for the matters described above.
These are the same as those according to the embodiment. According to this embodiment, when the printed circuit board 41 is subsequently mounted on an electronic device (not shown), even if external stress is applied to the printed circuit board 41 or the semiconductor device to cause deformation such as bending or twisting, the bumps for bumps may be formed. There is no problem such as peeling between the land 33 and the solder bump 34. The external stress concentrates on the central constriction of the solder bump 34 having a relatively small diameter,
The solder bump 34 is bent or plastically deformed at this portion. As a result, the load between the bump land 33 and the solder bump 34 is greatly reduced.

[0038]

According to the present invention, it is possible to provide an area array bump type mounting structure type semiconductor device in which the occurrence of connection failure is reduced.

[Brief description of the drawings]

FIG. 1 illustrates a semiconductor device according to an embodiment of the present invention. FIG. 1A is a cross-sectional view of a main part of FIG.
FIG. 1B is a partially enlarged view of the semiconductor device in FIG.

FIG. 2A is a plan view of a quarter portion (upper left portion) of a semiconductor substrate on which various patterns are formed. The resin and the like have been removed. FIG. 2 (B) is the same as FIG.
FIG. 2 is a sectional view taken along the line BB in FIG.
The die attaching agent, LSI chip, sealing resin, etc. removed in (A) are depicted.

FIG. 3 shows a semiconductor device according to the present embodiment. Here, FIG.
FIG. 3B is a partially enlarged view of the semiconductor device in FIG.

FIG. 4 shows a semiconductor device according to the present embodiment. Here, FIG.
FIG. 4B is a partially enlarged view of the semiconductor device of FIG.

FIG. 5A is a partial cross-sectional view illustrating a main part of a solder bump structure of a semiconductor device according to a conventional technique.
FIG. 5B is a diagram illustrating the cause of the connection failure.

[Explanation of symbols]

31, 51: sealing material layer, 32, 32-1, 32-2, 32
-3, 52: insulating base material, 33, 53: bump land, 34, 54: solder bump, 35, 55: through hole, 36: die attach agent, 37: LSI chip, 3
8: bonding wire, 39: conductor pattern, 4
0: wire bonding pad, 41: printed circuit board, 42: peeling part,

Claims (6)

[Claims] 1. An area array bump mounting type semiconductor device, wherein a mechanically weak portion is formed in a part of a solder bump, and external stress is concentrated on the portion.
Semiconductor device. 2. The semiconductor device according to claim 1, wherein the mechanically weak portion has a minimum hole diameter at an opening of the base material to which the solder bump is attached. 3. The semiconductor device according to claim 2, wherein an opening of the base material to which the solder bump is attached is tapered so that a hole diameter gradually increases from an upper part to a lower part. Is formed at the lower end in the thickness direction of the base material. 4. The semiconductor device according to claim 2, wherein the base has flexibility, and presses the opening to form the minimum hole diameter before forming the solder bump.
Semiconductor device. 5. The semiconductor device according to claim 2, wherein the minimum hole diameter is formed at an intermediate portion of the base material in a thickness direction. 6. An area array bump mounting type semiconductor device, comprising: an insulating base material on which bump lands and bonding pads are formed; a semiconductor chip die-bonded to the insulating base material; Means for electrically connecting the bonding pads, an opening opened from the back surface of the insulating substrate corresponding to the bump land, and a solder bump joined to the bump land via the opening. A semiconductor, wherein the opening has a portion where the hole diameter is locally reduced, and as a result, the solder bump is mechanically weakly formed at the portion and can be easily deformed by external stress. apparatus.