JPH11112238A - Fet mixer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a FET(field effect transistor) mixer by which a desired intermediate frequency signal is obtained from a radio frequency signal by receiving directly a signal outputted from an oscillator as a local oscillation signal without the use of an amplifier or a multiplier even when an applicable frequency band is a quasi-millimeter wave band. SOLUTION: A FET mixer 1 has a 1st FET 3, a 2nd FET 5, a transmission line 17, and a divider 19. Then the length of the transmission line is a half of a wavelength of a fundamental wave included in local oscillation signals SLOa, SLOb. Through the constitution above, a signal being the mixture of a secondary harmonic included in the local oscillation signal and radio frequency signals SRFa, SRFb is outputted from an intermediate frequency signal output port 29 as an intermediate frequency signal SIF.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an FET (Field E) used for a frequency conversion circuit, a frequency
effect Transistor) mixer,
FET that can convert the frequency of high-frequency signals such as millimeter waves
Regarding the mixer.

[0002]

2. Description of the Related Art In recent years, with the rapid development of satellite communication systems, the demand for FET mixers for performing frequency conversion of high-frequency signals such as millimeter waves has been increasing. Have been.

[0003] This FET mixer uses a radio frequency (hereinafter referred to as "RF") by utilizing the time change of device parameters such as the mutual conductance and channel resistance of the FET.
That. ) The signal is locally oscillated (hereinafter, referred to as “LO”).
Signal and an intermediate frequency (hereinafter referred to as "IF")
It has a function of generating a signal. And FE
Among the T mixers, those that use the mutual conductance of the FET are called active mixers, and those that use the channel resistance are called resistive mixers.

[0004] The resistive mixer is used to reduce the drain current of the FET.
Since it uses the time change of channel resistance in the linear region of the voltage characteristic,
There is a feature that distortion of the generated IF signal is small.
Further, since it is of a passive type, it can be used as a so-called up-converter that generates an IF signal having a frequency component of the sum of the frequency of the RF signal and the frequency of the LO signal, and at the same time, can be used as an IF converter having a frequency component of the difference. It can also be used as a so-called down converter that generates a signal. Since a drain bias of the FET is not required, no DC current flows to the drain, and power saving is realized. Furthermore, since the resistive mixer does not use the amplifying action of the FET, the conversion loss is slightly larger than that of the active mixer. It can be said that it is generally suitable as a frequency conversion circuit in a band.

[0005] The above-mentioned resistive mixer is, for example, composed of "
60GHz MMIC Mixer Using MESFET Tetsuo Hirota 1994 IEICE Autumn Conference C-7
8 ".

Hereinafter, a conventional resistive FET mixer 101 will be described.
Will be described with reference to FIG. The FET mixer 101 includes an FET 103 and an LO signal matching circuit 10.
5, RF signal matching circuit 107, IF signal matching circuit 10
9, gate bias circuit 111, capacitor 113, L
O signal input port 115, RF signal input port 117,
It comprises an IF signal output port 119 and a gate bias port 121.

[0007] The LO signal input port 115 is
Connected to the input of the O signal matching circuit 105;
The output of the signal matching circuit 105 is commonly connected to the gate of the FET 103 and one end of the gate bias circuit 111. Further, the other end of the gate bias circuit 111 is commonly connected to the gate bias port 121 and one end of the capacitor 113, and the other end of the capacitor 113 is connected to the ground level.

On the other hand, the drain of the FET 103 is commonly connected to the output of the RF signal matching circuit 107 and the input of the IF signal matching circuit 109. The input section of the RF signal matching circuit 107 is connected to the RF signal input port 117, and the output section of the IF signal matching circuit 109 is connected to the IF signal output port 119. Furthermore, FET10
The source No. 3 is connected to the ground level.

The operation of the conventional FET mixer 101 having the above configuration will be described in detail. First, FET10
A bias voltage Vg near the threshold value of 3 is applied to the gate bias port 121.

Here, the LO signal SLO is input to the LO signal input port 115, and the RF signal SRF is input to the RF signal input port 117. As a result, the LO signal SLO
Is input to the gate of the FET 103 via the LO signal matching circuit 105, and the RF signal SRF is input to the drain of the FET 103 via the RF signal matching circuit 107. By the way, if the drain voltage is small enough,
The channel resistance of 103 shows a linear characteristic with respect to the gate voltage value. Therefore, the channel resistance value of the FET 103 to which the LO signal SLO is input via the LO signal matching circuit 105 changes with time according to the frequency of the LO signal SLO. As a result, the reflection coefficient on the drain side changes with time, and the RF signal SRF input through the RF signal matching circuit 107 is mixed with the LO signal SLO.
Due to this mixing, an IF signal SIF having a sum of the frequency of the RF signal SRF and the frequency of the LO signal SLO and a difference frequency component is generated and output from the IF signal output port 119 via the IF signal matching circuit 109. Becomes

In the FET mixer 101 described above, it is not necessary to apply a bias voltage to the drain of the FET 103, so that the power consumption of the entire circuit can be reduced.

By the way, in order to obtain a desired IF signal SIF using the conventional FET mixer 101, an LO signal SLO corresponding to the frequency is required. To obtain a predetermined LO signal SLO, (1) the LO signal SLO
In an oscillator (not shown) that generates an LO,
A method of oscillating a required frequency signal and a method of (2) generating a signal having a frequency of 1 / n of a required frequency in an oscillator and multiplying the signal by n using a multiplier are general. It is.

[0013]

SUMMARY OF THE INVENTION However, FET
In order to apply the mixer 101 to a high-frequency band such as a quasi-millimeter wave band or a millimeter wave band, when an attempt is made to obtain an LO signal SLO of, for example, 100 GHz or more using the method (1), the output from the oscillator However, there has been a need to separately add an amplifier to perform signal amplification. On the other hand, when the method (2) is used, a multiplier is required. That is, irrespective of the methods (1) and (2), an increase in the scale of the system including the oscillator and the FET mixer 101 and an increase in the complexity of the system cannot be avoided. In addition, there was also a problem of cost increase.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide an amplifier even if a frequency band to which an FET mixer is applied is a quasi-millimeter wave band or a millimeter wave band. Alternatively, the signal output from the oscillator is directly input as an LO signal without using a multiplier,
An object of the present invention is to provide a new and improved FET mixer capable of obtaining a desired IF signal by stable mixing with an F signal.

[0015]

According to a first aspect of the present invention, a radio frequency signal is equally divided into one radio frequency signal and another radio frequency signal having the same phase. A first divider, a local oscillator signal, a second divider for outputting an anti-phase local oscillator signal having a phase difference of a half cycle with respect to the local oscillator signal, and a source for the one radio frequency signal. A first FET for inputting the local oscillation signal to a gate, a second FET for inputting the other radio frequency signal to a source, and inputting the negative-phase local oscillation signal to a gate, An FET mixer is provided, comprising a drain of one FET and a connection point to which a drain of the second FET is commonly connected.

According to this configuration, one radio frequency signal and a local oscillation signal are mixed at the drain of the first FET, and the other radio frequency signal and the antiphase local oscillation signal are mixed at the drain of the second FET. Will be mixed.
By the way, since the phase difference between the local oscillation signal and the antiphase local oscillation signal is １ ／ cycle, the connection point where the drain of the first FET and the drain of the second FET are commonly connected is
This is a virtual short-circuit point for the fundamental wave of the local oscillation signal and the fundamental wave of the negative-phase local oscillation signal. On the other hand, the second harmonic of the local oscillation signal and the second harmonic of the antiphase local oscillation signal have the same phase at the connection point. Therefore, at the connection point, a signal obtained by mixing one radio frequency signal and the second harmonic of the local oscillation signal and another radio frequency signal and the second harmonic of the antiphase local oscillation signal are mixed. Will be synthesized.

That is, according to the FET mixer of the first aspect, it is possible to extract an intermediate frequency signal obtained by mixing a radio frequency signal and a frequency component twice as large as a local oscillation signal from a connection point. Therefore, the frequency of the local oscillation signal required to obtain a predetermined intermediate frequency signal is 1 /
2, the millimeter wave using the stable output signal of the oscillator,
Frequency conversion of quasi-millimeter waves or the like can be performed efficiently.

According to a second aspect of the present invention, in the FET mixer according to the first aspect, the second divider includes:
A transmission line having a line length of １ ／ of the wavelength of the fundamental wave included in the local oscillation signal can be used. According to such means, it is possible to easily generate an anti-phase local oscillation signal having a phase difference of 1/2 cycle from the local oscillation signal while having a simple circuit configuration.

Further, the FET according to claim 1 or 2
According to a third aspect of the present invention, the mixer is configured such that the local oscillation signal is once inputted to the first local oscillation signal matching circuit, and the output signal therefrom is inputted to the gate of the first FET. The anti-phase local oscillation signal is once input to the second local oscillation signal matching circuit, and the output signal therefrom is output to the second local oscillation signal matching circuit.
May be configured to input to the gate of the FET.
According to a fourth aspect of the present invention, one radio frequency signal is once inputted to the first radio frequency signal matching circuit, and an output signal therefrom is inputted to the source of the first FET. , Another radio frequency signal may be once inputted to the second radio frequency signal matching circuit, and the output signal therefrom may be inputted to the source of the second FET. Then, an intermediate frequency signal matching circuit can be connected to the connection point, and a predetermined intermediate frequency signal can be output from the intermediate frequency signal matching circuit. Further, as described in claim 6, the first F
A configuration may be adopted in which the first grounded source circuit is connected to the source of the ET, and the second grounded source circuit is connected to the source of the second FET.

[0020]

BRIEF DESCRIPTION OF THE DRAWINGS FIG.
A preferred embodiment of the FET mixer according to the present invention will be described in detail.

As shown in FIG. 1, the FET mixer 1 according to the embodiment of the present invention comprises first and second FETs 3, 5, 5, 1 and 2 LO signal matching circuits 7, 9, and 1 and 2 RF signal matching circuits 11 and 13, IF signal matching circuit 15, transmission line 17 as a second divider, divider 19 as a first divider, gate bias circuit 21, capacitor 23, LO signal input port 25, RF signal input It comprises a port 27, an IF signal output port 29, a gate bias port 31, and first and second source ground circuits 33 and 35.

The LO signal input port 25 is connected to the first
Are connected in common to the input section of the LO signal matching circuit 7 and one terminal 17a of the transmission line 17. The output of the first LO signal matching circuit 7 is connected to the gate of the first FET 3. The other terminal 17b of the transmission line 17 is connected to the input of the second LO signal matching circuit 9, and the output of the second LO signal matching circuit 9 is connected to the second LO signal matching circuit 9.
, And is commonly connected to one end of the gate bias circuit 21. Further, the other end of the gate bias circuit 21 is connected to a gate bias port 31 and
One end of the capacitor 23 is commonly connected, and the other end of the capacitor 23 is connected to the ground level.

On the other hand, the RF signal input port 27 is connected to the first terminal 19a of the divider 19. The second terminal 19b of the divider 19 is connected to the first RF
The divider 19 is connected to the input of the signal matching circuit 11.
The third terminal 19c is connected to the input section of the second RF signal matching circuit 13. Further, the output of the first RF signal matching circuit 11 is commonly connected to the source of the first FET 3 and one end of the first grounded source circuit 33, and the output of the second RF signal matching circuit 13 is The common source is connected to the source of the second FET 5 and one end of the second source ground circuit 35.

The drain of the first FET 3 and the drain of the second FET 5 are shared and connected to the input of the IF signal matching circuit 15 via a node A as a connection point. The output section of the matching circuit 15 is connected to the IF signal output port 29.

The other end of the first grounded source circuit 33 and the other end of the second grounded source circuit 35 are connected to the ground level.

Here, the transmission line 17 is connected to the LO signal SLO
Has a line length of 長 of the wavelength of the fundamental wave included in the signal, and a phase difference of 周期 period occurs between the signal input to the terminal 17a and the signal output from the terminal 17b. It will be.

The divider 19 may be of a Wilkinson type, for example, and the first terminal 1
It has a function of separating a signal input from the terminal 9a into two signals and outputting the signals from the second terminal 19b and the third terminal 19c without interfering with each other.

By the way, in the embodiment of the present invention, the first grounded source circuit 33 and the second grounded source circuit 35 are open to the frequency (f _RF ) of the RF signal SRF and are switched to other frequencies. If the IF signal matching circuit 15 is configured as a so-called low-pass filter having a sufficiently high impedance with respect to the frequency (f _LO ) of the LO signal SLO, it is set to be short-circuited. This will be described below.

The first LO signal matching circuit 7 and the second LO signal matching circuit 9, the first FET 3 and the second FET
5. The first RF signal matching circuit 11 and the second RF signal matching circuit 13, and the first grounded source circuit 33 and the second grounded source circuit 35 have substantially the same configuration.
It has a function.

The operation of the FET mixer 1 having the above-described configuration according to the embodiment of the present invention will be described in detail.
First, a bias voltage Vg near the threshold value of the first and second FETs 3 and 5 is applied to the gate bias port 31.

Here, the LO signal SLO is input to the LO signal input port 25, and the RF signal SRF is input to the RF signal input port 27.

The LO signal SLO is input to the gate of the first FET 3 as the first gate input signal SLOa via the first LO signal matching circuit 7, and the transmission line 17 and the second LO signal matching circuit The second gate input signal SLOb is input to the gate of the second FET 5 via the circuit 9. By the way, as described above, the transmission line 17
Has a line length of の the wavelength of the fundamental wave included in the LO signal SLO, so that the first gate input signal SL
A half cycle difference occurs between the phase of Oa and the phase of the second gate input signal SLOb.

On the other hand, the RF signal SRF is
Are divided into two signals having the same phase internally, and then output from the second terminal 19b and the third terminal 19c, respectively. Then, one signal output from the second terminal 19b is input to the source of the first FET 3 as the first divided signal SRFa via the first RF signal matching circuit 11, and the third signal is output from the third terminal 19b. Terminal 1
The other signal output from 9c is input to the source of the second FET 5 as the second divided signal SRFb via the second RF signal matching circuit 13.

Then, at the drain of the first FET 3,
A first gate input signal SLOA input to the gate of the first FET 3 and a first divided signal SR input to the source
Fa is mixed. Similarly, at the drain of the second FET 5, the second gate input signal SLOb input to the gate of the second FET 5 and the second divided signal SRFb input to the source are mixed.

As described above, the phase of the first gate input signal SLOa and the phase of the second gate input signal SLOb
Has a difference of 周期 cycle, the node A, which is the connection point of the drain of the first FET 3 and the drain of the second FET 5, has a phase difference with respect to the fundamental wave included in the LO signal SLO. It becomes a virtual short-circuit point.

On the other hand, since the second harmonic of the LO signal SLO has twice the frequency of the fundamental wave, the phase of the second harmonic of the first gate input signal SLOa and the second gate The phase of the second harmonic of the input signal SLOb matches. Therefore, the first divided signal SRFa and the first gate input signal SLOa are mixed by the first FET 3, and the second divided signal SRFb and the second gate input signal SLOb are mixed by the second FET 5. As a result, at the node A, a signal in which the second harmonic of the RF signal SRF and the LO signal SLO are mixed is generated. Then, the generated signal is output to the outside from the IF signal output port 29 as an IF signal SIF via the IF signal matching circuit 15. That is, the IF signal SIF has a frequency (f _RF −2 *) that is the difference between the frequency of the RF signal SRF (f _RF ) and the frequency of the second harmonic of the LO signal SLO (2 * f _LO ).
f _LO ).

As described above, according to the FET mixer 1 according to the embodiment of the present invention, the RF signal SRF is
Mixed with the second harmonic of the LO signal SLO, and the RF signal SR
It is possible to generate an IF signal SIF having a frequency (f _RF −2 * f _LO ) which is the difference between the frequency of F (f _RF ) and the frequency of the second harmonic of the LO signal SLO (2 * f _LO ). . That is, the oscillation frequency required for the oscillator of the LO signal SLO is half that of the conventional one, and even when the FET 1 is applied to a high frequency band such as a millimeter wave, the output signal of the oscillator is directly used without using an amplifier or a multiplier. Can be used as the LO signal SLO. Therefore, the space conventionally occupied by the amplifier and the multiplier is omitted, and the system can be made compact.

Further, the FET according to the embodiment of the present invention
In the mixer 1, the bias voltage Vg near the threshold value of the first and second FETs 3 and 5 is applied to the gate bias port 31 and the first and second FETs 3 and 5 are in a pinch-off state. LO signal input port 25, R
F signal input port 27 and IF signal input port 29
Will ensure mutual isolation.

Although the preferred embodiments of the present invention have been described with reference to the accompanying drawings, the present invention is not limited to such examples. It is clear that a person skilled in the art can conceive various changes or modifications within the scope of the technical idea described in the claims, and those modifications naturally fall within the technical scope of the present invention. It is understood to belong.

For example, in the present embodiment, a description has been given of the case where the transmission line 17 having a line length of half the wavelength of the fundamental wave included in the LO signal SLO is used. , A 180 ° hybrid coupler having the center frequency of the frequency (f _LO ) of the LO signal SLO may be used. In this case, the Δ port of the 180 ° hybrid coupler is used as an input part of the LO signal SLO, and the Σ port is terminated with 50Ω.

Further, in the above-described embodiment, the description has been given of the case where the Wilkinson type is used as the divider 19, but any divider which can divide an input signal into two signals having the same phase can be used. It is not limited to the Wilkinson type.

Furthermore, the FET mixer 1 is configured as a down converter, but the present invention is applicable even when configured as an up converter. In the above-described FET mixer 1, a local oscillation signal, a radio frequency signal, and an intermediate frequency signal are assigned to each input / output port. However, the present invention is not limited to this, and other signals can be assigned. It is.

[0043]

As described above, according to the present invention,
Since the oscillation frequency required for the oscillator, which is the output source of the LO signal, is half the conventional frequency, even if the frequency band to which the FET mixer is applied is a millimeter wave band or a quasi-millimeter wave band,
A desired IF signal can be stably obtained by using the output signal of the oscillator directly as the LO signal without adding an amplifier or a multiplier. Therefore, the space previously occupied by amplifiers and multipliers is omitted,
The system can be made more compact.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of an FET mixer according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a configuration of a conventional FET mixer.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 FET mixer 3 1st FET 5 2nd FET 7 1st LO signal matching circuit 9 2nd LO signal matching circuit 11 1st RF signal matching circuit 13 2nd RF signal matching circuit 15 IF signal matching circuit 17 Transmission line 19 Divider 33 First grounded source circuit 35 Second grounded source circuit SIF IF signal SLO LO signal SRF RF signal

Claims (6)

[Claims] 1. A first divider for equally dividing a radio frequency signal into one radio frequency signal and another radio frequency signal having the same phase with each other; A second divider that outputs an anti-phase local oscillation signal having a phase difference of a half cycle; and a first FET that inputs the one radio frequency signal to a source and inputs the local oscillation signal to a gate; A second FET for inputting the other radio frequency signal to a source and inputting the anti-phase local oscillation signal to a gate; a connection in which a drain of the first FET and a drain of the second FET are commonly connected; Point;
An FET mixer comprising: 2. The FE according to claim 1, wherein the second divider is a transmission line having a line length of a half of a wavelength of a fundamental wave included in the local oscillation signal.
T mixer. 3. The local oscillation signal is input to a gate of the first FET via a first local oscillation signal matching circuit, and the anti-phase local oscillation signal is input to a second local oscillation signal matching circuit. 3. The FET mixer according to claim 1, wherein the signal is input to a gate of the second FET via a gate. 4. The one radio frequency signal is input to a source of the first FET via a first radio frequency signal matching circuit, and the other radio frequency signal is a second radio frequency signal. 4. The FET mixer according to claim 1, wherein the input is inputted to the source of the second FET via a matching circuit. 5. The FET mixer according to claim 1, wherein an intermediate frequency signal matching circuit is connected to the connection point. 6. The source of the first FET is connected to a first source grounded circuit, and the source of the second FET is connected to a second source grounded circuit. The FET mixer according to claim 1, 2, 3, 4, or 5.