JPH11112010A - Solar cell and manufacture therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent irreversible characteristic decline after the destruction of a photoelectric conversion layer and the removal of the shade due to the generation of a reverse bias voltage, when the entire surface of a certain unit cell provided with an integrated type solar cell is in the shade. SOLUTION: A second scribe groove 15 for insulating and dividing the photoelectric conversion layer 12 is formed so as to partially overlap with a first scribe groove 14 formed between transparent conducting layers 11 in the adjacent unit 1. The part near the second scribe groove 15 of the photoelectric conversion layer 12 is crystallized, and a bypass conducting path 17 provided with a conducting effect for mitigating a reverse bias load generated inside the unit cell 1 at the time of the shade is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated thin-film solar cell in which unit cells each having a photoelectric conversion layer of an amorphous semiconductor are connected in series and a method of manufacturing the same, and more particularly, to a reverse bias applied to a unit cell in the shade. The present invention relates to a solar cell having a bypass function for reducing a voltage load.

[0002]

2. Description of the Related Art Conventionally, in a thin-film solar cell, when a light-transmitting insulating substrate is used as a substrate, SnO ₂ , ZnO, I ₂
A transparent conductive layer of a transparent electrode such as TO is laminated, a photoelectric conversion layer of an amorphous semiconductor is laminated thereon, and a back electrode layer having a reflective metal film is further laminated thereon to form one unit cell. Is manufactured.

In an integrated thin-film solar cell, a plurality of unit cells are connected in series on the same large-area substrate by electrically connecting a transparent conductive layer in series to a back electrode layer of an adjacent unit cell. It forms a high voltage, high output solar cell.

As a manufacturing method, a transparent conductive layer is laminated on a light-transmitting insulating substrate, and a patterning process for forming a processing groove for dividing into a plurality of strips is performed.
The photoelectric conversion layer is laminated on top of it, and patterning is performed on the photoelectric conversion layer at a position shifted from the processing groove of the transparent conductive layer to remove only the photoelectric conversion layer without damaging the transparent conductive layer. A groove is formed, a back electrode layer is laminated thereon,
A patterning process for forming a processing groove for insulatingly dividing only the back electrode layer is performed at a position opposite to the processing groove of the transparent conductive layer with respect to the processing groove of the photoelectric conversion layer.

[0005] By doing so, the transparent conductive layer of one unit cell is sequentially connected in series with the back electrode layer of the adjacent unit cell, and an integrated thin-film solar cell can be formed in a large-area substrate.

Here, scribing with a laser beam has been frequently used for patterning a transparent conductive layer or patterning a photoelectric conversion layer. This is because it is excellent in processing accuracy, tact, and selective film processing by selective absorption of laser light wavelength of a processing object.

For patterning of the back electrode layer, a direct scribing method using a laser beam, a method of chemically etching the back electrode layer after patterning a resist, a photolithographic method, and the like have been used. In the patterning process of the back electrode layer, since the photoelectric conversion layer and the transparent conductive layer are laminated thereunder, it is necessary to perform a process of selectively insulating and separating only the back electrode layer without damaging them. This is the most difficult patterning process.

[0008] After all the patterning steps, increasing the separation resistance between the adjacent back electrode layers of the integrated unit cells means that a partial conduction path is formed between the unit cells and a short-circuit current flows. Shunt pass leak between unit cells
Therefore, it is important to perform high-resistance separation, since the above-described problem can be prevented. Therefore, in order to improve the initial characteristics of the integrated thin-film solar cell, the separation resistance between the adjacent back electrode layers may be increased in the manufacturing process.

[0009]

When such an integrated thin-film solar cell is put into practical use, when it enters a partial shade such as a shade, the unit cells in the shade generate other electric power. If the total generated voltage from the unit cell is applied as a reverse bias voltage and exceeds the withstand voltage of the photoelectric conversion layer, there is a problem that the unit cell is broken.

Since a solar cell has a structure in which a plurality of unit cells are connected in series in a substrate, various shade factors can be considered as shown in FIG. In the figure, 1 is a unit cell,
Reference numeral 2 denotes a scribe groove, a shaded portion represents a shaded portion, and a portion other than the shaded portion represents a light irradiation portion. The largest reverse bias voltage load for the solar cell is in the cases (a), (b) and (c). In this case, the entire surface of the plurality of unit cells 1 is shaded, and the product of the number of unit cells 1 to be shaded and the power generation voltage of one unit cell 1 is the reverse bias breakdown threshold value of the photoelectric conversion layer of the amorphous semiconductor. The reverse bias voltage may be applied.

On the other hand, in the case of (d), (e) and (f),
Even if it is shaded, since a part of each unit cell 1 is irradiated with sunlight, efficiency reduction due to non-power generation in the shaded part of the unit cell 1 is inevitable, but reverse bias applied to the shaded part of the unit cell 1 Since a current generated in a portion irradiated with sunlight in the same cell surface flows sequentially to adjacent unit cells 1, a reverse bias voltage exceeding the breakdown threshold of the photoelectric conversion layer is applied to the entire surface of one unit cell 1. It is not applied.

As a specific product, for example, when an integrated thin-film solar cell is provided to a solar cell for residential power generation, it is often installed on the roof of a house. This is due to shading by telephone poles, shading by high-rise buildings, fallen leaves, flying debris, bird droppings, etc.However, even in such a case, the scattered light from the surroundings actually goes around the shaded unit cells. It is rare that a reverse bias voltage completely exceeding the breakdown threshold of the photoelectric conversion layer is applied.

However, when installing on a veranda of an apartment house, a veranda of a detached house, an eaves, or the like, a user places an object on a solar cell panel and the whole surface of one unit cell is free of scattered light. Expected to be shaded. In such a case, when the solar cell is irradiated with sunlight, a reverse bias voltage exceeding the breakdown threshold of the photoelectric conversion layer is applied to the entire surface of one unit cell, and the irreversible state is removed even after the shade is removed. This may cause deterioration in characteristics. The characteristic of the integrated thin-film solar cell is that the irreversible deterioration in characteristics is remarkable because the structure is such that a high voltage is generated in one substrate.

In order to solve the above problem, FIG.
As shown in FIG. 0, a bypass diode 3 is connected to each unit cell 1 in a reverse direction so that current can escape even if a reverse bias voltage exceeding the breakdown threshold of the photoelectric conversion layer is applied to the entire surface of one unit cell 1. A method of connecting in parallel is known. In this way, if the bypass diodes 3 are connected in parallel, even if some unit cells 1 are shaded,
The shaded unit cell 1 has a bypass diode 3
No reverse bias voltage equal to or higher than the forward voltage is applied, so that the destruction of the photoelectric conversion layer can be prevented.

However, the width of the integrated unit cell is about 5 to 15 mm, although the integrated thin film solar cell differs depending on the device structure and the sheet resistance of the transparent conductive layer.
It is. Although the number of stacking stages varies depending on the substrate size, for example, the unit cell width is 10 mm and the substrate length is 450 m.
In the case of m, 45 stages are integrated. Inserting a bypass diode between all the unit cells causes an increase in the number of manufacturing steps and costs, and is not preferable in view of supplying a solar cell which is less expensive than a crystalline solar cell to the market.

Japanese Patent Application Laid-Open No. 5-251724 discloses that a bare chip diode is provided on a conductive substrate as a bypass diode, one electrode of the bare chip diode is electrically connected to the conductive substrate, and the other electrode is connected to the photoelectric substrate. A solar cell electrically connected to a conversion layer is disclosed. Japanese Patent Application Laid-Open No. 9-64397 discloses a solar cell in which a bypass diode is a diode element made of a silicon-based non-single-crystal semiconductor deposited and formed on a conductive substrate.

However, in the former solar cell, a bypass diode must be formed on the substrate in addition to the unit cell, and the problem of increasing the number of manufacturing steps has not been solved. In the latter solar cell, a bypass diode can be formed at the same time as a unit cell. However, a space for forming a bypass diode on a substrate is required, which hinders miniaturization.

SUMMARY OF THE INVENTION In view of the above, it is an object of the present invention to provide a solar cell capable of avoiding a deterioration in the characteristics of a unit cell due to a reverse bias voltage load caused in a shade without forming a bypass diode.

[0019]

Means for Solving the Problems According to the present invention, a unit cell is formed by sequentially laminating a transparent conductive layer, a photoelectric conversion layer, and a back electrode layer on an insulating substrate. In the case of a solar cell in which a processing groove for insulating division is formed between each layer and a transparent conductive layer is electrically connected in series to the back electrode layer of an adjacent unit cell, when the unit cell is shaded In order to reduce the reverse bias voltage load generated inside the unit cell, the processing groove between the transparent conductive layer and the processing groove between the photoelectric conversion layers are overlapped. In the photoelectric conversion layer, a bypass conduction path is formed in the vicinity of the processing groove. It is a thing.

The bypass conduction path is formed by crystallizing a photoelectric conversion layer in a processing groove between transparent conductive layers. And
If the width of the processing groove between the transparent conductive layer and the processing groove between the photoelectric conversion layers overlaps with each other by 5 to 85% of the processing groove width between the transparent conductive layers, a conduction effect enough to fulfill the bypass function is obtained,
The reverse bias voltage load in the shade can be reduced.

A plurality of unit cells are formed by performing a patterning process for forming a processing groove for insulatingly dividing each layer while sequentially laminating a transparent conductive layer, a photoelectric conversion layer, and a back electrode layer on an insulating substrate. However, when insulating and dividing the photoelectric conversion layer, the photoelectric conversion layer is irradiated with laser light so as to overlap the processing groove in the transparent conductive layer, and a portion of the photoelectric conversion layer near the processing groove crystallizes due to heat during laser processing. Then, a bypass conduction path is formed in the photoelectric conversion layer, and the above-described solar cell is manufactured.

Another means for solving the problem is that a bypass conduction path is formed in a processing groove between the back electrode layers. This bypass conduction path is formed by crystallizing a part of the photoelectric conversion layer immediately below the processing groove between the back electrode layers.

When the back electrode layer is irradiated with laser light for insulation division, heat generated during laser processing forms a bypass conduction path in the photoelectric conversion layer in the vicinity of the processing groove in the back electrode layer. A battery is manufactured.

As another manufacturing method, a resist is applied on the back electrode layer, the resist is removed by irradiating a laser beam, and a bypass conduction path is formed in the photoelectric conversion layer by heat during the laser processing. The back electrode layer in the portion where the resist has been removed is removed by etching to form a processed groove, and the above-described solar cell is manufactured.

It is preferable to use a laser beam having a uniform in-plane energy density as the laser beam. Thereby, the photoelectric conversion layer in the vicinity of the processing groove can be reliably crystallized, and a bypass function having a conduction effect can be provided.

As described above, by forming the bypass conduction path in the photoelectric conversion layer, it is possible to have a bypass function of releasing a current to an adjacent unit cell when a reverse bias voltage is applied by the conduction effect. The reverse bias voltage load applied to the unit cell in the shade can be reduced so that the reverse bias voltage applied to the photoelectric conversion layer does not exceed the breakdown threshold. Further, even if the shaded unit cell is irradiated with sunlight again, irreversible deterioration of characteristics is not caused, and a solar cell which can be used for a long time can be provided, and reliability can be improved.

When the unit cell in the solar cell has a single-layer amorphous semiconductor photoelectric conversion layer having a pin structure, the resistance between adjacent unit cells is 10%.
It is set to 0 Ω · cm ² or more and 1 MΩ · cm ² or less. When the unit cell has a photoelectric conversion layer in which a plurality of amorphous semiconductors having a pin structure are stacked, the resistance between adjacent unit cells is 1 KΩ · cm ² or more and 10 MΩ · c.
m ² or less.

By doing so, when a part of the unit cell is shaded, the reverse bias voltage generated inside the unit cell can be relaxed and the photoelectric conversion layer can be prevented from being damaged.

[0029]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the integrated thin-film solar cell of the present invention will be described. FIG. 1 is a cross-sectional view of the solar cell according to the first embodiment. In this solar cell, a unit cell 1 is formed by sequentially laminating a transparent conductive layer 11, a photoelectric conversion layer 12, and a back electrode layer 13 on an insulating substrate 10, and in the adjacent unit cells 1, between the transparent conductive layers 11 First processing groove (first scribe groove) 1 for insulating and dividing these
4 are formed, similarly, a second processed groove (second scribe groove) 15 is formed between the photoelectric conversion layers 12, and a third processed groove (third scribe groove) 16 is formed between the back surface electrode layers 13. This is cell 1. The transparent conductive layer 11 is electrically connected in series to the back electrode layer 13 of the adjacent unit cell 1 to form an integrated structure.

In the solar cell, the first scribe groove 14 between the transparent conductive layers 11 and the photoelectric conversion layer 12 are formed to reduce the reverse bias voltage load generated inside the unit cell 1.
The second scribe groove 15 between them overlaps and the photoelectric conversion layer 12
In the figure, a bypass conduction path 17 is formed in the vicinity of the second scribe groove 15.

By electrically connecting the bypass conducting path 17 to the back electrode layer 13 laminated thereon,
The photoelectric conversion layers 12 of the adjacent unit cells 1 are electrically connected to each other, thereby obtaining a bypass function. Therefore, the current due to the reverse bias voltage generated in the shade can be sequentially released from the bias conduction path 17 through the back electrode layer 13 to the adjacent unit cell 1, and the photoelectric conversion layer 12 is broken in the shade. The reverse bias voltage exceeding the threshold value is not applied, so that the reverse bias voltage load applied to the unit cell 1 can be reduced, and irreversible deterioration in characteristics can be prevented.

Next, a method for manufacturing the above solar cell will be described. As the insulating substrate 10, a translucent glass plate having a thickness of 1.1 mm and a refractive index of 1.5 is used.
₂ is laminated to a thickness of 100 nm.
At this time, the substrate temperature is set to 500 ° C.

On the underlayer 18, SnO ₂ was formed by atmospheric pressure CVD.
And a transparent conductive layer 11 having a texture structure with a haze ratio of 12 to 15% and a thickness of 1 μm is laminated. At this time, the substrate temperature was set to 500 ° C., and SnCl was used as a source gas.
₂ 25 l / min, HF 1 l as doping gas
/ Min, 0.2 l / min of H ₂ O for oxidation reaction
Shed. The sheet resistance of the transparent conductive layer 11 is 10Ω / □.

Next, the transparent conductive layer 11 is patterned by a laser scribe method (first scribe processing).
Then, it is divided into strips by insulation. In the patterning process, specifically, a fundamental wave (1.064 μm) of a Q-switch oscillation Nd-YAG laser beam was repeated on a processing stage at a frequency of 5 kHz, a scanning speed of 200 mm / sec, and a processing surface output of 500 W / mm ² . This is performed by irradiating the substrate 10 to make the width of the first scribe groove 14 50 μm.

The patterned transparent conductive layer 11
The photoelectric conversion layer 12 of an amorphous semiconductor having a three-layer structure of p, i, and n is formed thereon. First, the substrate 10 is placed in a plasma CVD apparatus, the substrate temperature is set to 200 ° C., and a monosilane gas is supplied as a reactive gas at a flow rate of 30 scc.
m, methane gas at a flow rate of 35.6 sccm, hydrogen gas at a flow rate of 160 sccm, diborane gas diluted with 0.6% hydrogen as a doping gas at a flow rate of 0.06 sccm, and p
The layers are laminated to a thickness of 10 nm. The reaction pressure at this time is 0.32 torr.

Subsequently, the substrate temperature is maintained at 200 ° C., a monosilane gas is flowed as a reaction gas at a flow rate of 60 sccm, and a hydrogen gas is flowed at a flow rate of 20 sccm, and the i-layer is laminated to a thickness of 130 nm. The reaction pressure at this time is 0.12 torr.
It is.

Further, while maintaining the substrate temperature at 200 ° C., a monosilane gas as a reaction gas at a flow rate of 60 sccm, a hydrogen gas at a flow rate of 20 sccm, a phosphine gas diluted with 2% hydrogen as a doping gas at a flow rate of 0.35 sccm, and n
The layers are laminated to a thickness of 100 nm.

In the case of the tandem structure in which the two-stage pin structure shown in FIG.
On the in-structure, a second-stage p-layer and an i-layer are laminated under the same conditions as the first-stage, and a monosilane gas at a flow rate of 30 sccm and a hydrogen gas at a flow rate of 160 are used with the second-stage n-layer as a reaction gas.
A phosphine gas diluted with 0.6% hydrogen is flowed at 10 sccm as a doping gas at a flow rate of 10 sccm to form a tandem structure by forming a second-stage pin structure.

The thus formed amorphous semiconductor photoelectric conversion layer 12 of a-Si; H is patterned by laser scribing at a position shifted in parallel from the first scribe groove 14 (second scribe). Processing) and insulation division. The laser light to be irradiated at this time is Nd-Y
Either an AG laser or an excimer laser may be used.
If a -YAG laser is used, maintenance is easy and running costs are reduced.

More specifically, the Q switch oscillation Nd-YAG
(1.064 μm) Second harmonic of laser (0.532 μm)
m) or Q-switch oscillation Nd-YAG (1.319)
The second harmonic (0.660 μm) of the laser or the second harmonic (0.661 μm) of the Q-switched Nd-YLF (1.321 μm) laser is laminated on the transparent conductive layer 11 and the photoelectric conversion layer 12. Irradiation is performed at a repetition frequency of 5 kHz, a scanning speed of 200 mm / sec, and a processed surface output of 100 W / mm ² from the side of the insulating substrate 10 which has not been formed to form a second scribe groove 15 having a width of 50 μm.

In actual processing, the insulating substrate 10 is placed with the photoelectric conversion layer 12 facing down, and laser light is irradiated from the surface side of the insulating substrate 10 on the light incident side of the solar cell. When processing is performed in this manner, the amorphous semiconductor ablated by the laser beam falls and is removed, so that the amorphous semiconductor does not reattach to the second scribe groove 15 and processing defects occur. Absent.

The laser beam has a rectangular cross section and the in-plane energy density of one pulse is uniformly adjusted by the imaging optical system, and the pulse width is 40 ns to 120 ns. This is because a laser beam with an energy density of Gaussian distribution emitted from a laser oscillator is expanded by a beam expander, and a peripheral portion with a low energy density is removed by a slit or the like, so that the laser light having a rectangular and in-plane density is uniform. (Imaging optical system laser light). Thereby, only the photoelectric conversion layer 12 can be selectively processed without damaging the underlying transparent conductive layer 11, and the unit cell 1
Can be satisfactorily formed in the second scribe groove 15 by exposing the transparent conductive layer 11 for connecting them in series. Further, the edge of the second scribe groove 15 is formed clearly.

The second scribe groove 15 is formed so as to partially overlap the first scribe groove 14 of the underlying transparent conductive layer 11. That is, the width of the first scribe groove 14 of the transparent conductive layer 11 overlaps with the width of 50 μm by 15 μm. Then, at the time of the second scribe processing, a portion near the second scribe groove 15 of the photoelectric conversion layer 12 is crystallized to form a bypass conduction path 17 having a conduction effect. This conduction effect is obtained as a result of local thermal processing during laser processing, and attenuates with the distance from the edge of the second scribe groove 15.

The ratio of the overlapping width is the first scribe groove 1
It was obtained from the experimental results that it is desirable to be 5% to 85% of the width of 4. If the overlapping ratio is small, the lateral distance of the photoelectric conversion layer 12 formed in the first scribe groove 14 becomes long, so that the bypass function cannot be obtained due to conduction attenuation of the crystallized bypass conduction path 17. On the other hand, if the layers are excessively stacked, the conduction effect becomes too large, which is substantially equivalent to the patterning processing failure of the transparent conductive layer 11, so that the shunt path leak of the integrated thin-film solar cell becomes large, and sufficient characteristics are obtained. Can not be obtained. for that reason,
In order to obtain practically satisfactory characteristics, the width at which the second scribe grooves 15 overlap should be 5% to 5% of the width of the first scribe grooves 14.
It is better to be in the range of 85%.

On the patterned photoelectric conversion layer 12, ZnO is deposited to a thickness of 35 nm by sputtering to form a back transparent conductive film 19, and then Ag is deposited thereon to a thickness of 500 nm by sputtering. To form a back surface reflective metal film 20. These back transparent conductive films 1
9 and the back surface reflective metal film 20 constitute the back surface electrode layer 13. Here, the back transparent conductive film 19 and the back reflective metal film 20 are formed by the sputtering method. However, the present invention is not limited to this method. For example, the respective films can be stacked by a vapor deposition method. One may be laminated by a sputtering method and the other may be laminated by a vapor deposition method.

Next, in the back electrode layer 13, the first,
A portion not overlapping with the second scribe grooves 14 and 15 is patterned to form a third scribe groove 16 for insulation division. The patterning method of the back electrode layer 13 is not limited to a known photolithography method, an etching method, a laser scribe method, a mask forming method of the back electrode layer 13, or the like.

The respective layers of the adjacent unit cells 1 are insulated and divided by the scribe grooves, and the resistance between the adjacent unit cells 1 (separation between the adjacent back electrode layers 13) is obtained in each integrated unit cell 1. resistance)
In the case of the unit cell 1 having a single structure in which the photoelectric conversion layer 12 has one pin structure of a-Si; H, it may be 100 Ω · cm ² or more and 1 MΩ · cm ² or less. The photoelectric conversion layer 12 is made of a-Si; H / a-S
i; H or a-Si; H / a-SiGe;
In the case of a unit cell 1 having a tandem structure having two pin / pin structures, and the photoelectric conversion layer 12 is formed of a-Si; H
/ A-SiGe; H / a-SiGe;
In the case of a unit cell 1 having a triple structure having an n / pin / pin structure, 1 KΩ · cm ² or more and 10 M
Ω · cm ² or less may be used. As described above, when the resistance value is within the above range, it is possible to exhibit a bypass function only to reduce a reverse bias voltage load generated inside the unit cell 1, and to prevent irreversible characteristic deterioration due to shade. .

As an example, the characteristics of an integrated thin-film solar cell of 300 mm square manufactured by the above-mentioned manufacturing method are as follows:
Under 1.5, open voltage 64.6V, short circuit current 0.180
A, fill factor (FF) 0.663, output 7.71W
Met.

A shading process of applying a cover 21 as shown in FIG. 3 is performed so that the entire unit cell 1 of the solar cell is shaded. Here, of the 38 stages, 4
A cover 21 is applied to the total of four stages from the stage 7 to the stage 7 so as to be shaded. After irradiating the AM1.5 pseudo sunlight, the cover 21 was removed, and the entire surface of the solar cell was again irradiated with the AM1.5 pseudo sunlight to measure the characteristics after the shade treatment. As a result, the open circuit voltage was 64.5 V, the short circuit current was 0.180 A, and the fill factor (F.
F. ) 0.662 and output 7.69W. No change in characteristics was observed before and after the shade treatment.

COMPARATIVE EXAMPLE In the method of manufacturing an integrated thin film solar cell, the amorphous semiconductor photoelectric conversion layer 12 is patterned by the first scribe groove 14 of the underlying transparent conductive film 11.
As a comparative example, a 300 mm square integrated thin-film solar cell which was the same as that of the above-described embodiment was prepared. The characteristics are as follows: AM1.5, open voltage 6
3.8 V, short circuit current 0.183 A, fill factor (F.
F. ) 0.665 and output 7.76W.

A part of the integrated thin-film solar cell is covered with a shade 21 as shown in FIG. 3 and irradiated with AM1.5 simulated sunlight.
The characteristics were measured by irradiating M1.5 simulated sunlight. As a result, the open-circuit voltage was 61.8 V, the short-circuit current was 0.181 A, the fill factor (FF) was 0.611, and the output was 6.83 W. In this case, after the shade treatment, a decrease in characteristics was observed. Therefore, the bias conduction path 17 is formed in the photoelectric conversion layer 12.
By forming, it is possible to prevent irreversible deterioration in characteristics due to shade in the integrated thin-film solar cell.

In the above example and the comparative example, only one unit cell 1 was subjected to shade treatment, and the change in characteristics before and after the shade treatment was compared. Table 1 shows the results. 4 and 5 show current-voltage curves of the example and the comparative example at the time of fabrication, in the shade, and during the entire irradiation after the shade treatment, respectively. In the case of the embodiment, since the bypass function is exhibited in the shade, it can be seen that there is no irreversible deterioration in characteristics even when the entire surface is irradiated after the shade is removed. On the other hand, in the case of the comparative example, a decrease in characteristics was observed after the shade treatment.

[0053]

[Table 1]

Next, a solar cell according to a second embodiment is shown in FIG. In this solar cell, a bypass conduction path 17 for reducing a reverse bias voltage load generated inside the unit cell 1 is formed in the third scribe groove 16 between the back electrode layers 13. That is, a part of the photoelectric conversion layer 12 located immediately below the third scribe groove 16 is crystallized by the formation of the third scribe groove 16 to become the bypass conduction path 17. The scribe grooves 14, 15, 16 do not overlap with each other, but are shifted from each other. Other configurations are the same as those of the first embodiment.

In the method of manufacturing this solar cell, a transparent conductive layer 11, a photoelectric conversion layer 12, and a back electrode layer 13 are sequentially laminated on a light-transmitting insulating substrate 10 in the same manner as in the first embodiment. In addition, each layer is divided by insulation. Here, in order to form the bias conduction path 17 of the present embodiment, the back electrode layer 1 is formed.
3 is irradiated with a laser beam from above to perform patterning to form a third scribe groove 16 for insulation division. Thereby, Ag of the back surface reflective metal film 20 and ZnO of the back surface transparent conductive film 19 are removed, and the third scribe groove 16 for insulatingly dividing the back surface electrode layer 13 is formed.
The photoelectric conversion layer 12 immediately below the scribe groove 16 is crystallized by the thermal effect of the laser beam, and a bypass conduction path 17 having a conduction effect and having a bypass function is formed. That is, the bypass conduction path 17 is formed by intentionally crystallizing the photoelectric conversion layer 12 with laser light.

As a laser beam, an Nd-YAG laser beam is irradiated, and the laser beam is irradiated at the second scribe groove 1.
5 is a position shifted in parallel in the opposite direction to the first scribe groove 14. Specifically, the Q switch oscillation Nd-YA
The fourth harmonic (FHG: 0.266 μm) of the G laser is repeated at a frequency of 5 kHz, a scanning speed of 125 mm / sec,
Processing surface output 45W / mm ² or repetition frequency 7k
Hz, scanning speed 130mm / sec, processing surface output 60W
/ Mm ² . Alternatively, the Q switch oscillation Nd−
Third harmonic of YAG laser (THG: 0.355 μm)
May be irradiated. As the laser light, a beam having a rectangular cross section and a uniform in-plane energy density as described in the first embodiment is used.

As in the first embodiment, the solar cell is not limited to a single structure, but has a tandem structure as shown in FIG.
Further, it may have a triple structure. At this time, the resistance value between the integrated unit cells 1 is 100Ω · c in the case of the unit cell 1 having a single structure.
It suffices that it is not less than m ^{2 and not} more than 1 MΩ · cm ² . Further, in the case of the unit cell 1 having the tandem structure and the unit cell 1 having the triple structure, 1 KΩ · cm ² or more and 10 M
Ω · cm ² or less may be used. As described above, when the resistance value is within the above range, it is possible to exhibit a bypass function only to reduce a reverse bias voltage load generated inside the unit cell 1, and to prevent irreversible characteristic deterioration due to shade. .

When the back electrode layer 13 is insulated and divided by the laser beam, if the debris of the back transparent conductive film 19 and the back reflective metal film 20 caused by the ablation adhere to the third scribe groove 16 again, It is also possible to use the minute conduction due to the above, and a bypass function can be obtained. Therefore, it is possible to prevent the photoelectric conversion layer 12 from being destroyed or irreversibly deteriorating in characteristics when a reverse bias voltage is applied due to shade.

As an example, the 300 m
The characteristics of the m-square integrated thin-film solar cell are under AM1.5,
The open-circuit voltage was 64.6 V, the short-circuit current was 0.180 A, the fill factor (FF) was 0.663, and the output was 7.71 W.

Then, a shading process of applying a cover 21 as shown in FIG. 3 is performed so that the entire unit cell 1 of the solar cell is shaded. Here, of the 38-stage integration, p
The cover 21 is applied to a total of four stages from the fourth stage to the seventh stage from the side. A
After irradiation with M1.5 pseudo sunlight, the cover 21 was removed, and the entire surface of the solar cell was again irradiated with AM1.5 pseudo sunlight to measure the characteristics after the shade treatment. As a result, the open circuit voltage 64.
5V, short circuit current 0.180A, fill factor (FF)
The output was 0.662 and the output was 7.69W. No change in characteristics was observed before and after the shade treatment.

The third scribe processing by another method will be described. As shown in FIG. 8A, a resist 22 is applied on the back electrode layer 13 and, as shown in FIG. The laser beam is reflected by the metal film 20, and only the resist 22 is removed to perform patterning. Thereafter, as shown in FIG. 8C, the back electrode layer 13 in the portion where the resist 22 has been removed is removed by chemical etching to form a third scribe groove 16. Bypass heat path 17 for reducing the reverse bias voltage load generated inside unit cell 1 is formed in photoelectric conversion layer 12 by the heat generated during the laser processing.

More specifically, the patterning of the back electrode layer 13 is performed by spray-coating an epoxy-based resist 22 thereon, drying the resist, and applying a Q-switch oscillation Nd-
Second harmonic of YAG laser (SHG: 0.532 μm)
Is repeated at a frequency of 5 kHz and a scanning speed of 300 mm / sec.
c, irradiate with a processed surface output of 60 W / mm ² ,
Remove only to open the groove. At this time, the back reflection metal film 2
The laser light is reflected by Ag which is 0, and the back electrode layer 1
3 is not damaged. However, by adjusting the laser power, the Q frequency, and the scanning speed, the back surface reflective metal film 2 can be formed.
0 without damaging the underlying amorphous semiconductor photoelectric conversion layer 12
Can be slightly crystallized. After opening only the resist 22, a third patterning process is performed to remove the back electrode layer 13 by etching with ammonia peroxide (SCl) or the like.
A scribe groove 16 is formed. The rest of the manufacturing method is the same as that of the first embodiment, and an integrated thin-film solar cell having a bypass function for reducing a reverse bias voltage load can be manufactured.

At this time, the resistance between the unit cells 1 (the separation resistance between the adjacent back electrode layers 13) is preferably in the range described in the first embodiment, and can be arbitrarily adjusted by the above-described manufacturing method. The characteristics of the 300 mm square integrated thin film solar cell fabricated in this manner were almost the same as those of the solar cell of the above example, and the effect of the bypass function in the case of performing the shading treatment was also equivalent.

COMPARATIVE EXAMPLE In the method of manufacturing an integrated thin-film solar cell, all the same manufacturing methods as those of the second embodiment were used. However, in the patterning of the back electrode layer 13, the resistance between the adjacent unit cells 1 was reduced. Value is 10MΩ · c
A 300 mm square integrated thin film solar cell integrated so as to have a size of m ² or more was manufactured as a comparative example. Characteristics are AM
Under 1.5, open voltage 63.8V, short circuit current 0.183
A, fill factor (FF) 0.665, output 7.76W
Met.

A part of the integrated thin-film solar cell is covered with a shade 21 as shown in FIG. 3 and irradiated with AM1.5 simulated sunlight.
The characteristics were measured by irradiating M1.5 simulated sunlight. As a result, the open-circuit voltage was 61.8 V, the short-circuit current was 0.181 A, the fill factor (FF) was 0.611, and the output was 6.83 W. In this case, after the shade treatment, a decrease in characteristics was observed. Therefore, by forming the bias conduction path 17, it is possible to prevent irreversible deterioration in characteristics due to shade in the integrated thin-film solar cell.

Further, only one unit cell 1 was subjected to the shade treatment, and the change in the characteristics before and after the shade treatment was compared. The results are the same as those shown in Table 1 and FIGS. That is, in the case of the embodiment, since the bypass function is exerted in the shade, it can be seen that there is no irreversible deterioration in characteristics even when the entire surface is irradiated after the shade is removed. In contrast,
In the case of the comparative example, a decrease in characteristics was observed after the shade treatment.

It should be noted that the present invention is not limited to the above-described embodiment, and it goes without saying that many modifications and changes can be made to the above-described embodiment within the scope of the present invention. In each embodiment, a bias conduction path is formed between all unit cells, but a bias conduction path may be formed only between arbitrary unit cells. That is, in case that the entire surface of the plurality of unit cells is shaded, and the product of the number of shaded unit cells and the power generation voltage of one unit cell exceeds the reverse bias breakdown threshold value of the photoelectric conversion layer of the solar cell. A bypass conduction path is formed in the first scribe groove or the third scribe groove for each number equal to or less than a quotient obtained by dividing a reverse bias breakdown threshold voltage of the photoelectric conversion layer by a power generation voltage of one unit cell, thereby preventing a reverse bias voltage. Irreversible deterioration of characteristics can be prevented by providing a bypass function.

Further, the above-mentioned bypass conduction path may be formed in a solar cell in which a back electrode layer, a photoelectric conversion layer, and a transparent conductive layer are sequentially laminated on an insulating substrate.

When a bypass conduction path is formed at the time of processing the second scribe groove, the second scribe groove is formed first, and then a laser beam is irradiated from the edge of the second scribe groove by a required width. The bypass conduction path may be formed by directly crystallizing the photoelectric conversion layer. This makes it possible to arbitrarily set the magnitude of the conduction effect according to the characteristics of the solar cell.

[0070]

As apparent from the above description, according to the present invention, the processing groove between the transparent conductive layer and the processing groove between the photoelectric conversion layers are formed so as to overlap with each other, and the processing groove is formed in the vicinity of the processing groove of the photoelectric conversion layer. By forming a bypass conduction path or forming a bypass conduction path in the processed groove of the back electrode layer, even if a reverse bias voltage is generated inside the unit cell in the shade, current is supplied to the adjacent unit cell. You can escape.

As a result, the reverse bias voltage load can be reduced to prevent application of a reverse bias voltage exceeding the breakdown threshold of the photoelectric conversion layer, and damage to the photoelectric conversion layer can be prevented. Further, it is possible to provide an integrated solar cell that does not cause irreversible deterioration even when the shaded unit cell is irradiated with sunlight again, withstands long-term use, and has improved reliability. it can.

Further, since these bypass conduction paths are formed at the same time as the formation of the processing groove of the photoelectric conversion layer or the formation of the processing groove of the back electrode layer by irradiation of laser light,
The solar cell can be formed during a series of manufacturing steps, and can be easily manufactured without adding another step. Further, unlike the related art, it is not necessary to newly provide a bypass diode, and the miniaturization of the solar cell is not hindered.

If the bypass conduction path is formed between all the unit cells, damage to the photoelectric conversion layer and irreversible deterioration of the characteristics due to the reverse bias voltage load can be prevented in any shade. can do. However, it may be formed between arbitrary unit cells. In this case, if the arrangement is appropriately determined, a sufficient bypass function can be provided, and the effect can be exhibited.

Here, by setting the width of the processing groove between the transparent conductive layers and the processing groove between the photoelectric conversion layers to be 5 to 85% of the width of the processing groove between the transparent conductive layers, a good conduction effect can be obtained. Irreversible characteristic deterioration due to a reverse bias voltage in the shade can be prevented. In particular, if the layers overlap too much, the conduction effect becomes too large, and the characteristics of the solar cell are degraded due to excessive shunt path leakage. However, sufficient characteristics can be maintained within the above range.

Further, since the solar cell has a single photoelectric conversion layer structure or a structure in which a plurality of two or three photoelectric conversion layers are stacked, the resistance between adjacent unit cells is determined according to each structure. By setting the range, the bypass function can be effectively exerted, and the prevention of the damage of the photoelectric conversion layer and the irreversible deterioration of the characteristics due to the reverse bias voltage can be surely prevented.

[Brief description of the drawings]

FIG. 1 is a sectional view of a solar cell according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view of a tandem solar cell.

FIG. 3 is a conceptual diagram of a solar cell in which some unit cells are shaded.

4A and 4B are diagrams showing a current-voltage curve in the solar cell of the example of the present invention, wherein FIG. 4A shows an initial state, FIG. 4B shows a shade, and FIG.

5A and 5B are diagrams showing a current-voltage curve in a solar cell of a comparative example, where FIG. 5A is an initial state, FIG. 5B is a shaded state, and FIG.
Indicates the entire surface after shading

FIG. 6 is a cross-sectional view of a solar cell according to a second embodiment.

FIG. 7 is a cross-sectional view of a tandem solar cell.

8A and 8B are diagrams showing a process of another method for manufacturing a solar cell, in which FIG.
Is when the resist is removed, and (c) is when the third scribe groove is formed.

FIG. 9 is a diagram showing various shade patterns of a solar cell.

FIG. 10 is a schematic view of a conventional solar cell provided with a bypass diode.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 unit cell 10 insulating substrate 11 transparent conductive layer 12 photoelectric conversion layer 13 back electrode layer 14 first scribe groove 15 second scribe groove 16 third scribe groove 17 bypass conduction path 19 back transparent conductive film 20 back reflective metal film 22 resist

Claims (13)

[Claims] 1. A transparent conductive layer, a photoelectric conversion layer,
A back electrode layer is sequentially laminated to form a unit cell,
In a solar cell, a processing groove for insulatingly dividing each layer of adjacent unit cells is formed between each layer, and the transparent conductive layer is electrically connected in series to a back electrode layer of an adjacent unit cell. The processing groove between the transparent conductive layer and the processing groove between the photoelectric conversion layers overlap with each other. In the photoelectric conversion layer, a bypass conduction path for reducing a reverse bias voltage load generated inside the unit cell is provided near the processing groove. A solar cell, characterized in that is formed. 2. The solar cell according to claim 1, wherein the bypass conduction path is formed by crystallizing a photoelectric conversion layer in a processing groove between the transparent conductive layers. 3. The width of the overlap between the processing groove between the transparent conductive layers and the processing groove between the photoelectric conversion layers is 5 to 5 times the width of the processing groove between the transparent conductive layers.
3. The solar cell according to claim 1, wherein said solar cell is 85%. 4. A transparent conductive layer, a photoelectric conversion layer,
A back electrode layer is sequentially laminated to form a unit cell,
In a solar cell, a processing groove for insulatingly dividing each layer of adjacent unit cells is formed between each layer, and the transparent conductive layer is electrically connected in series to a back electrode layer of an adjacent unit cell. A solar cell, wherein a bypass conduction path for reducing a reverse bias voltage load generated inside a unit cell is formed in a processing groove between back surface electrode layers. 5. The solar cell according to claim 4, wherein the bypass conduction path is formed by crystallizing a part of the photoelectric conversion layer immediately below the processing groove between the back electrode layers. 6. A unit cell has a single-layer amorphous semiconductor photoelectric conversion layer having a pin structure, and a resistance between adjacent unit cells is 100 Ω · cm ² or more and 1 MΩ · cm.
The solar cell according to claim 1, wherein the number is ² or less. 7. A unit cell has a photoelectric conversion layer in which a plurality of amorphous semiconductors having a pin structure are stacked, and a resistance between adjacent unit cells is 1 KΩ · cm ² or more and 10 MΩ.
5. The solar cell according to claim 1, wherein the value is set to not more than cm ² . 8. The solar cell according to claim 1, wherein the bypass conduction path is formed in an arbitrary processing groove between the unit cells. 9. A transparent conductive layer, a photoelectric conversion layer,
While laminating the back electrode layers in order, a plurality of unit cells are formed by performing a patterning process for forming a processing groove for insulatingly dividing each layer, and the transparent conductive layer is electrically connected to the back electrode layer of an adjacent unit cell. In the method for manufacturing a solar cell to be connected in series, when the photoelectric conversion layer is divided into insulating layers, the photoelectric conversion layer is irradiated with laser light so as to overlap a processing groove in the transparent conductive layer, and heat generated during laser processing. A method for manufacturing a solar cell, comprising: forming a bypass conduction path for reducing a reverse bias voltage load generated inside a unit cell near a processing groove in the photoelectric conversion layer. 10. The solar cell according to claim 9, wherein a unit cell is formed on a back surface of the light-transmitting insulating substrate, and a laser beam is irradiated from a surface of the insulating substrate to form a bypass conduction path. Battery manufacturing method. 11. A plurality of unit cells are formed by sequentially patterning a transparent conductive layer, a photoelectric conversion layer, and a back electrode layer on an insulating substrate and forming a processing groove for insulatingly dividing each layer. In the method of manufacturing a solar cell in which the transparent conductive layer is electrically connected in series to the back electrode layer of an adjacent unit cell, when the back electrode layer is irradiated with laser light for insulation division, heat during laser processing is Forming a bypass conducting path for reducing a reverse bias voltage load generated inside the unit cell in the photoelectric conversion layer near the processing groove in the back electrode layer. 12. A laser beam having a uniform in-plane energy density as a laser beam.
Or a method for manufacturing a solar cell according to item 11. 13. A plurality of unit cells are formed by sequentially patterning a transparent conductive layer, a photoelectric conversion layer, and a back electrode layer on an insulating substrate and forming a processing groove for insulatingly dividing each layer. Then, in the method for manufacturing a solar cell, wherein the transparent conductive layer is electrically connected in series to the back electrode layer of an adjacent unit cell, a resist is applied on the back electrode layer, and the resist is removed by irradiating a laser beam. Then, in the photoelectric conversion layer, heat generated during the laser processing forms a bypass conduction path for alleviating a reverse bias voltage load generated inside the unit cell, and forms a portion of the back electrode layer where the resist is removed. A method for manufacturing a solar cell, comprising forming a processed groove by removing the groove by etching.