JPH11110423A - Circuit data generating method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To simplify the designation of power source and a 2nd library and to improve the operability in circuit generation and the maintainability of the 2nd library, by reading out a symbol, extracting rectangular data for power source designation, retrieving the 2nd library including power source designation data corresponding to the symbol, and designating a power source name and a ground name in the extracted rectangular data. SOLUTION: Circuit data 100 generated in a circuit data generation system are read (S11). It is fudged from the read circuit data 100 whether the rectangular data for power source designation exist in these circuit data 100 or not, and the designated rectangular data are extracted. At such a time, concerning a power source designate symbol added to the rectangular data, it is extracted together (S12). Next, all the symbols included in the extracted rectangular data for power source designation are extracted (S13). Concerning the extracted symbols, the library accompanied with a symbol name is retrieved and extracted from existent library data 101 (S14).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for creating circuit data, and more particularly to a method for creating circuit data for automatic circuit design by CAD of a circuit having a plurality of power supplies in which analog circuits and digital circuits are mixed.

[0002]

2. Description of the Related Art Conventionally, in a general first circuit data generation method for a circuit in which analog circuits and digital circuits are mixed, a power supply to a circuit data generation target circuit such as a gate is controlled by an external power supply and an internal power supply. Specify a different signal name to distinguish it from the power supply. It is necessary to add information corresponding to each power supply name for determining whether the power supply source is external or internal power supply to the symbol of the circuit. The program determines whether the power supply is an external power supply or an internal power supply based on individual information added to the symbol of the circuit, and creates circuit connection information at a transistor level.

More specifically, symbols corresponding to a power supply name and a ground name are registered in advance as a symbol library. In this case, when there are a plurality of power supply names and ground names, a symbol library is registered corresponding to each type. Next, a corresponding symbol library is extracted according to the name of the symbol such as the gate name specified in the circuit data and the type of the specified power supply and ground. The extracted library contents are added to specified circuit data to create circuit data.

As a modification of the first conventional circuit data creation method, a symbol library is registered with a preset fixed power supply name, and circuit data is created with reference to the symbol library. When a power supply name other than the above-mentioned fixed power supply name is specified, there is a method of manually changing the power supply name in the library.

The processing will be described with reference to FIG. 5 which is a flowchart of a first conventional circuit data creation method. First, the circuit data 100 is read (step P).
1), it is determined whether or not the data is power supply data (step P2).
If it is power data, the process proceeds to step P3, and it is determined whether or not there is specified power data. If it is not power data,
Proceeding to step P8, the connection information is processed, and further proceeding to step P6.

Next, if there is power supply data designated in step P3, the process proceeds to step P4. If there is no specified power supply data, the process proceeds to step P8, performs a standard power supply setting process, and further proceeds to step P6.

Next, at step P4, the library 10
1 is read, and data corresponding to the designated power supply is extracted from the library 101.

Next, the extracted data is stored in step P1.
(Step P5).

[0009] Hereinafter, a process end determination (step P6), an output process to circuit data (step P7), and the process is completed.

Therefore, a second conventional method for creating circuit data described in Japanese Patent Application Laid-Open No. 63-303469, which automates the manual designation of a power supply name, reads circuit data and first judges information on drawing data. I do. When the circuit data is power supply data, it is determined whether or not there is an output node. If there is an output node, power supply processing is performed. At this time, the power supply name is set in advance, and the default value of the power supply information of each logical symbol is set to this value, so that a new power supply name designation process can be omitted. Further, by providing power supply information to each logical symbol, it is possible to recognize and process both power supplies.

The conventional second circuit data generation method will be described with reference to FIG. 6, which is similarly shown in a flowchart with common reference characters / numerals added to components common to FIG. The difference between this conventional second circuit data generation method and the above-described conventional first circuit data generation method is that after the power data is determined in step P2, the presence or absence of an output node is determined (step P11). If there is an output node, the processing of the internal power supply is performed (step P12). If there is no output node, the processing of the external power supply is performed instead of the standard power supply (step P9A). Subsequent processing is the same as in the first conventional circuit data creation method.

However, these conventional first and second circuit data creation methods have several problems.

The first problem is that it is necessary to add power supply information to all of the individual logical symbols except for the individual logical symbols using the information of the default value, resulting in an enormous amount of library data. It is.

The reason is that generally, most of the circuit data is created in a hierarchized format, and power supply information cannot be confirmed for circuit information created from a higher hierarchy.
Therefore, when checking the power supply name of each logical symbol, it is necessary to check the power supply name for each hierarchy.

The second problem is that when power supply information is changed, additional information of each logical symbol must be changed, which requires a lot of correction time and confirmation time.

The reason is that since the power supply information is added to each logical symbol, all the additional information of each logical symbol must be manually checked.

A third problem is that, when there is a large number of power supply information, a specification error may occur by manually specifying information to be added to each symbol.

The reason is that, when the type of power information of the symbols included in the circuit data is one or two in addition to the default value, there is little mistake in the designation, but there are many types of power information of the symbols (for example, This is because, in the case of 10 or more types), there is a high risk that a designation error occurs. .

A fourth problem is that when a second library corresponding to power supply information is created for a symbol, it is necessary to own as many second libraries as the number of types of power supply information. .

The reason for this is that, in the circuit in the second library from which the symbols are read, the name of the power supply to be supplied is fixedly specified, so that a circuit library for each power supply information referred to for one symbol is required. It must be created.

[0021]

In the above-described conventional circuit data creation method, most of the circuit data is created in a hierarchical format, and power supply information is checked for circuit information created from a higher hierarchy. Since the power supply name of each logical symbol cannot be confirmed, it is necessary to confirm the power supply name for each hierarchy. Therefore, it is necessary to add power supply information to all of the individual logical symbols except for the individual logical symbols using the default value information, and there is a disadvantage that the library data becomes enormous.

Further, since the power information is added to each logical symbol, when the power information is changed, it is necessary to change all the additional information of each logical symbol by manually checking it. There is a disadvantage that it takes a lot of correction time and confirmation time.

Furthermore, when there is a large number of power information, there is a disadvantage that the risk of occurrence of a designation error by manually designating information to be added to each symbol is increased.

Further, when the second library corresponding to the power information is created for the symbol, it is necessary to own the second libraries corresponding to the number of types of the power information. There is a drawback that it becomes a factor of reduction.

An object of the present invention is to improve the maintainability of the second library by simplifying the designation of the power supply in the circuit data, improving the operability of creating the circuit data, and simplifying the second library read from the symbols. It is an object of the present invention to provide a circuit data creating method for causing the circuit data to be created.

[0026]

According to the present invention, there is provided a circuit data creating method, comprising: a symbol reading step of reading a symbol representing a basic component of a circuit from a first library in which circuit data is stored; And a connection step of connecting arbitrary terminals of a plurality of symbols arranged in the symbol arrangement step, wherein the symbol reading step extracts rectangular data for designating a power supply. Symbol extraction step, and a library search step of specifying a power supply name and a ground name in the rectangular data extracted by searching a second library including the power supply designation data corresponding to the symbol. It is.

[0027]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring now to FIG. 1 showing a flow chart of an embodiment of the present invention, a circuit data generating method according to the present embodiment shown in FIG. S1
And a symbol arranging step S2 for arranging the read symbols, and a connecting step S3 for connecting arbitrary terminals of the plurality of symbols arranged in Step 2.

The symbol reading step S1 includes a step S11 for reading the circuit data 100, a rectangular data extracting step S12 for extracting rectangular data for designating a power source from the read circuit data, and extracting all symbols in the extracted rectangular data. The method includes a symbol extracting step S13 and a library searching step S14 for designating a power supply name and a ground name in the rectangular data extracted by searching the existing library 101 for the extracted symbols.

The symbol arranging step S2 includes a step S
Location information saving step S21 for temporarily saving the location information of the symbols extracted in step 13 in the location information data 102
And a power supply name and ground name conversion table reference step S22 for referring to the conversion table 103 for interpreting the power supply designation rectangular data, and the power supply name and the ground name in the library data accompanying the extracted symbol name as the designated name. A name change step S23 for changing, a symbol name change step S24 for changing a symbol name of a symbol whose power supply name and ground name have been converted, and a symbol changed in steps S23 and S24 are rearranged based on the layout information data 102. And relocation step S25.

The connection step S3 is a connection processing step S3 for performing wiring connection processing on the rearranged symbols.
31 and a circuit data output step S32 of outputting a connection result to the circuit data 104.

Next, the processing flow of this embodiment will be described with reference to FIG. 1. First, the circuit data 100 created by the circuit data creation system is read (step S11). Based on the read circuit data, it is determined whether or not the rectangular data for specifying the power supply is included in the circuit data, and the specified rectangular data is extracted (step S12). At this time,
The power supply designation symbol added to the rectangular data is also extracted. Next, all the symbols included in the extracted rectangular data for specifying the power supply are extracted (step S1).
3). For the extracted symbols, a library attached to the symbol name is searched from the existing library data 101 and extracted (step S14).

Next, arrangement information associated with the symbol extracted in step S14 is extracted from the circuit data and temporarily saved in the arrangement information data 102 (step S2).
1). Next, in order to interpret the power supply designation symbol added to the power supply designation rectangular data, the power supply name and the ground name corresponding to the power supply designation symbol are referred to from the existing conversion table 103 (step S22).

Next, for the library data associated with the symbol name extracted in step S14, the power supply name and ground name in the library are entered in step S22.
It is converted into the power supply name and the ground name referred to corresponding to the power supply designation symbol (step S23). Further, the symbol name of the symbol whose power name and ground name have been converted based on the power designation symbol is changed (step S24). A library of the power supply name and the ground name changed by the change of the symbol name is automatically created.

Next, the symbols whose power supply name and ground name have been changed and whose symbol names have been changed are rearranged based on the already stored arrangement information data 102 (step S2).
5).

Further, wiring connection processing is performed on the symbols rearranged in step S25 (step S31).
Then, it is output to the circuit data 104 (step S3
2).

Next, FIG. 1 is a circuit diagram showing an example of circuit data created by the circuit data creation system, and FIG. 3A is a diagram showing an example of a library and a conversion table.
The details of the processing flow of the present embodiment will be described with reference to (B). First, the circuit data 100 created by the circuit data creation system is read (step S1).
1). The circuit data 100 includes rectangular data 202, 206, and 210 that determine a range for designating a power supply name and a ground name, in addition to the logic gate symbols and the wiring connecting the symbols, and these rectangular data 202,
Power supply designation symbols 203,
207, 211. Rectangle data 202
Converts the logical symbols 200 and 201 into rectangular data 206
Converts the logical symbols 204 and 205 into rectangular data 210
Include logical symbols 208 and 209, respectively.

Next, it is determined from the circuit data 100 whether rectangular data 202, 206, and 210 for designating the power supply exist in the circuit data.
02, 206, and 210 are extracted (step S12). At this time, the power supply designation symbols 203, 207, 211 added to each of the rectangular data 202, 206, 210 are also extracted.

Next, the extracted rectangular data 202, 20
6,210 included in each of the logical symbols 200,2
01, 204, 205, 208, and 209 are extracted (step S13). As for the block symbol, all the logic symbols and transistor symbols of the circuit data existing in the lower hierarchy of the block symbol are extracted.

Next, the extracted logical symbols 200 and 20
For 1, 204, 205, 208, 209 and block symbols, a library attached to each symbol is stored in a transistor circuit 101 which is a part of the existing library 101.
1, 1012 and the like are searched and extracted (step S14).
In FIG. 3, for convenience of description, the transistor circuit 1011 is searched for the logical symbol 200 and the transistor circuit 1012 is searched for the logical symbol 201.

Next, the extracted symbols (in this example, 2
01), layout information including symbol position information, element numbers, terminal information, and connection information for all terminals is extracted from the circuit data 100 and temporarily saved in the layout information data 102 (step S21).

Next, in order to interpret the power supply designation symbols 203, 207 and 211 added to each of the rectangular data 202, 206 and 210, the conversion table 103 is used to determine the power supply corresponding to the power supply designation symbols 203, 207 and 211. The name and the ground name are referred to (step S22).

Next, the power supply name of the transistor circuit data 1011 and 1012 corresponding to the logic symbols 200 and 201 surrounded by the rectangular data 202, that is, the variable 1 and the ground name, that is, the variable 2 are replaced with the power supply name corresponding to the power supply designation symbol P1. And the ground name are searched from the conversion table 103, and VDD1 is set to the power supply name variable 1 and G is set to the ground name variable 2.
ND2 is substituted (step S23).

Similarly, the variables of the power supply name variable 1, the ground name variable 2 and the ground name variable 3 of the transistor circuit data 1011 and 1012 for the logical symbols 204 and 205 surrounded by the rectangular data 206 correspond to the power supply designation symbol P2. The power supply name and ground name to be used
3 search, VDD1 is set to power supply name variable 1 and ground name variable 2
And GND3 is substituted for the ground name variable 3 respectively.

Similarly, the transistor circuit data 110 corresponding to the logic symbol 208 surrounded by the rectangular data 210
The variable of the power supply name variable 1 and the ground name variable 2 of the data of the transistor circuit of the symbol used for the circuit data in the lower hierarchy of the block symbol and the block symbol
The power supply name and the ground name corresponding to the symbol P3 indicated by No. 1 are searched from the conversion table 101, and VDD2
Is substituted into the ground name variable 2 with GND3.

Next, the logical symbols 200, 201, 204, 205, 208, whose power and ground names have been converted,
209, the names of the power supply designation symbols 203, 207, 211 are added to any positions of the respective symbol names (step S24). By changing the symbol name, a library of each power supply name and ground name is automatically created.

Next, the power supply name and the ground name are changed.
The symbols whose symbol names have been changed are rearranged based on the already stored arrangement information data 102 (step S
24).

Next, after performing wiring connection processing on the rearranged symbols (Step S31), the symbols are output to the circuit data 104 (Step S32).

Next, a second embodiment of the present invention will be described with reference to FIG. 4, which is a flowchart similar to FIG. The present embodiment is different from the above-described first embodiment in that the present embodiment is a processing flow in a case where power supply is specified from an upper hierarchy, and a symbol reading step S1
A is a lower layer development information extraction step S13A for extracting lower layer development information of a symbol in rectangular data instead of the symbol extraction step S13, and a lower circuit data extraction step S1 for extracting lower circuit data of a symbol in rectangular data.
3B, the symbol arrangement step S2A includes a hierarchy arrangement information saving step S21A for saving the hierarchy information and the arrangement information of the extracted symbols instead of the arrangement information saving step S21, and performs a circuit instead of the symbol name changing step S24. It has a symbol name head character addition step S24A for adding the designated character added to the data to the symbol name head.

Next, the difference between the processing flow of this embodiment and the first embodiment will be described with reference to FIGS. 4 and 2.
After extracting 206 and 210, the extracted rectangular data 2 is used as lower layer development information of each logical symbol in the rectangular data.
Logical symbol 2 included in each of
00, 201, 204, 205, 208, and 209 are extracted (step S13A). As for the block symbols, all the logic symbols and transistor symbols of the circuit data existing in the lower hierarchy of the block symbols are extracted (step S13B).

Other than the above, it is the same as the first embodiment. Thus, the power supply name and the ground name of the logical symbol, which is the lower hierarchy, are directly specified from the upper hierarchy.

Although the embodiment of the present invention has been described above, the present invention is not limited to this, but can be applied as long as the gist of the present invention is satisfied.

For example, in the above embodiment, the symbols whose power supply name and ground name have been changed and whose symbol names have been changed are rearranged based on the already stored arrangement information data 102, and then rearranged. After performing the wiring connection process on the selected symbol, the circuit data 104 is output to the circuit data 104. In this embodiment, the circuit data 104 is converted into a netlist and output as connection information. Alternatively, an output directly as a netlist can be easily realized.

Further, in the above-described embodiment, the power supply name of each symbol is set by the rectangular data for power supply specification and the power supply designating symbol. Even if there is, the above-mentioned rectangular data and the information of the power supply designation symbol take precedence, but by specifying whether the information in which the power supply name and the ground name are designated directly for each symbol is given priority, the power supply Converting names is also easily feasible.

Further, in the above-described embodiment, the power supply of each symbol is specified by the rectangular data for power supply specification and the power supply specification symbol, or the power supply name and the ground name are directly specified for each symbol. The power supply designation symbol is specified for the symbol, and the information of the rectangular data and the power supply designation symbol is prioritized. The information in which the power supply name and the ground name are directly assigned to each symbol is prioritized. By specifying whether or not the power supply designation symbol specified is given priority, the power supply name of each symbol can be easily converted.

Further, as a modification, the rectangular data for power supply specification and the information of the power supply designation symbol, the information in which the power supply name and the ground name are directly designated for each symbol, and the power supply designation symbol designated for each symbol It is also easily possible to omit the priority designation of which one has priority and set one of them as the priority value.

Further, the rectangular data for power supply designation and the information of the power supply designation symbol, the information in which the power supply name and the ground name are directly designated for each symbol, and the power supply designation sign designated for each symbol Instead of the specification, it is also possible to easily set a standard power supply name and ground name, and to set the power name and the ground name of the symbol using the standard power supply name and ground name.

[0057]

As described above, according to the circuit data generating method of the present invention, the symbol reading step includes the symbol extracting step of extracting rectangular data for specifying the power supply, and the second step including the power specifying data corresponding to the symbol. And a library search step of designating a power supply name and a ground name in the rectangular data extracted by searching for the library of the power supply. By setting the power supply name and the ground name as variables for the symbol library, There is an effect that a single transistor circuit library can be used without preparing a transistor circuit library for each type.

Further, since there is no need to have a library of a plurality of transistor circuits, and management can be performed with a single transistor circuit library, there is an effect that daily maintenance can be simplified.

Further, there is an effect that the power supply name and the ground name used for the transistor circuit of each symbol can be automatically set.

Further, by specifying the combination of the power supply name and the ground name in the definition information specified externally, that is, the conversion table, there is an effect that various kinds of power supply names and ground names can be automatically set.

Further, by designating the power supply name and the ground name of each symbol by the rectangular data for power supply change, there is an effect that the designation of the power supply name and the ground name for each symbol becomes unnecessary.

Further, since it is possible to specify the rectangular data for power supply change from the upper layer of the circuit data, it is possible to know the power supply name and the ground name used in the whole circuit, and at the same time, the power supply name and the ground name There is an effect that correction of the data becomes easy.

[Brief description of the drawings]

FIG. 1 is a flowchart showing a first embodiment of a circuit data creation method according to the present invention.

FIG. 2 is a circuit diagram illustrating an example of circuit data of FIG. 1;

FIG. 3 is an explanatory diagram showing examples of a library and a conversion table.

FIG. 4 is a flowchart illustrating a circuit data creation method according to a second embodiment of the present invention.

FIG. 5 is a flowchart showing an example of a first conventional circuit data creation method.

FIG. 6 is a flowchart showing an example of a second conventional circuit data creation method.

[Explanation of symbols]

101, 104 circuit data 102 arrangement information data 103 conversion table 200, 201, 204, 205, 208, 209 logical symbol 202, 206, 210 rectangular data 203, 207, 211 power supply designation symbol

Claims (4)

[Claims] 1. A symbol reading step of reading a symbol representing a basic component of a circuit from a first library storing circuit data, a symbol arranging step of arranging the read symbol, and the symbol arranging step. A symbol extracting step of extracting rectangular data for specifying a power supply, and a power specifying data corresponding to the symbol. A library search step of designating a power supply name and a ground name in the rectangular data extracted by searching for a second library including the following. 2. The method according to claim 1, wherein the circuit data is hierarchized circuit data including a plurality of levels of circuit data. 2. The circuit data generating method according to claim 1, wherein a power supply name and a ground name of lower layer data existing inside the rectangular data from the hierarchy are designated. 3. The method according to claim 2, wherein the library search step includes the step of reading the second symbol of the symbol read from the first library.
The library is described by a predetermined variable, and the power supply designation information included in the rectangular data is converted by specifying the power supply name using a conversion table indicating a relationship between the power supply specification information and the variable. 2. The circuit data creation method according to claim 1, wherein: 4. Designating the power supply name and the ground name by symbolizing the designation of the power supply name and the ground name, referring to data specifying the power supply name and the ground name attached to the symbol, and substituting the data into the variables. 2. The circuit data creating method according to claim 1, wherein: