JPH11110303A - Microcomputer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce microcomputer malfunction which is caused by an overwriting condition of nonvolatile memory. SOLUTION: A controlling part 2 once stores external data in a buffer circuit 5 according to a data write instruction. After that, the part 2 outputs a write signal W and shifts the state of a write access flag in accordance with the signal W. One of data areas (a) to (d) of nonvolatile memory 7 is designated in accordance with the condition of the write access flag, data are transferred to the designated data area from the circuit 5 and the data are written. Because the write access flag maintains the condition of a pattern that corresponds to the designated data area, a data area that is currently designated can be recognized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a microcomputer having a built-in nonvolatile memory capable of collectively erasing data.

[0002]

2. Description of the Related Art Generally, a microcomputer has a built-in mask ROM for storing an operation control program and a RAM for storing data. On the other hand, a nonvolatile memory capable of electrically erasing written data electrically at a time is known as a memory. Recently, a nonvolatile memory has been built in a microcomputer instead of the mask ROM and RAM. Was. When the nonvolatile memory is incorporated in the microcomputer, there is an advantage that the nonvolatile memory can electrically erase the already-written data, so that the operation control program can be rewritten. For this reason, applications for incorporating a non-volatile memory in a microcomputer are increasing.

Here, as one of the non-volatile memories, there is a split gate type flash memory as shown in FIG. 4, and the operation of the non-volatile memory will be described. First, when writing data to the flash memory, the drain electrode 3 is grounded, a voltage of 12V is applied to the source electrode 4, and a voltage of 2V is applied to the control gate electrode. Since a large potential difference is generated between the source and the drain, a negative charge is generated during the period, and a current flows from the source to the drain. At this time, a charge called hot electron is generated according to the large potential difference between the source and the drain.
Further, since a voltage of 2 V is applied to the control gate 2, the voltage of the channel below the floating gate becomes about 9 V, and the hot electrons are pulled up and stored in the floating gate 1. When charges are stored in the floating gate 1, the channel below the floating gate 1 is positively charged, so that no current flows between the source and the drain. Therefore, this state is defined as a state of writing data “0”. If no charge is stored in the floating gate 1, the floating gate 1 is positively charged, and the channel between the source and the drain is negatively charged. Therefore, this state is a state where data “1” is written.

When reading data written in the flash memory, a voltage of 2 V is applied to the drain electrode 3, the source electrode 4 is grounded, and a voltage of about the power supply voltage is applied to the control gate electrode 5. In the case where charges are stored in the floating gate 1, since the channel below the floating gate 1 is positively charged, no current flows even if a certain potential difference is applied between the source and the drain. When no charge is stored in the floating gate 1, the control gate electrode 5
, The channel between the source and the drain is more negatively charged, and more current flows between the source and the drain. Therefore, data reading is performed by confirming the presence or absence of a current called a cell current obtained from a source.

Next, electrical erasure of data in the nonvolatile memory will be described. In FIG. 3, the source and drain electrodes 3 and 4 are grounded (0 V), the control gate electrode 5 is set to 15 V or more, and the potential difference between the control gate 2 and the source is increased. Due to this potential difference, a tunneling phenomenon occurs from the protrusion of the floating gate 1 to the control gate 2, and the charges accumulated in the floating gate 1 are drawn out to the control gate 2 as a tunneling current. In this way, the electric charge of the floating gate 1 is removed, the floating gate 1 is returned to the original state, and the electrical erasure is performed.

[0006]

The nonvolatile memory shown in FIG. 4 has a problem that erasing cannot be performed if writing / erasing is performed tens of thousands of times. How much the charge in the floating gate 1 can be removed depends on the magnitude of the voltage applied to the gate per fixed time. If the voltage to the gate is large, the charge in the floating gate 1 can be reliably removed.

However, in the prior art, the magnitude of the voltage applied to the floating gate 1 is constant for the purpose of removing the electric charge from the floating gate. Therefore, if the electrical erasure of data in the nonvolatile memory is repeated many times, the electric charge in the floating gate may be stored in the memory cells of the nonvolatile memory even if the electrical erasure is intended. May not be completely removed and may remain partially (overwriting condition). Then, when an attempt is made to write “1” into the memory cell while electric charges remain in the floating gate, the floating gate 1
, This memory cell is in the state of writing "0" and could not write "1".

[0008] The above-mentioned problem of the non-volatile memory adversely affects the microcomputer having the non-volatile memory. For example, when a nonvolatile memory is used as a RAM, writing / erasing of the nonvolatile memory is repeated by rewriting data. If this writing / erasing is repeated on the same address of the nonvolatile memory, that is, in an area including a predetermined memory cell, the overwriting state occurs. For this reason, when the microcomputer is operated, data contrary to the user's intention is written due to an overwrite state, and erroneous data and an incorrect program are stored in the non-volatile memory, which causes a malfunction of the microcomputer. I was

[0009]

According to the present invention, there is provided a nonvolatile memory capable of electrically erasing written data electrically at once,
In a microcomputer including a control unit for controlling writing and erasing of the nonvolatile memory, a plurality of data areas of a predetermined unit are provided in the nonvolatile memory.

In particular, the controller is characterized in that one of the data areas is designated to write data, and the designated data area is changed each time data is written to the nonvolatile memory. Furthermore, a write access flag for maintaining a predetermined state is provided in the nonvolatile memory so that a specified data area can be recognized.

The write access flag has a flag area corresponding to each of the data areas, and the state of the flag area changes every time data is written to the nonvolatile memory. Furthermore, an access control circuit is provided which changes the state of the write access flag in accordance with a write signal output from the control unit when writing data.

According to the present invention, since the nonvolatile memory is provided with a plurality of data areas of a predetermined unit and the data area designated to be written is sequentially changed each time data is written, the number of times of writing / erasing is changed. Are distributed to each data area, the number of times in one data area decreases, and the number of times of the entire nonvolatile memory until the overwriting state is reached can be prevented.

[0013]

FIG. 1 is a diagram showing an embodiment of the present invention. Reference numeral 1 denotes an input / output port through which external data is input / output, and 2 denotes a control unit that controls the operation of each circuit to write data from the input / output port 1 to a nonvolatile memory described later. And operates based on a program stored in a program area of a non-volatile memory (not shown), and mainly controls an operation of writing / reading data to / from the non-volatile memory 7 described later.

Reference numeral 3 denotes an R which temporarily stores external data or data generated during a program operation in accordance with an instruction from the control unit 2.
AM, 4 include an address bus, a bus for performing data transmission between the input / output port 1, the control unit 2 and the RAM 3,
Reference numeral 5 denotes a page buffer having an area for one page and temporarily storing data for one page transmitted via the data bus 6, and 7 denotes four data areas a to d capable of storing data for one page. And a write access flag indicating a state of access to the data area. The nonvolatile memory 8 stores data in the data areas a to d. This is an access control circuit that changes the state. The nonvolatile memory 7 has a built-in address circuit for designating one of the data areas a to d, and designates the data area according to the state of the write access flag.

Next, the rewriting operation of FIG. 1 will be described with reference to FIG. First, when a rewrite command is input from the outside to the control unit 2, the control unit 2 takes in data from the outside via the input port 1 and temporarily stores the data in the RAM 3 (S1). Subsequently, when the temporary storage is completed, the control unit 2 reads out the data stored in the RAM 3 for each byte and temporarily stores the data in the buffer circuit 5 for 126 bytes (= 1 page). When the transfer of one page of data to the buffer circuit 5 is completed, the control unit 2 outputs a write signal W (S2).

The write signal W is input to the access control circuit 8. Each time the access control circuit 8 receives the write signal W, it changes the state of the write access flag. The write access flag has flag areas Fa to Fd corresponding to the data areas a to d, respectively, and the state of the flag area has four patterns as shown in FIG. The flag area is formed, for example, in an area independent of the data area. The address of the flag area is designated by the access control circuit 8, and the state of the flag area is changed. Then, the access control circuit 8 sequentially changes the state of each of the flag areas Fa to Fd in the order shown by the arrow in FIG. The order of FIG. 3 is achieved by writing "0" data in the flag area marked * every time a write signal is applied, and inverting the state. When the write access flag transitions from the fourth state to the next state, the nonvolatile memory in the flag area is erased to return to the first state.

If it is assumed that the state changes from the first state to the second state by the write signal W, the flag area F marked with *
The configuration is such that a data area a corresponding to the flag area Fa one level above b is specified. That is, the address circuit built in the nonvolatile memory 7 specifies the data area a corresponding to the flag area immediately before the flag area marked with *. However, when there is a mark * in the flag area Fa, the data area d corresponding to the flag area Fd is designated. When the data area a is designated, only the data area a becomes writable.

Thereafter, one page of data is transferred from the buffer circuit 5 to the nonvolatile memory 7, and the data is written to the data area a in a writable state. Next, it is confirmed whether or not the table data written in the data area a has been correctly written. The control unit 2 outputs a read signal R, the access control circuit 8 sets the nonvolatile memory 7 to a read state, and the data area a becomes readable according to the state of the write access flag.
Then, the control unit 2 reads data from the data area a and also reads data from the RAM 3. Control unit 2
, The data in the data area a and the data in the RAM 3 are compared. That is, it is detected whether or not the data written in the nonvolatile memory 7 and the data before the writing match each other for one page (S
3).

If the data in the data area "a" does not match the data in the RAM 3, the process returns to S1 and the data is written again. The data mismatch is caused by the fact that the floating charge of the nonvolatile memory 7 at the time of erasing cannot be completely removed, so that the specified data area cannot be accurately stored. Therefore, since an accurate write operation cannot be performed in the data area a, an operation is performed to select the next data area b. That is, the data is transferred to the buffer circuit 5, the control unit 2 outputs the write signal W again, and the access control circuit 8 changes the write access flag from the second state to the third state based on the write signal W. As a result, the data area b is specified, and an attempt is made to write data to the data area b. When the data is written, an operation for confirming whether the data matches again is performed.

If the data in the data area a and the data in the RAM 3 match in S3, it is determined that the writing has been correctly performed, and the rewriting operation of the nonvolatile memory 7 ends. When the rewrite command is input to the control unit 2 again, the rewrite operation is started and the nonvolatile memory 7
Data rewriting operation is performed. Then, when the control unit 2 outputs the write signal W, the access control circuit 8 changes the state of the write access flag. As a result, the data area b is specified, and the control unit 2 attempts to write data in the data area b.

[0021]

According to the present invention, in a nonvolatile memory, a data area to which data is written is divided into a plurality of areas, and the data area is sequentially changed every time writing is performed. Distributed in the area,
The number of times in one data area decreases. This makes it possible to increase the number of times of writing / erasing of the entire nonvolatile memory until the overwriting state occurs. In a microcomputer with a built-in nonvolatile memory, the number of times of accurate data writing can be increased, so that malfunctions can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a flowchart illustrating the operation of FIG.

FIG. 3 is a diagram showing a state of a write access flag in FIG. 1;

FIG. 4 is a sectional view showing a split gate nonvolatile memory.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 I / O port 2 Control part 3 RAM 5 Buffer circuit 7 Non-volatile memory 8 Access control circuit

Claims (5)

[Claims] 1. A microcomputer comprising: a nonvolatile memory capable of electrically erasing written data in a batch; and a control unit that controls writing and erasing of the nonvolatile memory. Wherein a plurality of data areas are provided. 2. The method according to claim 1, wherein the control unit designates one of the data areas to write data, and changes the designated data area each time data is written to the nonvolatile memory. Item 18. The microcomputer according to Item 1. 3. The microcomputer according to claim 1, wherein a write access flag for maintaining a predetermined state is provided in the nonvolatile memory so that a designated data area can be recognized. 4. The write access flag has a flag area corresponding to each of the data areas, and the state of the flag area changes every time data is written to the nonvolatile memory. Item 18. The microcomputer according to Item 3. 5. The microcomputer according to claim 3, further comprising an access control circuit that changes a state of the write access flag in accordance with a write signal output from the control unit when writing data.