JPH11102990A - Printed wiring board mounted with electronic component provided with plural connection terminals arrayed in grid - Google Patents

Abstract

PROBLEM TO BE SOLVED: To perform wiring even when the number of layers is small in the case of wiring one signal line between the adjacent soldering lands of the outer peripheral part of a printed wiring board mounted with an electronic component provided with plural connection terminals arrayed in grid. SOLUTION: This wiring board is constituted so as to wire one signal line between the adjacent soldering lands 12 of the outer peripheral part of the printed wiring board mounted with the electronic component provided with the plural connection terminals arrayed in the grid shape. In this case, a part of the connection terminals in a second column from an outer side among the connection terminals in the grid shape is not provided, the soldering land is not provided on a part corresponding to it further, and areas 14a and 14b for wiring the signal line are attained.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement in a printed wiring board on which electronic components having a plurality of connection terminals arranged in a lattice such as a ball grid array semiconductor package are mounted.

[0002]

2. Description of the Related Art In recent years, the development of integrated circuits has been remarkable, and the fields which are used due to the increase in production volume and the decrease in price are used for home appliances as well as space communications and super-large computers which require extremely high reliability. It has spread to.

[0003] Further, as the scale of the integrated circuit increases, the number of terminals of the package of the integrated circuit has also increased.

[0004] However, in a package of a type in which lead wires are drawn out, there is a limit to increasing the number of lead wires unless the package mounting area is increased. Therefore, as a package that can be mounted in a small area by increasing the number of terminals, a ball grid array (hereinafter, referred to as “BG”) in which connection terminals are arranged in a lattice shape is generally used.
A) has been developed. To mount the BGA semiconductor package on the printed wiring board, solder lands are formed on the printed wiring board at locations corresponding to the terminals of the BGA semiconductor package, and solder bumps are formed between the solder lands and the terminals of the BGA semiconductor package. It is formed and connected.

A conventional printed wiring board on which a BGA semiconductor package is mounted will be described with reference to FIG.

FIG. 3 is a view showing patterning of a BGA semiconductor package mounting portion of a printed wiring board on which a BGA semiconductor package is mounted.

Reference numeral 31 indicated by a two-dot chain line indicates the outer shape of the BGA semiconductor package. Reference numeral 32 indicated by a dashed line indicates a soldering land where the resist of the printed wiring board is opened,
Reference numeral 33 denotes a conductor pattern formed by etching a copper foil on a printed wiring board. The conductor pattern 32 is basically protected and insulated by a resist, and a soldering land 32 having an opening in the resist is provided at a portion connected to a terminal of the BGA semiconductor package to expose the conductor. Solder with the connection terminal.

As described above, since the solder lands of the BGA are arranged in a concentrated manner in a two-dimensional matrix, it is particularly difficult to extract the signal line at the center part to the outside. Therefore, a part of the soldering land 35 at the center is
It has to be connected to the conductor pattern of the lower wiring layer (not shown) via the through hole 34, and it is necessary to use a multilayer printed wiring board, which causes an increase in cost.

[0009]

The printed wiring board shown in the conventional example requires at least two or more layers for signal wiring of a BGA semiconductor package as shown in FIG. In actual mounting of a BGA semiconductor package, four or six pattern layers are required for wiring replacement and shielding.

[0010] In fact, the BGA has not only connection terminals arranged in a row like SOP and QFP, but also a dense matrix-like connection. I can't do it. So, BGA
In mounting a semiconductor package, it is usual to use a printed wiring board having four or more layers.

On the other hand, the cost of the printed wiring board is unavoidable because the structure becomes more complicated as the number of layers increases. When the printed wiring board is a flexible printed wiring board, the number of layers should be as small as possible so as not to impair the flexibility of the printed wiring board. That is, it is preferable that the number of layers of the printed wiring board be as small as possible.

A first problem to be solved by the present invention is as follows.
In a printed wiring board in which one signal line is routed between adjacent solder lands on an outer peripheral portion of a printed wiring board on which electronic components having a plurality of connection terminals arranged in a lattice are mounted, wiring can be performed with a small number of layers. An object of the present invention is to provide a printed wiring board on which a printed wiring board on which an electronic component having a plurality of connection terminals arranged in a lattice is mounted.

A second problem to be solved by the present invention is as follows.
In a printed wiring board in which two signal lines are routed between adjacent soldering lands on an outer peripheral portion of a printed wiring board on which electronic components having a plurality of connection terminals arranged in a lattice are mounted, wiring can be performed with a small number of layers. An object of the present invention is to provide a printed wiring board on which a printed wiring board on which an electronic component having a plurality of connection terminals arranged in a lattice is mounted.

A third problem to be solved by the present invention is as follows.
In a printed wiring board in which n signal lines are routed between adjacent solder lands on an outer peripheral portion of a printed wiring board on which electronic components having a plurality of connection terminals arranged in a lattice are mounted, wiring is performed even with a small number of layers. An object of the present invention is to provide a printed wiring board on which a printed wiring board on which an electronic component having a plurality of connection terminals arranged in a lattice is mounted.

[0015]

SUMMARY OF THE INVENTION The present inventor has developed a specific position to be a solder land on a printed wiring board on which an electronic component having a plurality of connection terminals arranged in a lattice, such as a BGA semiconductor package, is mounted. Was found to be able to solve the above-mentioned problem by using it for wiring instead of using it as a soldering land, and completed the present invention.

[0016] In order to solve the first problem, a first aspect is provided.
The present invention described in (1) is a printed wiring board for wiring one signal line between adjacent solder lands on an outer peripheral portion of a printed wiring board on which electronic components having a plurality of connection terminals arranged in a lattice are mounted. In addition, a part of the connection terminals in the second row from the outside of the lattice-like connection terminals is not provided, and further, a region where signal lines are wired without providing soldering lands at corresponding locations.

In order to solve the second problem, a second aspect is provided.
The present invention described in (1) relates to a printed wiring board for wiring two signal lines between adjacent soldering lands on an outer peripheral portion of a printed wiring board on which electronic components having a plurality of connection terminals arranged in a lattice are mounted. The third embodiment is characterized in that some of the connection terminals in the third column from the outside of the grid-like connection terminals are not provided, and the corresponding regions are provided with signal lines without providing solder lands.

[0018] To solve the third problem, a third aspect of the present invention is provided.
The present invention described in the above is a printed wiring board for wiring n signal lines between adjacent soldering lands on the outer peripheral portion of a printed wiring board on which electronic components having a plurality of connection terminals arranged in a lattice are mounted A region in which a signal line is wired without providing a part of the connection terminals in the (n + 1) th column from the outside of the lattice-like connection terminals and providing soldering lands at corresponding locations. I have.

By doing so, it is possible to complete more signals on the BGA mounting surface of the printed wiring board. Until now, BGA wiring cannot be performed unless the board has four to six layers. One layer or two
Wiring on a printed wiring board having a small number of layers can be realized.

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the description of the embodiments of the present invention, the positions of soldering lands on a printed wiring board are described as 1 row, 2 rows,... From the top, and 1 column, 2 columns,. It shall be.

(First Embodiment) A first embodiment of the present invention will be described with reference to FIG.

FIG. 1 is a view showing patterning of a mounting layer of a BGA mounting portion of a printed wiring board on which a BGA semiconductor package (not shown) is mounted. One signal line is provided between adjacent soldering lands on the outer periphery. It relates to a design rule for wiring.

Numeral 11 indicated by a two-dot chain line indicates the outer shape of the BGA semiconductor package.

Reference numeral 12 indicated by a dashed line indicates a soldering land in which a resist on the printed wiring board is opened.

Reference numeral 13 denotes a conductor pattern formed by etching a copper foil on a printed wiring board. The conductor pattern 13 is basically protected and insulated by a resist. The resist is opened at a portion where the connection with the connection portion of the BGA semiconductor package is to be soldered, and a soldering land 12 is provided to expose the conductor. Here, soldering lands 12 with a relatively small diameter and a narrow pitch are required for soldering the BGA semiconductor package. Therefore, it is desirable to form the soldering lands 12 by a photographic method that can accurately form both the position and the size of both the (hard) printed wiring board and the flexible printed wiring board.

Although 14a and 14b are originally formed where soldering lands are formed, they are areas where no soldering lands are formed and used for wiring. In addition, since no terminal is provided on the BGA semiconductor package side corresponding to the positions of 14a and 14b, the solder balls 14a and 14b are used for soldering.
It does not exist at the position of 14b (hereinafter, referred to as “solder ball removal part”).

The combination of the printed wiring board and the BGA semiconductor package 11 of this embodiment is set so that another pattern passes between adjacent pins. At the time of this combination, the soldering land in the second row from the outside and the terminal part of the BGA semiconductor package corresponding to the soldering land are deleted and used for wiring, so that the printed wiring board side is wired only on the component mounting surface shown in the drawing. The number of possible signals can be increased.

That is, specifically, the ball removing section 14a
Indicates that the soldering lands and the terminal portions in the second row and the fourth column are not provided by dotted lines, in which the signals in the third row and the third to fifth columns and the four signals in the fourth row and the fourth column are provided. It is used for wiring. If the soldering land and the terminal portion are provided on 14a, only two signal wirings can be passed, and only three signal wirings can be passed together with the signal wiring in the second row and the fourth column. 14b
Removes the soldering lands and terminals in the 6th row and 5th column and
It is used for wiring in the same way as described above.

That is, in the mounting layer of the conventional printed wiring board on which the BGA semiconductor package is mounted, only 46/49 signals can be routed, and the three signal lines at the center are connected to the lower printed wiring board via through holes. Must be connected.

On the other hand, according to the first embodiment of the present invention,
47/49 wires can be formed on the surface of the printed wiring board on which the BGA semiconductor package is mounted, and the number of layers of the printed wiring board can be reduced. In the present embodiment, the central signal is drawn in two directions. However, in a BGA semiconductor package having a larger number of pins, these two signals can be different signals, and as a result, two more signal lines are mounted on the mounting layer. It is possible to withdraw from.

It is desirable that the ball removing portions 14a and 14b basically have no solder balls of the BGA semiconductor package 11. In the case of resist using ink,
There is a danger of short circuit of the wiring pattern due to solder entering the pinhole, and even if it is a material that does not worry about pinhole, even if it is a material of Drift film, the height of installation with other balls is There is a possibility that a difference is generated and the soldering becomes unstable, or the surplus solder that has been crushed and protrudes in the direction of another ball to cause a short circuit.

In this embodiment, the ball removing portion 14b
Although it is located at a position deviated from the center of the GA semiconductor package 11, it is desirable that the ball removing portion be disposed on the center line of the BGA semiconductor package 11 because stability during mounting is improved.

(Second Embodiment) A second embodiment of the present invention will be described with reference to FIG.

FIG. 2 is a diagram showing patterning of a mounting layer of a BGA mounting portion of a printed wiring board on which a BGA semiconductor package (not shown) having more bonding terminal portions is mounted. The present invention relates to a design rule for arranging two signal lines between lands.

Reference numeral 21 indicated by a two-dot chain line indicates the outer shape of the BGA semiconductor package.

Reference numeral 22 shown by a dashed line indicates a soldering land in which the resist of the printed wiring board is opened.

Reference numeral 23 denotes a conductor pattern formed by etching a copper foil on a printed wiring board. The conductor pattern 23 is basically protected and insulated by a resist, and a resist is opened at a portion to be soldered to a connection portion of the BGA semiconductor package, and a soldering land 22 is provided to expose the conductor.

The reference numerals 24a, 24b, 24c and 24d are places where soldering lands are formed originally, but are areas where no soldering lands are formed and used for wiring. Also,
BG corresponding to the positions of 24a, 24b, 24c, 24d
Since no terminal portion is provided on the A semiconductor package side, the solder balls 24a, 24b, 24c, 2
It does not exist at the position of 4d (hereinafter, referred to as “solder ball removal part”).

In the combination of the printed wiring board and the BGA semiconductor package 21 according to the present embodiment, two conductor patterns are set so as to pass between adjacent pins on the outer peripheral portion. In this combination, the solder lands and connection portions in the third row or the third column are deleted from the outside and used for wiring, so that more signal lines are used than in the case where there are solder lands and connection portions. Wiring can be performed only on the mounting surface 21.

The ball removing section 24a removes the solder balls in the third row and the sixth column, and the printed wiring board is used for wiring the conductor pattern 23. When there is a solder ball, only four signal lines other than the solder ball itself can pass through the left and right sides of the ball removing portion 24a, but by removing the ball, six signal lines can be passed. . Similarly, the ball removing unit 24b in the 5th row and 3rd column, the ball removing unit 24c in the 9th row and 6th column, and the ball removing unit 24d in the 7th row and 9th column can each pass many signal lines one by one.

As a result, when the signal lines of the 121-pin BGA semiconductor package 21 of the full grid introduced in this embodiment are designed with two pins between pins, the number of signals that can be wired on the conventional BGA semiconductor package mounting surface is only 102. However, according to the present invention, 106 signal lines are
Processing can be performed only on the semiconductor package mounting surface, which can contribute to a reduction in the number of layers of the printed wiring board.

As in the first and second embodiments of the present invention, when proceeding according to the design rule of arranging n signal lines between the solder lands on the outer peripheral portion, n + 1 from the outside of the BGA semiconductor package are used. By removing the connection terminals of the columns and the soldering lands of the printed wiring board and using them for wiring, the number of signals that can be processed on the BGA semiconductor package mounting surface increases, and the number of layers of the printed wiring board can be reduced.

[0043]

Conventionally, electronic components having a plurality of connection terminals arranged in a lattice, such as a BGA semiconductor package, cannot be wired unless a multilayer substrate having four or more layers is used due to the arrangement density of the connection terminals. However, according to the first to third aspects of the present invention, most signals can be wired on the electronic component mounting surface having a plurality of connection terminals arranged in a lattice such as a BGA semiconductor package. (1) Wiring is possible even with a single-layer substrate. Also, in actual use, considering changing the order of the signals,
Wiring can be sufficiently performed with a two-layer printed wiring board, the number of layers of the printed wiring board can be reduced, and cost can be reduced.

[Brief description of the drawings]

FIG. 1 is a view showing patterning of a printed wiring board according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating patterning of a printed wiring board according to a second embodiment of the present invention.

FIG. 3 is a view showing patterning of a conventional printed wiring board.

[Explanation of symbols]

 11, 21 BGA semiconductor package outer shape 12, 22 Soldering land 13, 23 Conductor pattern 14a, 14b, 24a, 24b Ball removing portion

Claims (3)

[Claims] 1. A printed wiring board in which one signal line is routed between adjacent soldering lands on an outer peripheral portion of a printed wiring board on which electronic components having a plurality of connection terminals arranged in a grid are mounted. A part of the connection terminals in the second row from the outside among the connection terminals in the shape of a circle, and a region where signal lines are wired without providing soldering lands in corresponding locations. A printed wiring board on which electronic components having a plurality of arranged connection terminals are mounted. 2. A printed wiring board for wiring two signal lines between adjacent solder lands on an outer peripheral portion of a printed wiring board on which electronic components having a plurality of connection terminals arranged in a grid are mounted. A part of the third row of connection terminals from the outside of the connection terminals is not provided, and further, a soldering land is not provided in a corresponding area to form a region for wiring a signal line. A printed wiring board on which electronic components having a plurality of arranged connection terminals are mounted. 3. A printed wiring board for wiring n signal lines between adjacent soldering lands on an outer peripheral portion of a printed wiring board on which electronic components having a plurality of connection terminals arranged in a grid are mounted. A grid in which a part of the connection terminals in the (n + 1) th column from the outside among the connection terminals of the shape is not provided, and a signal line is wired without providing a soldering land at a corresponding position. A printed wiring board on which electronic components having a plurality of connection terminals arranged in a matrix are mounted.