JPH1098012A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a low-resistance silicide film in a saliside structure or the like and to reduce variations in the sheet resistance of the silicide film on a wafer. SOLUTION: A reducing titanium film 20 has been formed previously under a cobalt film 21 as a silicide-forming material. An undercoat of natural oxide film 18 is reduced to silicon by the titanium film 20 and is silicided by the cobalt film 21. Since there is no nonuniformity of thickness in the undercoat of natural oxide film 18, the thickness of the cobalt silicide film becomes uniform. Moreover, since the natural oxide film has been previously reduced, the cobalt silicide film 22 is prevented from taking in an abundance of oxygen, and the resistance of the cobalt silicide film 22 is prevented from becoming high.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device having a silicide film in a surface layer portion of a semiconductor substrate.
The present invention relates to a method for manufacturing a semiconductor device such as an SFET.

[0002]

2. Description of the Related Art In recent semiconductor devices, the device performance and the degree of integration have been remarkably improved due to the progress of miniaturization of elements. In particular, minute design rules of 0.25 to 0.35 μm or less are applied. In high-speed logic devices and microprocessors, MOSFETs (Metal Oxide Semic
Since it is particularly important to reduce the resistance of the diffusion layer that is the source / drain of the onductor-Field Effect Transister, the diffusion layer is salicide (SALICIDE; Self Aligned).
Silicide (self-aligned silicide) is used to reduce the resistance. Generally, the salicide technique is to silicify a surface portion of a diffusion layer formed on a silicon substrate in a self-aligned manner with a gate electrode or a field oxide film (element isolation film) (compounding a metal such as titanium with silicon). This is a technique for reducing contact resistance with a wiring layer formed on an interlayer insulating film.

By the way, as the gate length is reduced in the course of device miniaturization, the junction depth of the diffusion layer (the distance from the interface between the silicide and the diffusion layer to the junction between the diffusion layer and the substrate) is increased. Becomes relatively deeper. As a result, the leakage current in the lateral direction (between the source and the drain) increases due to the short channel effect, which causes deterioration of element characteristics. Therefore, when the gate length is reduced, the junction depth of the diffusion layer also needs to be shallow (shallow junction).

[0004] Under these circumstances, when the diffusion layer is salicidated, it is desirable to form the silicide film as thin as possible to secure the junction depth of the diffusion layer. However, a thin silicide layer TiSi
_{When 2} is formed, the thin line effect (the sheet resistance increases as the line width decreases) becomes remarkable as the film becomes thinner. As a result, the gate delay time increases and the MOSFE
It becomes difficult to improve the operating frequency of T.

Therefore, recently, a technique using cobalt (Co) for forming a silicide film has been studied. When the silicide film is formed using this cobalt, the above problem can be dealt with without an increase in sheet resistance due to the thin wire effect. However, when cobalt is used as a material for silicidation, there are the following problems. Hereinafter, the problem will be described with reference to the drawings.

FIG. 3 shows a conventional method of manufacturing a MOSFET in which the source and the drain are salicidized. First, as shown in FIG. 3A, a normal LOCOS (Local Oxidation of S
After the field insulating film 112 for element isolation is selectively formed by a silicon process to define a MOSFET formation region, the gate insulating film 1 is formed in the MOSFET formation region.
13, a gate electrode 11 made of polycrystalline silicon or the like
4 is selectively formed. Next, LDD (LightlyDoped Dr.
ain) For the formation of the structure, the active region (silicon substrate 11
After the impurity is ion-implanted into the source / drain region of one surface layer to form a low-concentration impurity diffusion layer, the LD
Sidewalls 115 necessary for forming the D structure are formed on the side surfaces of the gate electrode 114, and impurities are selectively ion-implanted into the low-concentration impurity diffusion layers to form a source region 116 and a drain region as high-concentration impurity diffusion layers. 117
To form In this state, a native oxide film (SiO ₂ ) 118 has already been formed on the surfaces of the source region 116, the drain region 117 and the gate electrode 114.

Here, the substrate is cleaned as a pretreatment in the next silicide film forming step, and the natural oxide film 118 formed on the surface of the source region 116, the drain region 117 and the gate electrode 114 is removed. However, although the natural oxide film is thinned by this cleaning, it may not be completely removed and may remain, or the natural oxide film may be formed again after the cleaning. Therefore, as shown in FIG. 3B, the cobalt film 121 for silicide formation is used.
Is formed on the entire surface of the silicon film (source region 116, drain region 1)
17) and a natural oxide film 118 'as shown in FIG. 3B exists on the surface of the gate electrode 114.

Next, as shown in FIG. 3C, by performing a so-called RTA (Rapid Thermal Annealing) process, a reaction between silicon and the cobalt film 121 in the gate electrode 114, the source region 116 and the drain region 117 is performed. Then, a silicide film 122 is formed. At this time, since the silicon oxide film and the cobalt hardly react,
No silicide film is formed on the field insulating film 112 and the sidewalls 115.

Next, as shown in FIG. 3D, after the unreacted cobalt film 121 on the field insulating film 112 and the side wall 115 is removed by selective etching, the low resistance of the silicide film 122 is further reduced. A second RTA process is performed for the realization. Thereby, the gate electrode 114, the source region 116, and the drain region 11
A MOSFET having a salicide structure in which the silicide film 122 is formed in a self-aligned manner only on the gate electrode 7 is formed.

[0010]

However, as described with reference to FIG. 3A, the gate electrode 114, the source region 116, and the drain
17, a thin natural oxide film 118 'is present. Therefore, if a cobalt film 121 is formed on the natural oxide film 118' to form a salicide, non-uniformity in the degree of progress of silicidation in the wafer occurs. Occurs. This is because the silicide reaction hardly occurs on the silicon oxide film as described above, and the thickness of the natural oxide film 118 'is not uniform.
For example, as shown in FIG. 4, if an extremely thin portion or a pinhole exists in the natural oxide film 118, the source region 116 (or the drain region 11
In the surface layer portion 7), the silicidation greatly progresses and the silicide region 123 expands, and the silicide film thickness increases. On the other hand, in other portions, silicidation does not progress and the silicide film thickness decreases.

For the above reasons, the silicide film 12
2 is not uniform, and a large amount of oxygen is contained in the formed silicide film. Therefore, the resistance of the silicide film 122 is increased as a whole and the sheet of the silicide film on the wafer is formed. The resistance value also varies greatly. Such a phenomenon becomes more conspicuous as the thickness of the cobalt film 121 becomes thinner, and may become an even greater problem in future highly integrated devices.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to reduce the resistance of a silicide film in a salicide structure or the like and to reduce the variation in the sheet resistance of the silicide film on a wafer. It is an object of the present invention to provide a method of manufacturing a semiconductor device that can be used.

[0013]

According to a method of manufacturing a semiconductor device according to the present invention, a first metal film having a reducing property is formed on a semiconductor substrate, and a natural oxide film formed on the semiconductor substrate is reduced. A step of forming a second metal film for silicide formation on the first metal film, and a step of heat-treating the second metal film and the semiconductor substrate to form a thin silicide film on a surface layer portion of the semiconductor substrate. Forming step. For example, a titanium film is used as the first metal film, and its thickness is desirably set to, for example, 20 nm or less. Also,
A cobalt film is used as the second metal film, and its thickness is desirably, for example, 10 nm or less.

Further, in another method of manufacturing a semiconductor device according to the present invention, the method further comprises forming the second metal film on the second metal film after forming the second metal film and before forming the silicide film by heat treatment. The step of forming a protective film for preventing spontaneous oxidation of the second metal film is performed. As the protective film, for example, a titanium nitride film is used.

In the method for manufacturing a semiconductor device according to the present invention,
The underlying natural oxide film is reduced by the reducing first metal film formed beforehand under the second metal film, and then a silicide film is formed. For this reason, it is possible to avoid the inconvenience that the thickness of the silicide film becomes uneven due to the presence of the natural oxide film having an uneven film thickness, and to prevent a large amount of oxygen from being taken into the silicide film.

In another method for manufacturing a semiconductor device according to the present invention, since a protective film is formed on the second metal film and then heat treatment is performed to form silicide, oxidation of the second metal film is prevented. Thus, it is possible to reliably prevent oxygen from being taken into the silicide film.

[0017]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 shows a method of manufacturing a semiconductor device according to an embodiment of the present invention. In the present embodiment,
A case where the present invention is applied to the manufacture of an n-channel MOSFET in which the source and the drain are salicidized will be described.

First, as shown in FIG. 1A, a field insulating film 12 for element isolation is selectively formed on a p-type silicon substrate 11 by a normal LOCOS process to define a MOSFET formation region. After that, the surface of the silicon substrate 11 in the MOSFET formation region is oxidized by a thermal oxidation method or the like, and a gate insulating film 13 is formed. Next, polycrystalline silicon (polysilicon) is formed by using a low pressure
A gate electrode layer made of a film is formed. The gate electrode layer may have a polycide structure obtained by laminating a WSi _X (tungsten silicide) layer on the polycrystalline silicon.

Next, a photoresist film (not shown) is formed on the entire surface and patterned by a photolithography process, and the gate electrode layer is selectively etched by using the photoresist film as an etching mask. To form Next, to form the LDD structure,
An n ^- impurity is ion-implanted into an active region (a region serving as a source / drain region of the surface layer of the silicon substrate 11) to form a low-concentration n ^- impurity diffusion layer. Side walls 15 necessary for forming the LDD structure are formed on the side surfaces of the gate electrode 14, and n ⁺ impurities are selectively ion-implanted into the n ⁻ impurity diffusion layers to form a high-concentration n ⁺ impurity diffusion layer. A source region 16 and a drain region 17 are formed.

In this state, a natural oxide film (SiO ₂ ) 18 has already been formed on the surfaces of the source region 16, the drain region 17 and the gate electrode 14. Next, the substrate is cleaned to remove it. However, although the natural oxide film is thinned by this cleaning, it cannot be completely removed in practice but remains, or a natural oxide film is formed again after the cleaning.

Next, as shown in FIG. 1 (b), titanium (T
i) The film 20 is formed to a thickness of about 10 nm. The sputtering conditions in this case include, for example, an output of 3 kW and a pressure of 2 mTorr.
r, temperature 150 ° C. Further, as shown in FIG. 1C, immediately after the formation of the titanium film 20, a cobalt film 21 for silicide formation is formed on the entire surface to a thickness of about 5 nm. The sputtering conditions in this case are, for example, an output of 0.8 kW, a pressure of 2 mTorr, and a temperature of 150 ° C.

When the titanium film 20 is formed, the natural oxide film 18 is reduced to silicon (Si) by the following reaction,
As shown in FIG. 1C, the natural oxide film 18 disappears, and instead the titanium film 20 is oxidized to form a titanium oxide film (TiO 2).
₂ ) 20 'is generated. Ti + SiO ₂ → Si + TiO ₂ Of course, this reaction also occurs on the field insulating film 12 and the sidewalls 15, so that the titanium oxide film 20 'is eventually formed on the entire surface.

Next, as shown in FIG. 1D, by performing a first RTA process, silicon in the gate electrode 14, the source region 16 and the drain region 17 reacts with the cobalt film 21, and Silicide film 2
Form 2 The RTA process in this case is performed, for example, in an atmosphere of 100% nitrogen at a temperature of 550 ° C. for a time of 30 seconds. At this time, since the silicon oxide film and the cobalt hardly react with each other, no cobalt silicide film is formed on the field insulating film 12 and the sidewalls 15, and the unreacted cobalt film 21 remains.

Next, although not shown, the field insulating film 1
2 and unreacted cobalt film 2 on sidewall 15
1 and the titanium oxide film 20 'are removed by selective etching. The etching at this time is, for example, H ₂ SO
₄ (sulfuric acid) and H ₂ O ₂ (hydrogen peroxide solution) in a ratio of 4: 1 sulfuric acid and hydrogen peroxide, and wet etching is performed, for example, at a temperature of 90 ° C. and a time of about 10 minutes. And Next, a second RTA process is performed to reduce the resistance of the cobalt silicide film 22. The RTA process in this case is performed, for example, in an atmosphere of nitrogen 100% under the conditions of a temperature of 700 ° C. and a time of 30 seconds.

In this manner, an n-channel MOSFET having a salicide structure in which the cobalt silicide film 22 is formed in a self-aligned manner only on the gate electrode 14, the source region 16 and the drain region 17 is formed. After that,
Although not shown, after forming an interlayer insulating film, a wiring layer, a contact between substrate wirings, and the like, a protective film is formed to complete the entire process.

As described above (FIG. 1A), a thin natural oxide film 18 that hinders silicidation exists on the gate electrode 14, the source region 16 and the drain region 17 even after the substrate is cleaned. However, in the present embodiment, a titanium film 20 having a reducing property is formed thereon to form the natural oxide film 1.
8 is reduced to silicon, and then the silicidation reaction of the cobalt film 21 is performed. Therefore, the progress of silicidation in the wafer due to the presence of a natural oxide film having a non-uniform thickness as in the prior art. There is no non-uniformity in the image. In addition, a large amount of oxygen is not taken into the cobalt silicide film 22 when the cobalt silicide film 22 is formed, and the silicide film is prevented from having a high resistance.

Next, another embodiment of the present invention will be described.

FIG. 2 shows a method of manufacturing a semiconductor device according to another embodiment of the present invention. In the present embodiment, steps up to the formation of the titanium film 20 (FIG. 2A,
(B)) is the same as the above-described embodiment (FIGS. 1 (a) and 1 (b)), and a description thereof will be omitted.

In this embodiment, as shown in FIG. 2C, immediately after the formation of the titanium film 20, a cobalt film 21 for silicide formation is formed on the entire surface to a thickness of about 5 nm. Further, a titanium nitride film (TiN film) 24 is formed thereon as a cap metal (protective film).
The titanium nitride film 24 is for preventing the cobalt film 21 from being oxidized in the subsequent RTA process. Here, the sputtering conditions at the time of forming the cobalt film 21 are the same as in the above embodiment. The sputtering at the time of forming the titanium nitride film 24 is performed, for example, at an output of 6.5 kW
Under a condition of a pressure of 4.5 mTorr and a temperature of 150 ° C., about 135 sccm of nitrogen and 15 sccc of argon are provided.
m.

The subsequent steps and operations are the same as those in the above embodiment. That is, when the titanium film 20 is formed, the natural oxide film 18 is reduced to silicon,
As shown in FIG. 2C, the natural oxide film 18 returns to silicon, and a titanium oxide film 20 'is generated instead.

Next, as shown in FIG.
By performing the processing, the gate electrode 14, the source region 1
The cobalt silicide film 22 is formed by reacting the silicon in the silicon film 6 and the drain region 17 with the cobalt film 21. The conditions of the RTA process in this case are the same as those in the above embodiment. At this time, since the silicon oxide film and the cobalt hardly react with each other, no cobalt silicide film is formed on the field insulating film 12 and the sidewalls 15, and the unreacted cobalt film 21 remains.

Next, although not shown, the titanium nitride film 24
And the unreacted cobalt film 21 on the field insulating film 12 and the sidewall 15 and the titanium oxide film 20 'are sequentially removed by selective etching. For the etching of the titanium nitride film 24 at this time, for example, an ammonia peroxide mixture obtained by mixing NH ₃ (ammonia) and H ₂ O ₂ (hydrogen peroxide solution) at a ratio of 4: 1 is used, and unreacted cobalt is used. For the etching of the film 21, sulfuric acid / hydrogen peroxide is used as in the case of the above embodiment. In addition, in the case of etching with ammonia and hydrogen peroxide, in addition to the titanium nitride film 24, the source
The titanium oxide film 20 'in the drain region is also removed, but the unreacted cobalt film 21 exists on the field insulating film 12 and the sidewalls 15, so that the titanium oxide film 20 under the cobalt film 21 in these regions is removed. 'Is not removed by ammonia and hydrogen peroxide, but is removed by etching with sulfuric acid and hydrogen peroxide.

Next, a second RTA process is performed to lower the resistance of the cobalt silicide film 22. R in this case
The TA processing is the second RTA in the above embodiment.
This is the same as the embodiment of the processing.

In this way, an n-channel MOSFET having a salicide structure in which the cobalt silicide film 22 is formed in a self-aligned manner only on the gate electrode 14, the source region 16 and the drain region 17 is formed. After that,
Although not shown, after forming an interlayer insulating film, a wiring layer, a contact between substrate wirings, and the like, a protective film is formed to complete the entire process.

As described above, also in this embodiment,
Since the silicidation reaction of the cobalt film 21 is performed after the titanium oxide film 20 is formed and the natural oxide film 18 is reduced and extinguished, a cobalt silicide film having a uniform thickness distribution can be formed. . Moreover, in the present embodiment, the first RTA process is performed in a state where the titanium nitride film 24 as the oxidation protection film is formed on the cobalt film 21, so that a large amount of Oxygen can be reliably prevented from being taken into the film,
There is a further effect in preventing the silicide film from having a high resistance.

FIGS. 5 and 6 compare the uniformity of the silicide film thickness distribution on an 8-inch wafer when a cobalt silicide film is formed by the conventional method and the method according to the present invention.

FIG. 5A shows the structure of the cobalt film 21.
FIG. 5B shows the uniformity of the film thickness distribution of the cobalt silicide film 22 before the sintering process (the first RTA process) when sputtered at 150 ° C.
This shows the uniformity of the film thickness distribution of the cobalt silicide film 22 before the sintering process when the sputtering is performed at 450 ° C. In these figures, the horizontal axis represents the thickness of the formed cobalt film 21, and the vertical axis represents the uniformity of the thickness distribution of the cobalt silicide film 22 in the wafer with respect to each cobalt thickness. In addition, the symbol ■ indicates the result when only the cobalt film 21 was formed (conventional method), and the symbol ▲ indicates the cobalt film 2.
1 shows the results when the titanium film 20 was formed under the method of FIG. 1 (the method of FIG. 1), and the triangle marks indicate that the titanium film 20 was formed under the cobalt film 21 and that the titanium nitride film 24 as a cap metal was The result of the case of forming (the method of FIG. 2) is shown. In addition, the mark ● represents the reference data, which is a result when a titanium nitride film as a cap metal is formed on the cobalt film without forming a titanium film below the cobalt film.

On the other hand, FIG. 6A and FIG.
(A) and (b), respectively, showing the uniformity of the film thickness distribution of the cobalt silicide film 22 after each sintering process. The vertical axis, horizontal axis,
The meanings of the marks (■, ▲, Δ, ●) are the same as those in FIG.

As is clear from FIG. 5, before the sintering process, there is no significant difference in the uniformity of the film thickness distribution of the cobalt silicide film 22 in each case of the sputtering at 150 ° C. In this case, a method using a single layer of a cobalt film or a method in which a titanium nitride film is provided on a cobalt film have better uniformity of the film thickness distribution. On the contrary,
After sintering, as is apparent from FIG.
In both cases of C sputtering and 450 ° C. sputtering, a method of forming a titanium film under a cobalt film (FIG. 1), a method of forming a titanium film under a cobalt film and a method of forming a titanium nitride film on a cobalt film According to the method (FIG. 2), the uniformity of the film thickness distribution is much better. In particular, FIG.
As shown in FIG. 2A, in the case of sputtering at 150 ° C., when the method of forming a titanium film under a cobalt film and forming a titanium nitride film on a cobalt film (FIG. 2) is used, it is 10% or less. Uniform film thickness distribution characteristics are obtained. In particular, when the film thickness of the cobalt film 21 is 10 nm or less, the film thickness distribution uniformity is 5% or less. FIG.
As shown in (b), even in the case of sputtering at 450 ° C., if the thickness of the cobalt film 21 is set to 10 nm or less, the uniform film thickness of 10% or less is obtained by any of the methods shown in FIGS. Distribution characteristics are obtained.

Although the present invention has been described with reference to the embodiment, the present invention is not limited to this embodiment, and can be variously modified within an equivalent range. For example, in each of the above embodiments, the thickness of the titanium film 20 is set to 10 nm.
However, this film thickness can be changed with an upper limit of 20 nm. In addition, the thickness of the cobalt film 21 is set to 5 nm, but this thickness can be changed up to 10 nm.

In each of the above embodiments, an n-channel MOSFET has been described. However, it is needless to say that the present invention can be applied to a p-channel MOSFET and a CMOS (complementary MOS) FET.
(Metal Insulater Semiconductor) It can also be applied to devices of type structure.

In each of the above embodiments, the present invention is applied to the manufacture of a device having a salicide structure. However, the present invention is not necessarily limited to the salicide structure.
In general, the present invention can also be applied to a case where a silicide film is formed on a silicon substrate in a device having a shallow junction.

[0044]

As described above, according to the method of manufacturing a semiconductor device according to any one of the first to fifth aspects, a reducing property is previously formed under the second metal film as a silicide forming material. The first metal film is formed, thereby reducing the underlying natural oxide film and then performing silicidation by the second metal film. Therefore, the presence of the non-uniform natural oxide film causes silicide formation. The inconvenience of nonuniformity even in the film thickness can be avoided. In particular, when a titanium film is used as the first metal film and a cobalt film having no fine wire effect is used as the second metal film, the thickness of the cobalt film is reduced to 10 nm.
By the following, the sheet resistance of the silicide film can be reduced, and the silicide film thickness in the wafer can be made sufficiently uniform. That is, variation in sheet resistance of the silicide film in the wafer can be reduced. Further, by reducing the natural oxide film in advance, it is possible to prevent a large amount of oxygen from being taken into the silicide film, so that the resistance of the silicide film can be reduced also in this regard. Therefore, in the future, MOS with source / drain salicide
Even if the FET becomes shallow junction, the silicide film can be formed thinly and uniformly in response to this, which is extremely effective in reducing the contact resistance and the like.

According to the method of manufacturing a semiconductor device of the present invention, a protective film is further formed on the second metal film after forming the second metal film and before forming the silicide film by heat treatment. Therefore, the oxidation of the second metal film can be prevented, and oxygen can be reliably prevented from being taken into the silicide film. Therefore, there is a further effect in lowering the resistance of the silicide film.

[Brief description of the drawings]

FIG. 1 is an element cross-sectional view illustrating a main step of a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is an element cross-sectional view illustrating main steps of a method for manufacturing a semiconductor device according to another embodiment of the present invention.

FIG. 3 is an element cross-sectional view illustrating a main step of a conventional semiconductor device manufacturing method.

FIG. 4 is an enlarged view of a cross section of a main part of FIG. 3;

FIG. 5 is a diagram showing a comparison between the conventional method and the method according to the present invention.

FIG. 6 shows a comparison between the conventional method and the method according to the invention.

[Explanation of symbols]

11: silicon substrate, 12: field insulating film, 13 ...
Gate insulating film, 14 gate electrode, 16 source region,
17: drain region, 18, 18 ': natural oxide film, 20
... titanium film (first metal film), 20 '... titanium oxide film,
21: cobalt film (second metal film), 22: cobalt silicide film, 24: titanium nitride film (protective film)

Claims (7)

[Claims] A step of forming a first metal film having a reducing property on a semiconductor substrate and reducing a natural oxide film formed on the semiconductor substrate; and a step of forming a silicide on the first metal film. A semiconductor device comprising: forming a second metal film; and reacting the second metal film with the semiconductor substrate by heat treatment to form a thin silicide film on a surface portion of the semiconductor substrate. Manufacturing method. 2. The method according to claim 1, wherein the first metal film is a titanium film. 3. The method according to claim 1, wherein the second metal film is a cobalt film. 4. The method according to claim 2, wherein said titanium film has a thickness of 20 nm or less. 5. The method according to claim 3, wherein the thickness of the cobalt film is 10 nm or less. 6. The method according to claim 1, further comprising: after the step of forming the second metal film and before the step of forming the silicide film by the heat treatment,
2. The method of manufacturing a semiconductor device according to claim 1, wherein a step of forming a protective film for preventing natural oxidation of the second metal film is performed on the second metal film. 7. The method according to claim 6, wherein the protective film is made of a titanium nitride film.