JPH1094269A - Inverter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an inverter in which short circuit of a switching element can be detected without requiring any DC current detector on the DC bus. SOLUTION: On the unit arm 7U for phase U in an inverter main circuit, the protective circuit 34a for an IGBT6X is provided with a Zener diode 31 and a photocoupler 32. When an IGBT6U is short-circuited, voltage of a DC power supply 20 is applied directly between the collector and the emitter of the IGBT6X. Consequently, the Zener diode 31 being applied with the voltage of the DC power supply 20 divided by resistors 28, 29 and 30 is broken down and light is emitted from the LED 32a in the photocoupler 32. Since the input terminal of a clocked inverter 34 goes low, a gate block siqnal Bx is delivered from the clocked inverter 34 upon receiving a RUN signal from a microcomputer and short circuit failure of the IGBT6U is detected.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention comprises an inverter main circuit having a plurality of unit arms each composed of a series circuit of two switching elements, and control means for providing a gate signal to the inverter main circuit. It relates to an inverter device.

[0002]

2. Description of the Related Art FIG. 6 shows a conventional configuration example of such an inverter device. An output terminal of the AC power supply 1 is connected to an AC input terminal of a rectifier circuit 2 configured by bridge-connecting diodes, and a DC output terminal of the rectifier circuit 2 is connected to a DC bus 3.
a, 3b. DC buses 3a, 3b
The smoothing capacitor 4 is connected between them.

Each of the inverter main circuits 5 has two IGBs.
T (switching element) 6U and 6X, 6V and 6Y,
Unit arms 7U, 7 each comprising a series circuit of 6W and 6Z
V, 7W, and their unit arms 7U, 7V, 7W
Is connected between the DC buses 3a and 3b. A freewheel diode (not shown) is connected between the collector and the emitter of each of the IGBTs 6U to 6Z.

Output terminals 5U, 5 of inverter main circuit 5
V and 5W are respectively connected to the respective phase windings of the AC motor 8 as a load. An output terminal of a microcomputer (hereinafter referred to as a microcomputer) 9 is connected to gates of the IGBTs 6U to 6Z via a gate drive circuit (not shown), and the microcomputer 9 controls the IGBTs 6U to 6Z in accordance with an operation command given from the outside. A gate signal is supplied to the gate of the gate.

Output terminals 5U and 5 of inverter main circuit 5
AC current detectors 10U and 10W are provided between W and the AC motor 8, and a DC current detector 11 is provided between the smoothing capacitor 4 and the unit arm 7U in the DC bus 3a. Have been. Output terminals of the AC current detectors 10U and 10W and the DC current detector 11 are connected to a plurality of input terminals of the overcurrent detection circuit 12, respectively. The overcurrent detection circuit 12 generates and supplies the overcurrent detection signal OC to the microcomputer 9 when the current value of each phase output from the inverter main circuit 5 becomes equal to or more than a predetermined value. And the microcomputer 9
When the overcurrent detection signal OC is supplied, the gate signal supplied to the gates of the IGBTs 6U to 6Z is blocked.

Further, the microcomputer 9 supplies a check pulse signal to the gates of the IGBTs 6U to 6Z sequentially before starting the start of the AC motor 8 to detect a short-circuit failure. In this case, if any of the IGBTs 6U to 6Z is short-circuited, the unit arm of the short-circuited phase and the smoothing capacitor 4 while the check pulse signal is being supplied.
Since the short-circuit current flows through the loop and is detected by the DC current detector 11, the microcomputer 9 also blocks the gate signal.

[0007]

However, in the inverter device having such a configuration, the IGBTs 6U to 6U
DC current detector 11 only to detect Z short-circuit fault
It is necessary to provide. In this case, during operation of AC motor 8, IGBTs 6U to 6U are connected to DC buses 3a and 3b.
A pulse current having a cycle corresponding to the switching frequency of Z flows. Therefore, in particular, when the DC current detector 11 is formed of the most common Hall element, heat generation becomes a problem when the switching frequency is high.

Also, structurally, when the DC current detector 11 is provided on the DC bus 3a, the distance between the smoothing capacitor 4 and the inverter main circuit 5 is unavoidably increased, and the DC bus 3a The L component of 3b will increase. For this reason, it is difficult for the smoothing capacitor 4 to absorb the surge voltage generated when the IGBTs 6U to 6Z are turned on and off, and it is necessary to provide a snubber circuit or the like as a measure against the surge voltage. From the above, there is a problem that the inverter device has a complicated structure and is large.

The present invention has been made to solve the above problems, and
An object of the present invention is to provide an inverter device capable of detecting a short circuit of a switching element without requiring a DC current detector on a DC bus.

[0010]

According to a first aspect of the present invention, there is provided an inverter device having a plurality of unit arms each including a series circuit of first and second switching elements, and an output terminal. And a control means for supplying a drive signal to the switching element in response to an operation command given from the outside, wherein a voltage between terminals of the first switching element is detected. A protection circuit for lowering the level of the drive signal applied to the first switching element when the inter-terminal voltage becomes equal to or higher than a predetermined value; and a voltage detection means provided in the protection circuit. And short-circuit detection means for outputting a short-circuit detection signal when a voltage corresponding to a state in which the terminals of the second switching element are short-circuited is detected. .

With this configuration, when a short-circuit fault occurs between the terminals of the second switching element, the short-circuit detecting means is provided by the voltage detecting means of the protection circuit provided for the first switching element. The short circuit is detected based on the detected voltage. Therefore, there is no need to provide a DC current detector as in the conventional configuration.

An inverter device according to a second aspect of the present invention includes a plurality of unit arms each including a series circuit of first and second switching elements, and includes an inverter main circuit for driving a load connected to an output terminal; Control means for providing a drive signal to a switching element in response to an operation command given from the outside, wherein a plurality of switching elements constituting an inverter main circuit are individually provided, and an ON state between terminals of each switching element is provided. On-state detecting means for detecting the rising time of the voltage between the terminals of each switching element based on the time from the rise of the drive signal given from the control means to the on-state detecting means detecting the on-state, Dead time compensation for dead time compensation of the drive signal given to each switching element according to its rise time And road, with the driving signal control means gives a check pulse to the first switching element,
Short-circuit detection means for outputting a short-circuit detection signal when a short circuit between the terminals of the first or second switching element is detected based on the detection state of the on-state detection means provided in the second switching element. It is characterized by.

According to this structure, when a short-circuit fault occurs between the terminals of the first or second switching element, the short-circuit detecting means performs a dead-time compensation on the first switching element. The short circuit is detected based on the detection state of the provided ON state detection means.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment in which the present invention is applied to a voltage type inverter device will be described below with reference to FIGS. The same parts as those in FIG. 6 are denoted by the same reference numerals, and the description thereof will be omitted. FIG. 1 is a diagram showing a detailed electrical configuration centered on the U-phase unit arm 7U of the inverter main circuit 5.
A DC power supply 20 is connected to both ends of the unit arm 7U. The DC power supply 20 is equivalent to a DC power supply provided via the rectifier circuit 2 and the smoothing capacitor 4 shown in FIG. .

The gate drive circuit 21 includes an NPN transistor 21 having a base and an emitter connected in common.
a and a PNP transistor 21b. The emitters of the transistors 21a and 21b are connected to the gate of the IGBT 6X. The collector of the transistor 21a is connected to the positive terminal of the gate driving power supply 24 via the resistor 23, and the collector of the transistor 21b is connected to the DC bus 3b together with the negative terminal of the gate driving power supply 24. .

The bases of the transistors 21a and 21b are connected to the output terminal 9a of the microcomputer 9 as a control means via a resistor 25, and to the collector of an NPN transistor 27 via a zener diode 26 of the illustrated polarity. Have been. The emitter of the transistor 27 is connected to the DC bus 3b, the base of the transistor 27 is connected to the output terminal 5U of the inverter main circuit 5 via a series circuit of resistors 28 and 29, and the resistor 30 Connected to the DC bus 3b. The resistor 25, the Zener diode 26, the transistor 27, and the resistors 28 to 30 constitute a protection circuit 30a.

The common connection point of the resistors 28 and 29 is connected to the DC bus 3b via a Zener diode 31 and an LED 32a of the illustrated polarity. This LED 32a
The output side of the phototransistor 32b constitutes the input side of the photocoupler 32. The emitter of the phototransistor 32b is connected to the ground of a control power supply (not shown).
3 and connected to the output terminal + Vcc of the control power supply and to the input terminal of the clocked inverter 34.

The zener diode 31, the photocoupler 32, the resistor 33 and the clocked inverter 34 constitute a short-circuit detecting means 34a. The Zener voltage of the Zener diode 31 is set to a value lower than the voltage level of the drive signal Gx output from the microcomputer 9 by a predetermined value or more.

The control terminal of the clocked inverter 34 is supplied with a RUN signal from the microcomputer 9 (see FIG. 2). The clocked inverter 34 outputs a signal obtained by inverting the level of the input signal only while a high-level signal is being supplied to the control terminal. In other cases, the output terminal is in a high impedance state. The output terminal of the clocked inverter 34 is connected to the input terminal of the microcomputer 9 via a bus (see FIG. 2).
It is connected to the ground of the control power supply via a resistor 35. The gate drive circuit 21, the protection circuit 30a,
The gate circuit 36X is constituted by the short-circuit detecting means 34a and the like.

FIG. 2 shows a connection relationship between the entire inverter main circuit 5 and the microcomputer 9. Each IGBT6U,
6V, 6W, 6Y, and 6Z have gate circuits 36U, 36V, and 36 configured similarly to the gate circuit 36X, respectively.
W, 36Y and 36Z are provided. In this figure, a gate drive power supply 24 common to the negative side elements and a gate drive power supply common to the positive side elements are omitted.

A resistance corresponding to the resistor 29 in the gate circuit 36X is connected to the output terminals 5U, 5V, 5W of the inverter main circuit 5 in the gate circuits 36Y, 36Z, respectively, and the gate circuits 36U, 36V, At 36W, it is connected to the DC bus 3a. Further, a gate circuit 36U,
In the case of 36V, 36W, the portions of the gate circuit 36X connected to the DC bus 3b are connected to the output terminals 5U, 5V, 5W of the inverter main circuit 5, respectively. still,
The DC current detector 11 and the overcurrent detection circuit 12 are omitted from the configuration shown in FIG.

Next, the operation of the first embodiment will be described. First, the operation of the protection circuit 30a will be described. The microcomputer 9 is based on an operation command given from the outside,
By outputting drive signals Gu to Gz to the gate circuits 36U to 36Z, a gate signal is given to the IGBTs 6U to 6Z to drive the AC motor 8.

When the drive signal Gx is given from the microcomputer 9, the first switching element I
When the collector current flowing through the IGBT 6X is within the normal range while the GBT 6X is on, the collector-emitter (terminal-to-terminal) voltage Vce is relatively low, and the voltage Vce
The transistor 27 in which ce is divided by the resistors 28, 29 and 30 and applied to the base is turned off. At this time, the gate voltage Vge is changed to the collector-emitter voltage Vce
Becomes approximately equal to

In this state, if the collector current of the IGBT 6X exceeds the normal range and flows excessively, the collector-emitter voltage Vce becomes a predetermined value or more, so that the base current flows through the transistor 27 and turns on. State. Then, the potential applied to the bases of the transistors 21a and 21b of the gate drive circuit 21 is limited to the potential determined by the Zener diode 26.
As a result, the gate voltage Vge becomes lower than the collector-emitter voltage Vce, so that the collector current flowing through the IGBT 6X is limited, and the element is prevented from being destroyed.

Next, the operation of the short-circuit detecting means 34a at the time of starting the AC motor 8 will be described. When the IGBT 6U as the second switching element has a short-circuit fault, the voltage of the DC power supply 20 is directly applied between the collector and the emitter of the IGBT 6X. In this case, the Zener diode 31 to which the potential obtained by dividing the voltage of the DC power supply 20 by the resistors 28, 29 and 30 is broken down, and the LED 32a of the photocoupler 32 emits light.

Then, the input terminal of the clocked inverter 34 becomes low level. At this time, the microcomputer 9 sends the RU
When the N signal is output, a high-level signal, that is, the gate block signal Bx is output to the output terminal of the clocked inverter 34, so that the microcomputer 9 can recognize that the IGBT 6U has a short-circuit failure. it can.

The case where the short circuit fault of the IGBT 6U is detected by the gate circuit 36X of the IGBT 6X has been described above. However, when the short circuit fault of the IGBT 6X is detected,
Conversely, the operation is performed by the gate circuit 36U of the IGBT 6U.
In this case, the IGBT 6U is the first switching element according to the present invention, and the IGBT 6X is the second switching element. If the IGBT 6X is short-circuited, the photocoupler turns on when the potential on the cathode side of the LED in the gate circuit 36 corresponding to the LED 32a of the photocoupler 32 drops to the potential of the DC bus 3b, that is, the ground level. Short circuits can be detected in a similar manner.

As described above, according to this embodiment, the IGBT
By providing the Zener diode 31 and the photocoupler 32 in the 6X protection circuit 34a, the DC current detector 11 (see FIG. 6) is no longer required to detect a short-circuit failure of the IGBT 6U unlike the related art. Therefore, the distance between the smoothing capacitor 4 and the inverter main circuit 5 can be shortened to reduce the L component of the DC buses 3a and 3b. Therefore, the surge voltage generated when each of the IGBTs 6U to 6Z is turned on and off is reduced. Is possible,
In addition, the structure of the inverter device can be made simple and small.

Next, a second embodiment of the present invention will be described with reference to FIGS. The same parts as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted. Only different parts will be described below. In FIG. 3 showing a detailed electrical configuration centered on the unit arm 7U, in the present embodiment, the gate circuits 36U and 36X are omitted, and the drive signals Gu and Gx output from the microcomputer 9 are as described later. It is provided to the gates of the IGBTs 6U and 6X via dead time compensation circuits 37U and 37X having various functions.

A resistor 38X and a photocoupler 39X are connected between the output terminal 5U of the inverter main circuit 5 and the DC bus 3b.
Is connected to a series circuit with the LED 39a on the input side. The emitter of the phototransistor 39b on the output side of the photocoupler 39X is connected to the ground of the control power supply, and the collector is the output terminal + V of the control power supply via the resistor 40X.
cc and dead time compensation circuit 37
It is connected to the X input terminal. The resistor 38X, the photocoupler 39X and the resistor 40X are connected to the on-state detecting means 4
1X. Note that, also on the IGBT 6U side, the resistors 38U and 40U and the photocoupler 39U are provided as the ON state detecting means 41U (the resistor 38U).
And a series circuit of the photocoupler 39U is connected between the DC bus 3a and the output terminal 5U).

The collector of the phototransistor 39b is connected to the inverter 42a and the clocked inverter 42.
b and AND gate 43 and OR gate 44
Are connected to one of the input terminals. The other input terminal of the AND gate 43 receives a drive signal G from the microcomputer 9.
u is given, and the output terminal is connected to the other input terminal of the OR gate 44 via the clocked inverter 45.

The output terminals of clocked inverters 42b and 45 are connected to ground via resistors 46 and 47, respectively. The drive signal Gu is supplied from the microcomputer 9 to the control terminal of the clocked inverter 45, and the drive signal Gu is supplied to the control terminal of the clocked inverter 42b via the inverter 48. ing.

The output terminal of the OR gate 44 is connected to the CK input terminal of the D flip-flop 49 whose D input terminal is pulled up to the output terminal of the control power supply + Vcc.
The Q output terminal of the flip-flop 49 is connected to the input terminal of the microcomputer 9 via a three-state buffer 50. The control terminal of the three-state buffer 50 is supplied with a RUN signal from the microcomputer 9. The output terminal of the three-state buffer 50 is connected to the ground via a resistor 51.

The inverters 42a and 48, the clocked inverters 42b and 45, the AND gate 43 and the O
The R gate 44, the resistors 46 and 47, the D flip-flop 49 and the three-state buffer 50
2. In addition, although only the unit arm 7U has been described above, the configuration is the same for the unit arms 7V and 7W.

Next, the operation of the second embodiment will be described with reference to FIGS. 4 shows the output waveform from the microcomputer 9, and FIG. 5 shows the level of the drive signal Gu output as a check pulse and the output of points A, B and C (see FIG. 3) in the short-circuit detecting means 52. It is a figure showing the relation with a level.

Dead time compensation circuits 37U and 37X
Is a gate signal that compensates for an appropriate dead time with respect to the drive signals Gu and Gx given from the microcomputer 9 in order to prevent a short-circuit current from flowing when the IGBTs 6U and 6X of the unit arm 7U are simultaneously turned on. To the gates of IGBTs 6U and 6X.

For example, the dead time compensating circuit 37X
The state where the IGBT 6X is turned on is detected based on the fact that the resistor 38X and the LED 39a of the photocoupler 39X are short-circuited and the photocoupler 39X is turned off.
The time from when the gate signal for X is output to when the IGBT 6X is turned on is obtained, and the dead time for compensating the gate signal to be output next time is adjusted according to the time.

Then, the microcomputer 9 outputs the drive signal Gu as a single check pulse before the start of the start of the AC motor 8 (see FIG. 4B). When this check pulse is at a low level (L), the clocked inverter 42
The control terminal b goes high (H). Also, IGB
Since the T6U is off, when the IGBT 6U is normal, no current flows through the LED 39a and the photocoupler 39 does not.
X turns off. Therefore, the clocked inverter 42b
Is at a high level, and a low-level signal is output to the OR gate 44 (FIG. 5, A).

At this time, if the IGBT 6U has a short-circuit fault, a current flows through the LED 39a and the photocoupler 39
X turns on, the input terminal of the clocked inverter 42b goes low, and a high-level signal is output to the OR gate 44 (FIG. 5, A). Then, the D flip-flop 49 outputs the output signal of the OR gate 44 (FIG. 5,
Triggered by C), the Q output terminal goes high.

On the other hand, when the check pulse is at a high level, the control terminal of the clocked inverter 45 is at a high level. The IGBT 6U is turned on, and the IGB
Since T6X is off, when the IGBT 6X is normal, a current flows through the LED 39a and the photocoupler 39
X turns on. Accordingly, the input terminal of the inverter 42a is at a low level, and both input terminals of the AND gate 43 are supplied with a high-level signal. Then, AND
The output signal of the gate 43 is supplied as a low-level signal to the OR gate 44 via the clocked inverter 45 (FIG. 5, A).

At this time, if the IGBT 6X has a short-circuit fault, the series circuit of the resistor 38X and the LED 39a is short-circuited, the photo-coupler 39X is turned off, and the inverter 4X is turned off.
The input terminal 2a goes high, and the AND gate 4
A low-level signal is supplied to one of the input terminals 3. Then, the output signal of the AND gate 43 is given as a high level signal to the OR gate 44 via the clocked inverter 45 (FIG. 5, B), and the D flip-flop 49 is triggered by the output signal of the OR gate 44. As a result, the Q output terminal goes high. As described above, when the drive signal Gu as the check pulse is at the low level, the IG
A short-circuit fault is detected for BT6U, and when the check pulse is at a high level, a short-circuit fault is detected for IGBT6X.

As shown in FIG. 4A, the microcomputer 9
After the output of the check pulse, the RUN signal is output before the start of starting of the AC motor 8, thereby referring to the output signal of the D flip-flop 49 via the three-state buffer 50. When any one of the IGBTs 6U and 6X has a short-circuit fault, the output signal of the D flip-flop 49 is at a high level, so that the microcomputer 9
Stop starting.

Also, regarding the unit arms 7V and 7W,
Similarly, by providing the drive signals Gv and Gw as check pulses, short-circuit faults of the IGBTs 6V and 6Y, 6W and 6Z can be detected.

As described above, according to the second embodiment, the IGB
Photocoupler 3 of T6X dead time compensation circuit 36X
By providing the short-circuit detecting means 52 in the 9X, a short-circuit fault of the IGBT 6U or 6X can be detected by the detection state of the on-state detecting means 41X used for dead time compensation, so that the same effect as in the first embodiment can be obtained. Can be

The present invention is not limited to the embodiment described above and shown in the drawings, and the following modifications or extensions are possible. The switching element is not limited to the IGBT, but may be a power MOSFET or a power transistor. Although applied to a voltage type inverter device, it may be applied to a current type inverter device. The short-circuit detecting means 52 of the second embodiment may be incorporated in the microcomputer 9. With this configuration, the entire inverter device can be made smaller.

[0046]

Since the present invention is as described above,
The following effects are obtained. According to the inverter device of the first aspect, the short-circuit detecting means includes a voltage corresponding to a state in which the voltage detecting means of the protection circuit provided for the first switching element has a short-circuit between terminals of the second switching element. Is detected, a short-circuit detection signal is output, so that a surge voltage generated when the switching element is turned on and off can be reduced, and the structure can be made simple and small.

According to the inverter device of the second aspect,
The short-circuit detecting means is connected to a terminal of the first or second switching element in response to a drive signal given to the first switching element by the control means as a check pulse, according to a detection state of the on-state detecting means provided in the second switching element. When a short circuit is detected, a short circuit detection signal is output.
The same effect as the first aspect is obtained.

[Brief description of the drawings]

FIG. 1 is an electrical configuration diagram centering on a U-phase unit arm showing a first embodiment of the present invention.

FIG. 2 is a schematic configuration diagram mainly showing an inverter main circuit and a microcomputer;

FIG. 3 is a view corresponding to FIG. 1, showing a second embodiment of the present invention.

FIG. 4 is a timing chart of a drive signal at the start of starting the AC motor.

FIG. 5 is a diagram showing the output level of each unit in the short-circuit detecting means with respect to the input of a check pulse.

FIG. 6 is a diagram corresponding to FIG. 2 showing a conventional technique.

[Explanation of symbols]

5 is an inverter main circuit, 6U and 6X, 6V and 6Y,
6W and 6Z are IGBTs (switching elements), 7U,
7V and 7W are unit arms, 8 is an AC motor (load),
9 is a microcomputer (control means), 30a is a protection circuit, 34a is a short-circuit detecting means, 37U and 37X are dead time compensating circuits, 41U and 41X are on-state detecting means, and 52 is a short-circuit detecting means.

Claims (2)

[Claims] An inverter main circuit for driving a load connected to an output terminal, comprising: a plurality of unit arms each comprising a series circuit of first and second switching elements; An inverter device comprising: a control unit that supplies a drive signal to the switching element in response to the control signal. The voltage detection unit detects a voltage between terminals of the first switching element, and the terminal voltage is equal to or higher than a predetermined value. And a protection circuit for lowering the level of the drive signal applied to the first switching element when the voltage of the second switching element is short-circuited by the voltage detection means of the protection circuit. An inverter device comprising: a short-circuit detection unit that outputs a short-circuit detection signal when a voltage is detected. 2. An inverter main circuit for driving a load connected to an output terminal, comprising: a plurality of unit arms each comprising a series circuit of first and second switching elements; An inverter device provided with control means for providing a drive signal to the switching element in response to the ON state, wherein the ON state is provided separately for a plurality of switching elements constituting the inverter main circuit, and detects an ON state between terminals of each switching element. State detection means, and detects the rise time of the voltage between the terminals of each switching element based on the time from the rise of the drive signal given from the control means to the on-state detection means detecting the on-state, Dead time for dead time compensation of the drive signal given to each of the switching elements according to the rise time A compensation circuit; and a drive signal given as a check pulse to the first switching element by the control means in response to a detection state of the on-state detection means provided in the second switching element. An inverter device comprising: a short-circuit detection unit that outputs a short-circuit detection signal when a short circuit between terminals of a switching element is detected.