JPH1093868A - Solid-state image pickup element and its drive method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce ununiformity of signals due to dispersion in characteristics for each picture element by reading respectively a 1st signal component and a 2nd signal component whose storage time differs in an amplifier type solid- state image pickup element and using the difference for an output signal. SOLUTION: A light is received for a 1st time, e.g., a time being 1/10 of a usual storage time for one vertical period V, and after the signal charge is stored, the charge of a 1st signal component S1 is read. The picture element is not reset as it is and a 2nd time T2 is received, after the signal charge is being stored, the charge of the 2nd signal component S2 is read. After the charge of the 2nd signal component S2 is read, the picture element is reset. Thus, even when dispersion in the picture element characteristic is in existence for a low illuminance part of input output characteristic, the storage time T1 of the 1st signal component is set to a time in excess of the dispersion and a difference between the 2nd signal component S2 and the 1st signal component S1 is taken to suppress unevenness and roughness of a pattern resulting from the dispersion in the characteristic.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device of, for example, an amplification type and a driving method thereof.

[0002]

2. Description of the Related Art In recent years, in accordance with a demand for higher resolution of a solid-state imaging device, an amplification type solid-state imaging device which has no smear and can realize fine pixels has been developed instead of a CCD solid-state imaging device. This amplifying solid-state imaging device forms a pixel with an active element (for example, a MOS transistor) in order to give each pixel an amplifying action of an optical signal, and modulates the electric charge accumulated in the pixel by photoelectric conversion in the transistor. It is configured to read out a signal.

[0003]

As described above, an amplification type solid-state imaging device is an active device (for example, a MOS transistor).
, The variation of the active element is directly superimposed on the video signal. Since this variation has a fixed value for each pixel, it appears as fixed pattern noise in a captured image. The fixed pattern noise is not a variation in sensitivity to incident light, but a variation in pixel threshold value added to a signal amount according to incident light.

Therefore, a difference between a signal output and a noise output is obtained, and the difference is used as an output to remove fixed pattern noise generated due to a pixel transistor.

That is, as shown in the operation phase of FIG.
In the vertical repetition period V, after the charge accumulation period in which the signal charge is accumulated, the signal charge is read, and then all the charges accumulated in the pixel are reset, and then the signal after the pixel reset, that is, the noise component is read. Then, the difference between the signal component and the noise component is output. In this readout method, when no charge is accumulated in a pixel, that is, when noise is read out at an accumulation time of 0, when a difference in characteristics between pixels is present in a low illuminance portion of input / output characteristics, a difference is calculated. This variation component remained even after the noise was canceled by removing the noise, and appeared rough on the screen.

This problem will be described in detail with reference to FIG.

There are two pixels, pixel A and pixel B.
As shown in FIG. 0A, the relationship between the signal output and the accumulation time indicates that the pixel A has a certain noise component and the signal output has a characteristic that increases in proportion to the increase of the charge accumulation time, while the pixel B has the noise characteristic. It is assumed that the component is almost minute, but the signal output rises slowly and the linearity is poor during the short accumulation time, and then the signal output increases at a constant rate with respect to the accumulation time.

In this case, in the region where the signal output-accumulation time of the pixel B is short in the accumulation time, that is, in the above-described low illuminance portion, the signal output rises slowly, that is, in a so-called cat-foot state, so that the signal output and noise are reduced. Even if noise is canceled by taking a difference from the component, as shown in FIG. 10B, a variation component appears in the output signal after noise cancellation between the pixel A and the pixel B.

In order to solve the above-mentioned problem, the present invention provides a solid-state image pickup device capable of reducing a signal non-uniformity due to a variation in characteristics of each pixel and obtaining a good image, and a driving method thereof. Is what you do.

[0010]

According to the present invention, a first signal component is read out after receiving and accumulating light for a first time, and without detecting a second time after receiving light for a second time without resetting the pixel. Read signal components.

According to the present invention, by reading out the first signal component and the second signal component having different accumulation times, for example, the difference between the first and second signal components is used as the output signal. Thus, it is possible to remove the influence of a variation in characteristics for each pixel, and to obtain a good image. still,
By adding the first and second signal components, a high dynamic range can be obtained.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A solid-state image pickup device according to the present invention comprises a means for reading out a first signal component after receiving and accumulating light for a first time, and a means for reading and accumulating light for a second time without resetting a pixel. , A means for reading the second signal component.

Further, the present invention is configured such that the solid-state imaging device has an operation means for outputting a difference between the first signal component and the second signal component.

The method for driving a solid-state image pickup device according to the present invention comprises:
After receiving and accumulating the light for the time, the first signal component is read out,
It is assumed that the second signal component is read out after the light reception is detected for the second time without resetting the pixel.

Further, according to the present invention, in the above-mentioned method for driving a solid-state imaging device, a difference between the first signal component and the second signal component is obtained.

Hereinafter, an embodiment of a solid-state imaging device and a driving method thereof according to the present invention will be described with reference to the drawings.

In this embodiment, as shown in the operation phase of FIG. 1, in one vertical repetition period V, light is received for a first time T1, for example, 1/10 of the normal accumulation time, and signal charge After accumulation, the first signal component S
Read out the charge of 1 and do not reset the pixel
Further, after receiving the light for the second time T2 and continuing to accumulate the signal charge, the charge of the second signal component S2 is read. After reading out the charge of the second signal component S2, the pixel is reset.

Through such a process, even if the characteristics of the pixel have variations in the low illuminance portion of the input / output characteristics as described above, the accumulation time on the first signal component side, that is, the first Is set as the time T1 over the low illuminance portion where these characteristics are not constant, and the second signal component S2
By taking the difference signal between the first signal component S1 and the first signal component S1, such a variation in the characteristics can be canceled.

FIG. 2 shows a first signal component S1 and a second signal component S2 of the present embodiment for two pixels having different characteristics similar to those of FIG.
The output signal when reading is shown.

FIG. 2A is a diagram showing the relationship between accumulation time and signal output.
FIG. 2B is a diagram comparing the difference signal between the pixel A and the pixel B.

A first signal component S1 is read out after a first time T1 set to a time exceeding a low illuminance portion in which characteristics of the pixel A and the pixel B are different from each other, and then a second time T2
After the elapse, the second signal component S2 is read, and a difference signal between these signals is obtained.

Since the characteristics of the pixel are substantially constant between the first time T1 and the second time T2, the output signals of the pixels A and B are obtained as shown in FIG. Can be eliminated.

This operation is summarized as follows.

1) First, the first time is set to a time exceeding a low illuminance portion where the characteristics of the transistor of the pixel vary.
After the light reception and accumulation for the time T1, the charge of the first signal component S1 is read.

2) Since the charge can be read out in a non-destructive manner in the amplification type solid-state image pickup device, after reading out the charge of the first signal component S1, the light reception and accumulation are continuously performed without resetting the pixel. Is added to the charge of the signal component S1 of the light receiving and storing for a predetermined second time T2.

3) After the lapse of the second time T2, the charge of the second signal component S2 is read.

At this time, the electric charge of the second signal component S2 is
Since the charge is accumulated in a form added to the first signal component S1, the charge becomes larger than the charge of the first signal component S1.

4) Reset the pixel and start the next accumulation.

Thus, the first signal component S1 and the second signal component S2 are read.

The difference between the first signal component S1 and the second signal component S2 is used as an output signal.

FIG. 3 shows a circuit configuration of the amplification type solid-state imaging device 10 according to the present embodiment. That is, this is the first signal component S1 that is received and accumulated for the same pixel for the first time T1.
This is an example of a circuit configuration that makes it possible to read out the second signal component S2 received and accumulated for a second time T2 in addition thereto.

FIG. 3 shows a circuit configuration corresponding to one pixel.

In the circuit configuration shown in FIG. 3, light receiving elements constituting a plurality of unit pixels (cells), that is, pixel MOS transistors 11 are arranged in a matrix, and the gate of each pixel MOS transistor 11 is constituted by a shift register or the like. a vertical scanning signal (or vertical selection _{pulse) φV [φV 1, φV i} , φV i + 1, ‥‥] from the vertical scanning circuit 12 that is connected to the vertical selection line 13 is selected by a drain power supply V _DD, and the source for each column is a vertical signal line 14.
Connected to.

The signal voltage (charge) is applied to the vertical signal line 14 via the operation MOS switch 15 (15a, 15b) composed of, for example, a MOS transistor on both sides symmetrically.
Is connected to the load capacitance element 16 (16a, 16b). The load capacitance element 16 is connected between the vertical signal line 14 and the ground potential. Operation MOS the gate of the switch 15 operation pulse _{φ OPS (φ OPS1, φ OPS2} ) is applied.

The vertical signal line 14 between the source of the pixel MOS transistor 11 and the operation MOS switch 15 resets the load capacitance element 16 and resets the vertical signal line 14, that is, charges the source-side parasitic capacitance of the pixel MOS transistor 11. For example, a reset bias voltage V _RB via a reset MOS switch 17 including a MOS transistor also serving as the reset bias voltage V _RB
Is connected to a reset bias voltage supply terminal 18 for supplying the same. The reset pulse φ _RST is supplied to the gate of the reset MOS switch 17. In this example, the power supply V _DD and the pixel MOS transistor 1
A switch (for example, a MOS switch) 31 is connected to the drain of the pixel 1 and a switch (for example, a MOS switch) 32 is connected between the reset bias voltage supply terminal 18 and the drain of the pixel MOS transistor 11.

Reference numeral 19 (19a, 19b) denotes a horizontal shift register, which is connected to a horizontal signal line 20 (20a, 20b), for example, a MOS transistor.
Horizontal MOS switch 21 (21
a, sequential horizontal scanning signal to the gate of 21b) (i.e. the horizontal scanning _{pulse) φH [φH 1, ‥‥ φH} n, φH n + 1, ‥
‥] is supplied. Although not shown, an output circuit (for example, a charge detection circuit) is connected to an output terminal of the horizontal signal line 20. Here, the first horizontal shift register 19a, the first horizontal signal line 20a, the first horizontal MOS switch 21a, the first load capacitance element 16a, the first operation MOS switch 15a, and the reset MOS switch 17 One horizontal scanning circuit 34a, a second horizontal shift register 19b, a second horizontal signal line 20b, and a second horizontal MOS
Switch 21b, second load capacitance element 16b, second operating MOS switch 15b, reset MOS switch 17
Thus, the second horizontal scanning circuit 34b is configured.

In the present embodiment, the first operation MOS switch 15a is used to read the first signal component S1.
A first load capacitance element 16a, a first operation pulse φ _OPS1 ,
First horizontal shift register 19a, first horizontal signal line 2
0a, using the first horizontal MOS switch 21a,
The second operation MOS switch 15b, the second load capacitance element 16b, the second operation pulse φ _OPS2 , the second horizontal shift register 19b, the second horizontal signal line 20b, the second The horizontal MOS switch 21b is used.

FIG. 4 is a sectional view showing a semiconductor structure of a light receiving element as a unit pixel, that is, a pixel MOS transistor 11.

Incidentally, a solid-state image pickup device can be constructed in the same manner in the case of the p-channel.

The pixel MOS transistor 11 has a first
A second conductivity type, for example, an n-type semiconductor region 5 and a p-type semiconductor region 6 serving as overflow barrier regions are sequentially formed on a conductivity type, for example, a p-type silicon semiconductor substrate 4.
On the surface of the type semiconductor region 6, a so-called sensor region 8 made of a p-type semiconductor region having a higher concentration is formed.
Further, a ring-shaped gate electrode 1 capable of transmitting light is formed on the sensor region 8 via a gate insulating film 9 made of, for example, SiO ₂ or the like, and at positions corresponding to the inside and outside of the ring-shaped gate electrode 1. An n-type source region 2 and a drain region 3 are formed respectively, and signal charges accumulated under the gate are prevented from leaking to adjacent pixels in the p-type semiconductor region 6 immediately below the drain region 3. An n-type channel stop region 7 is formed.

Although not shown, a plurality of the pixel MOS transistors 11 are arranged in a matrix to form the amplification type solid-state imaging device 10.

In the pixel MOS transistor 11, as shown in FIG. 4, the light L transmitted through the ring-shaped gate electrode 1 is photoelectrically converted in the silicon semiconductor to generate a pair of electrons and holes. One charge, in this example, the hole h is accumulated as a signal charge in the potential well formed in the p-type sensor region 8 below the gate electrode 1. The modulation of the substrate bias by the charge (hole) h is taken out as a signal. That is, when a high-level potential is applied to the gate electrode 1 through the vertical selection line and the pixel MOS transistor 11 is turned on, a channel current (a so-called drain current) flows to a channel on the surface of the sensor region 8 and the channel current is a signal charge h. Therefore, the channel current is output through a vertical signal line connected to the source region 2 and the amount of change is used as a signal output.

FIG. 5 shows a schematic configuration (block diagram) of the amplification type solid-state imaging device having the circuit configuration shown in FIG.

In the pixel area 30, the vertical scanning circuit 1
2. The first horizontal scanning circuit 34a for the first signal component S1
And the second horizontal scanning circuit 34b for the second signal component S2
Is connected.

The vertical scanning circuit 12 has a vertical scanning pulse (vertical clock) φV, a first start pulse φVS1 for reading the first signal component S1, and a second start pulse φVS1 for reading the second signal component S2. Start pulse φVS2 is applied.

The first and second horizontal scanning circuits 34a and 34a
The 4b, first and second operation pulse phi _OPS1 and phi _OPS2 are applied respectively, also the horizontal scanning pulse (horizontal clock) .phi.H reset pulse phi _RST is applied.

A substrate pulse φ _SUB used for resetting the pixel is applied to the pixel region 30.

The outline of the reading operation in this example will be described with reference to the block diagram of FIG.

First, when the first start pulse φVS1 is applied to the vertical scanning circuit 12, a clock for reading the first signal component S1 from the vertical scanning circuit 12 in order from the first row (V ₁ ). A pulse is applied.

Subsequently, for example, when the clock pulse reaches the i-th row, a second start pulse φVS2 is applied, and the clock for reading the second signal component S2 again from the first row in the vertical scanning circuit again. A pulse is applied.

Therefore, when the first signal component S1 is read out on the (n + i) th row and output by the first horizontal scanning circuit 34a, the second signal component S2 is read out on the nth row and the second horizontal scanning is performed. Output from the circuit 34b.

The vertical synchronous drive timing in this case is shown in FIG.
Shown in

Each vertical scanning signal φV [φV ₁ , Δφ
_{V n, ‥‥ φV n + i} , ‥‥] is 1 vertical repetition period 1
Since two pulse rises during and V, the first pulse P ₁ rises relative to the first start pulse FaiVS1, the second pulse P ₂ is a second start pulse φVS2
Stand up based on

The second start pulse φVS2 takes a time iH after the first start pulse φVS1 rises.
It rises after the elapse of (a period corresponding to i-times horizontal repetition cycle H). Therefore, in each vertical scanning signal φV, the time between the first pulse P ₁ and the second pulse P ₂ corresponds to iH. Then, the reading of the first signal component S1 is the first pulse P ₁ is performed, the reading of the second signal component S2 is performed in the second pulse P _2. In FIG. 6, 1H indicates one horizontal repetition period.

In the case of this drive timing, the second pulse P for reading out the second signal component S2 of φV _n in the _n- th row
₂ and the first pulse P ₁ for reading out the first signal component S 1 of φV _{n + i} in the ( _{n + i} ) _th row rise almost simultaneously.

From FIG. 6 and FIG. 1 described above, the accumulation time of the second signal component, that is, the second time T2 is almost one vertical because the time for reading the second signal component and the time for resetting the pixel are short. The repetition period corresponds to 1V, and the accumulation time of the first signal component, that is, the first time T1, substantially corresponds to the time obtained by subtracting the above-mentioned iH from one vertical repetition period 1V.

Since the first signal component S1 and the second signal component S2 from the same pixel cannot be output simultaneously, the first signal component S1 is temporarily stored in order to output a difference signal. It is necessary to store it in a means, that is, a memory or the like.

Therefore, as shown in FIG. 7, for example, the storage means 22 is connected to the first horizontal signal line 20a, and the storage means 2 is connected to the first horizontal signal line 20a.
2 and the second horizontal signal line 20 b are connected to the difference circuit 23.

Then, the first signal component S1 is stored in the storage means 2
2 and a second signal component S2 read later
And the first signal component S1 stored in the storage unit 22 are synchronized and subtracted by the difference circuit 23 to obtain a pixel output signal _Tout .

Next, the operation of the amplification type solid-state imaging device of this embodiment shown in FIG. 3 will be described in more detail.

FIG. 8 shows an example of a horizontal synchronization timing chart for the circuit configuration of FIG.

In this example, the second signal component S2 of the pixel MOS transistor 11 in the n-th row and the pixel MO in the n + i-th row
This is a case where the first signal component of the S transistor 11 is read in the same horizontal blanking period H _BLK .
Pixel MOS transistors 1 in other rows (ie, m rows)
1 is in an off state.

The operation of reading out the signal voltage in the pixel MOS transistor 11, that is, the signal voltage corresponding to the channel potential corresponding to the signal charge amount (hole amount) stored in the pixel MOS transistor 11, to the load capacitance element 16 is as follows. This is performed during the horizontal blanking period H _BLK .

[0064] That is, a pulse P ₂ of the horizontal blanking period H _BLK vertical scanning signal .phi.V _n to the gate of the n-th row of the pixel MOS transistor 11 in the first half period of is applied.

In the period, the reset pulse φ _RST is _supplied to turn on the reset MOS switch 17, and at the same time, the second operation pulse φ _OPS2 is _supplied , and the second operation M
When the OS switch 15b is also turned on, the vertical signal line 14
Is reset, and the second load capacitance element 16b is reset to the reset bias voltage V _RB . At this time, when the switch 31 is turned off and the switch 32 is turned on, the reset bias voltage V _RB is applied to the source and the drain of the pixel MOS transistor 11 to have the same potential. Does not flow.

Next, during the period, the reset MOS switch 17 is turned off, the second operation MOS switch 15b is turned on, and simultaneously the switch 31 is turned on and the switch 32 is turned off. 11, a signal voltage of the pixel MOS transistor 11 is held in the second load capacitance element 16b, and the second signal component S2 of the selected pixel (nth row) is read.

Next, after the reading of the second signal component S2 is completed, during the period, the substrate pulse φ _SUB is applied to the substrate, and the charges (holes) accumulated in the pixel MOS transistors 11 in the n-th row are removed. Is discharged through.

Next, the second pulse P ₂ of the vertical scanning signal φVn in the _n- th row is turned off, and the n-th row becomes a non-selected pixel. In the latter half of the horizontal blanking period H _BLK , the pixel MOS of the (n + i) -th row is used. The first vertical scanning signal is applied to the gate of the transistor 11.
Pulse P ₁ is applied. During the period, the reset pulse φ _RST is given to turn on the reset MOS switch 17, and at the same time, the first operation pulse φ _OPS1 is given,
When the first operation MOS switch 15a is also turned on, the vertical signal line 14 is reset, and the first load capacitance element 16
a is reset to the reset bias voltage V _RB . At this time, as described above, the switch 31 is turned off and the switch 32 is turned on, so that the source and the drain of the pixel MOS transistor have the same potential (V _RB ), and the current of the pixel MOS transistor 11 does not flow.

Next, during the period, the reset MOS switch 17 is turned off, the first operation MOS switch 15a is turned on, and simultaneously, the switch 31 is turned on and the switch 32 is turned off. 11, a signal voltage of the pixel MOS transistors 11 in the (n + i) th row is held in the first load capacitance element 16a, and the first signal component S1 of the selected pixel (the (n + i) th row) is read.

Thereafter, during the horizontal effective scanning period T _A , the horizontal scanning pulse φH [φH ₁ ,.
By turning on the horizontal MOS switch 21 by _{ φH _n , φH _{n + 1} ,.
Flows through the second horizontal signal line 20b, and the first signal component S1 of the pixels in the (n + i) -th row flows through the first horizontal signal line 20a, and is output as a signal voltage through each output circuit.

The operation is as described above.

As described above, after the light reception and accumulation for the first time T1, the first signal component S1 is read out, and after the light reception and accumulation for the second time T2 without resetting the pixel, the second signal component S1 is read out. S2 is read out, and the difference between the first signal component S1 and the second signal component S2 is taken, thereby canceling the non-uniformity of the signal component due to the variation in the characteristics of the pixel and causing the variation in the characteristics of the pixel. The non-uniformity and unevenness of the screen can be suppressed, and a good image can be obtained.

As another application of the present invention, the first signal component S1 is a signal component that is not saturated, and is subjected to necessary signal processing.
By adding the first and second signal components S2, a solid-state imaging device with a high dynamic range can be configured.

In the above example, the case where the reading operation is performed during the horizontal blanking period has been described. However, the present invention is also applicable to the case where the reading operation is performed during the horizontal effective scanning period.

The present invention is not limited to the above-described amplification type solid-state imaging device, but can be applied to an amplification type solid-state imaging device such as a CMD.

The solid-state image pickup device and the method of driving the same according to the present invention are not limited to the above-described example, and may take various other configurations without departing from the gist of the present invention.

[0077]

According to the present invention described above, the first signal component is read out after the light reception and accumulation for the first time, the pixel is not reset, and after the light reception is detected for the second time, the second signal component is read out.
By reading out the signal components of
And taking the difference between the second signal component and the second signal component, canceling the non-uniformity of the signal component due to the variation in the characteristics of the pixel,
It is possible to suppress non-uniformity and unevenness of the screen, which are caused by variations in pixel characteristics. In addition, for example, the dynamic range can be improved by adding the first and second signal components.

Accordingly, it is possible to obtain an image having good characteristics and good image quality.

[Brief description of the drawings]

FIG. 1 is a diagram showing an operation phase in a vertical effective scanning period of an embodiment of an amplification type solid-state imaging device according to the present invention.

FIGS. 2A and 2B are diagrams illustrating signal output to pixels having different characteristics in the amplification type solid-state imaging device according to the present invention. FIGS.

FIG. 3 is an embodiment of an amplification type solid-state imaging device according to the present invention;
FIG. 3 is a circuit configuration diagram corresponding to a pixel.

FIG. 4 is a schematic configuration diagram (a cross-sectional view including a partial perspective view) of a semiconductor structure of an embodiment of an amplification type solid-state imaging device according to the present invention.

FIG. 5 is a block diagram illustrating a schematic configuration of an embodiment of an amplification type solid-state imaging device according to the present invention.

FIG. 6 is a vertical synchronous drive timing chart of the embodiment of the amplification type solid-state imaging device according to the present invention.

FIG. 7 is a configuration diagram of a signal output circuit of an embodiment of the amplification type solid-state imaging device according to the present invention.

FIG. 8 is a horizontal synchronous drive timing chart of the embodiment of the amplification type solid-state imaging device according to the present invention.

FIG. 9 is a diagram showing an operation phase in a vertical effective scanning period of the amplification type solid-state imaging device of the comparative example.

FIGS. 10A and 10B are diagrams illustrating signal output to pixels having different characteristics in the solid-state imaging device of the comparative example.

[Explanation of symbols]

1 gate electrode, 2 source region, 3 drain region,
4 semiconductor substrate, 5 overflow barrier region, 6
p-type semiconductor region, 7 channel stop region, 8 sensor region, 9 gate insulating film, 10 amplification type solid-state imaging device,
11 pixel MOS transistor, 12 vertical scanning circuit,
13 vertical select line, 14 vertical signal line, 15 operation MO
S switch, 16 load capacitance element, 17 reset MO
S switch, 18 reset bias voltage supply terminal, 1
9 horizontal shift register, 20 horizontal signal lines, 21 horizontal MOS switch, 22 storage means, 23 difference circuit, 3
0 pixel area, 31 and 32 switches, 34 horizontal scanning circuit, V vertical repetition cycle, T1 first time, T2
Second time, S1 first signal component, S2 the second signal component, H _BLK horizontal blanking period, T _A horizontal effective scanning period, H horizontal repetition period, P ₁ a first pulse, P ₂ second pulse

Claims (4)

[Claims] 1. A means for reading out a first signal component after receiving and accumulating light for a first time, and means for reading out a second signal component after receiving and accumulating light for a second time without resetting a pixel. A solid-state imaging device, comprising: 2. The solid-state imaging device according to claim 1, further comprising an operation unit that outputs a difference between the first signal component and the second signal component. 3. The method according to claim 2, wherein the first signal component is read out after the light reception and accumulation for the first time, and the second signal component is read out after the light reception is detected for the second time without resetting the pixel. Of driving a solid-state imaging device. 4. The method according to claim 3, wherein a difference between the first signal component and the second signal component is obtained.