JPH1084492A - Data converter and data conversion method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve an interpolation accuracy with respect to a generation of a black level signal, for preventing an interpolation circuit from being complicated and to prevent a long time processing in a color conversion, using an interpolation arithmetic operation. SOLUTION: In the case of converting 2-dimensional input data Xi, Yi, based on high-order bit data Xh, Yh, a value denoted by an equation of Sa=4 T-A-B-C-D is added to grading point data B or C among grading point data A-D, read out of lookup tables(LUT) 111-114 depending on the relation of quantity of low-order bit data Xf, Yf of input data. Then an interpolation arithmetic section 109 uses the grating point data revised by the addition and the grating point data read out of the LUT, the resulting converted data are outputted. Thus, the revised grating point data are used for extrapolating interpolation data on which corresponding grating point data to a center of an interpolation space are reflected.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data conversion apparatus and a data conversion apparatus for converting a plurality of (multi-dimensional) signals into another signal by using a lookup table (hereinafter also referred to as LUT) together with an interpolation operation. Regarding the conversion method.

[0002]

2. Description of the Related Art As a typical data conversion apparatus or data conversion method of this type, a data conversion apparatus or a data conversion method has been known. This color conversion performs non-linear conversion of a digitized color image signal, for example, gamma conversion and log conversion, and is often performed using an LUT. This is because if an attempt is made to execute color conversion only by an arithmetic circuit, the arithmetic circuit for that purpose becomes complicated and the circuit scale becomes large. On the other hand, using an LUT, for example, an arbitrary non-linear signal is converted into an 8-bit video signal. This is because a 256-byte memory is sufficient when performing the conversion. An LUT used to convert one image signal into another image signal having another property is called a one-dimensional LUT.

On the other hand, with the recent remarkable progress of the desktop publishing (hereinafter abbreviated as DTP) environment, it has become possible to easily handle color images. Input devices for inputting color images in such DTP are mainly scanners, video cameras and the like, while output devices are generally various color printers such as ink jet, dye sublimation type or electrophotography. In addition to such a DTP system, a copying machine having both input and output devices is well known to execute color conversion.

The above-described color input and output devices have their own color spaces. For example, even if color image data obtained from a certain scanner is directly transferred to another color printer to print an image, The color of the print image rarely matches the color of the original image. Therefore,
By performing the above-described color conversion, it is necessary to convert the color space of the input device to the color space of the output device. Specifically, this color conversion (hereinafter also referred to as color space conversion) is performed by three colors (generally, Red) of the input device.
The image signals of three colors (red), green (green), and blue (blue) (hereinafter abbreviated as R, G, and B) are converted into three-color or four-color image signals on the output device side. .

By the way, if the processing of converting the three color image signals of the input device into one color of the output device is to be performed using only the LUT, for example, when the image signal is represented by 8 bits per color, In other words, a 24-bit input and 8-bit output LUT requires a memory capacity of 16 Mbytes. Further, since the above-mentioned memory is required for the number of colors of the output device, the actual memory capacity is as large as 48 to 64 Mbytes.

In such color conversion requiring a relatively large-capacity memory, it is known that the memory capacity of the LUT is reduced by using interpolation processing in combination with the cost of the memory.

This interpolation calculation processing can be performed in several ways depending on how many pieces of data (hereinafter also referred to as grid point data) read from the LUT are used, and on what kind of relation grid point data is used. Be distinguished. Typically,
When a large amount of grid point data is used, the interpolation accuracy is improved, but the scale of the circuit or the scale of the software is increased. As an interpolation method having a small circuit scale or the like, for example, Japanese Patent Publication No. 58-161
The four-point interpolation method described in Japanese Patent Publication No. 80 is known. Also, an 8-point interpolation method is known as an interpolation method in which the interpolation accuracy is improved although the circuit scale becomes relatively large. This 8-point interpolation method is described in, for example, Japanese Patent Publication No. Sho 58-1 described above.
No. 6180 is described as a conventional example. In these two exemplified interpolation methods, when the interpolation space is a cubic lattice and an interpolation operation is performed using the lattice point data, the interpolation method having the smallest circuit scale (in this case, the least lattice point data Interpolation method)
And an interpolation method having the largest circuit scale (in this case, a method of interpolating with the most grid point data). That is, as described above, the number of pieces of grid point data when performing the interpolation operation using the three-dimensional cubic grid-like grid point data is four at a minimum and eight at a maximum.

By the way, based on signals of three colors of R, G and B, Yellow (yellow), Cyan (cyan), M
agenta (magenta), Black (black)
When converting into four-color signals (hereinafter, abbreviated as Y, M, C, and K, respectively), interpolation accuracy improves as more lattice point data is used as long as the signals are limited to three colors of Y, M, and C. However, when the signal K is to be obtained by the above-described conversion, if a large amount of grid point data is used, the accuracy may not be improved, but may be reduced.

Hereinafter, the problem of the decrease in accuracy will be specifically described by comparing the generated values of Y and K in the eight-point interpolation method.

First, three color signals (each color (n +
m) bits) by Xi = Xh · 2 ^m + Xf, Yi = Yh ·
2 ^m + Yf, Zi = Zh · 2 ^m + Zf. Here, Xh, Yh, Zh are three color signals Xi,
Xi represents the upper n-bit signals of Yi and Zi, respectively.
f, Yf, and Zf represent lower m-bit signals. On the other hand, L
In the UT, the value of the n-bit signal is Xh = 0,
^{1,2, ..., 2 n -1,} Yh = 0,1,2, ..., 2 n -
The converted color data (grid point data) is stored in correspondence with all combinations (2 ³ⁿ ways) of signals in which 1, Zh = 0, 1, 2,..., 2 ⁿ -1. Grid point data is generally read by a 3n-bit address signal connecting Xh, Yh, and Zh. Hereinafter, the read grid point data is referred to as d (Xh, Yh, Zh).

The color signal data Xi, Y before conversion
signals of lower m bits of i, Zi, that is, Xf, Y
When f and Zf are all “0”, the lattice point data d (Xi, Yi, Z
i) is the converted color data as it is. If at least one of the lower m-bit signals Xf, Yf, Zf is not “0”, the result of the interpolation operation according to the values of Xf, Yf, Zf is converted color data. The unconverted color signal data Xi, Yi, Zi in which the lower m-bit signals Xf, Yf, Zf are not "0" are located inside the cube of eight grid points shown in FIG. 1 as an interpolation space. Can be represented as

Here, for example, m = 4, n = 4, Xi = 0
100 1000, Yi = 01001000, Zi = 0
100 1000 (this color signal data is located at the center of the cube), and L for generating signal data Y
The grid point data read from the UT is d (0100, 0100, 0100) = 56, d (01
01,0100,0100) = 64, d (0100,0
101,0100) = 56, d (0101,0101,
0100) = 64, d (0100, 0100, 010)
1) = 56, d (0101, 0100, 0101) = 6
4, d (0100,0101,0101) = 56, d
If (0101,0101,0101) = 64, the value Y1 of the converted color signal Y is calculated by the following interpolation operation.

[0013]

## EQU1 ## Y1 = (56 + 64 + 56 + 64 + 56 + 64)
+ 56 + 64) / 8 = 60.

The value obtained by this interpolation operation is shown in FIG.
2 on the diagonal passing through the center of the cube shown in
Value of two grid points d (Xh, Yh, Zh) = d (010
0,0100,0100) = 56 and d (Xh + 1, Yh
+ 1, Zh + 1) = d (0101,0101,010)
1) It is an intermediate value of 64, and it can be said that it is an optimum value, judging from the fact that the position of the input color signal data in the cube is the center of the cube.

On the other hand, LU for generating signal data K
The grid point data read from T depends on the minimum value of the input color signal data of the three colors and has, for example, the following distribution.

D (0100,0100,0100) = 5
6, d (0101, 0100, 0100) = 56, d
(0100,0101,0100) = 56, d (010
1,0101,0100) = 56, d (0100,01)
00,0101) = 56, d (0101,0100,0)
101) = 56, d (0100, 0101, 0101)
= 56, d (0101,0101,0101) = 64 In this case, the input color signal similar to the above, that is, the converted color signal K for the input signal located at the center of the cube
Is obtained as follows by the interpolation calculation.

[0017]

K1 = (56 + 56 + 56 + 56 + 56 + 56)
+ 56 + 64) / 8 = 57 Two grid point data d (Xh, Yh, Zh) = d (0100, 0100, 0) on a diagonal line passing through the center of the cube.
100) = 56 and d (Xh + 1, Yh + 1, Zh + 1)
= D (0101,0101,0101) = 64, the optimum value should be 60 as in the case of the signal Y, but almost d (0100,0100,0100) = 5
The value is close to 6, indicating that a large interpolation error occurs.

On the other hand, for example, Japanese Patent Application Laid-Open No. 56-1423
No. 7 proposes an interpolation method using five grid point data in consideration of the generation of the signal K (hereinafter, referred to as a five-point interpolation calculation). The outline will be described below.

When the cube shown in FIG. 1 is divided by the following three planes, three quadrangular pyramids are formed.
It has two grid points.

(Plane 1) (Xh, Yh, Zh), (Xh
+1, Yh + 1, Zh), (Xh + 1, Yh + 1, Zh)
+1) plane (plane 2) (Xh, Yh, Zh), (Xh + 1, Yh,
Zh + 1), a plane passing through three points (Xh + 1, Yh + 1, Zh + 1) (Plane 3) (Xh, Yh, Zh), (Xh, Yh + 1,
The color signal data before plane conversion through three points of (Zh + 1) and (Xh + 1, Yh + 1, Zh + 1) belongs to any one of these three pyramids as an interpolation space. When the color signal data belongs to a boundary surface, the color signal data is assigned to one of two quadrangular pyramids sharing the boundary surface.
Which one of the four pyramids belongs can be determined by the maximum value among three values of Xf, Yf, and Zf. For example,
When Xf> Yf, Zf, the color signal data before conversion is shown in FIG.
Are located within the quadrangular pyramid, and the coordinates of the grid point data used for the interpolation operation are (Xh, Yh, Zh), (Xh + 1, Yh,
Zh), (Xh + 1, Yh + 1, Zh), (Xh + 1,
Yh, Zh + 1), (Xh + 1, Yh + 1, Zh + 1)
Becomes The grid point data for these grid points is set to A, B, D, F, and H, respectively, and the converted data is denoted by K1.
Assuming that (Xi, Yi, Zi), the 5-point interpolation calculation is represented by the following equation.

[0021]

## EQU3 ## K1 (Xi, Yi, Zi) = A + 2 ^-m (Xf (BA) + Yf (DB) + Zf (FB)
+ YfZf (BD-F + H) / Xf} As is clear from the above expression, in the five-point interpolation operation, five multiplications, one division, and ten additions / subtractions are performed.

[0022]

[0005] However, the above 5)
In the point interpolation calculation, although the interpolation error when generating the signal K is reduced, the calculation process includes division, so the calculation circuit or software becomes large-scale, or the calculation is complicated and the process is relatively difficult. The problem of taking a long time is newly derived. Further, in the generation of the other signals M, C, and Y, the number of grid point data used for the calculation is reduced, so that it is impossible to expect an improvement in the interpolation accuracy according to the degree of complexity of the calculation as described above. .

The present invention has been made in view of the above problems, and an object of the present invention is to convert a signal K to be converted.
It is an object of the present invention to provide a data conversion device and a data conversion method capable of improving the interpolation accuracy for generation of the data and suppressing the complexity of the circuit for the interpolation and the prolonged operation time.

[0024]

According to the present invention, there is provided:
A data conversion device for converting n input signals into another signal, wherein the conversion data generation means generates conversion data corresponding to each vertex of an n-dimensional hypercube based on the n input signals, Data changing means for changing at least one of the plurality of pieces of converted data generated by the converted data generating means to data including converted data corresponding to the center of the n-dimensional hypercube; and Data, and conversion data generated by the conversion data generation means, and using conversion data excluding the conversion data before being changed by the data changing means, using the n input signals in the n-dimensional hypercube. And an interpolation operation means for performing an interpolation operation in accordance with a position defined based on the interpolation operation and outputting a result of the interpolation operation.

A data conversion method for converting n input signals into another signal, wherein conversion data corresponding to each vertex of an n-dimensional hypercube is generated based on the n input signals, At least one of the generated plurality of pieces of conversion data is changed to data including the conversion data corresponding to the center of the n-dimensional hypercube, and the change is made between the data after the change and the generated conversion data. Using the converted data excluding the converted data before being performed, performs an interpolation operation corresponding to a position defined based on the n input signals in the n-dimensional hypercube, and outputs the interpolation operation result It is characterized by having each step.

According to the above configuration, n as an interpolation space
Among the conversion data corresponding to the vertices of the three-dimensional hypercube, some of the conversion data is changed to data including the conversion data corresponding to the center of the hypercube, and the data corresponding to the changed data and each of the vertices is changed. Since the interpolation operation is performed using the conversion data excluding the conversion data related to the change in the conversion data, it is possible to improve the interpolation accuracy in data conversion or the like that requires interpolation accuracy with respect to the center conversion data. In addition, it is not necessary to perform complicated calculations including division and the like in order to improve interpolation accuracy.

[0027]

Embodiments of the present invention will be described below in detail with reference to the drawings.

First, the interpolation method used in this embodiment will be described.

<Three-Dimensional Case> In the above description, the grid point data of each vertex of the cube as an interpolation space is represented by A, B, C, D, and D as shown in FIG.
Let E, F, G, H denote the grid point data of the point located at the center of the cube, and let T denote the grid point data, respectively.

In the interpolation method of this embodiment, first, B,
For two grid point data among C, D, E, F, and G, grid point data obtained by extrapolation from other grid point data is used for the interpolation calculation instead of those data. The grid point data obtained by extrapolation is 3
Low-order m-bit data Xf, Yf,
Zf is divided into the following six cases depending on the magnitude relationship between Zf, that is, the position where the interpolation point defined by the three input data exists in the cube.

When Xf ≧ Yf ≧ Zf, E and G When Xf ≧ Zf ≧ Yf, C and G When Zf ≧ Xf ≧ Yf, C and D When Zf ≧ Yf ≧ Xf, B and D Yf ≧ Zf In the case of ≧ Xf, B and F In the case of Yf ≧ Xf ≧ Zf, E and F The positions where the interpolation points indicated above exist, that is, the magnitude relationship of the lower bit data Xf, Yf, Zf of the input data,
The combination with the grid point data obtained by extrapolation is obtained from the following idea.

When the interpolation point is a grid point, the data obtained by the interpolation operation matches the grid point data. In this case,
It is undesirable for this data to be changed by extrapolation. Therefore, the grid point data obtained by extrapolation is
It must be other than a grid point that may be such an interpolation point.

When an interpolation point exists on at least the surface of the interpolated solid as shown in FIG. 3, the grid point data used for the interpolation calculation is more original than the grid point data obtained by the above extrapolation. It can be said that the use of the grid point data is preferable in terms of interpolation accuracy.

The grid point data to be obtained by extrapolation is determined from the above conditions. This will be described more specifically with reference to FIG. For example, if the interpolation point exists in the area of Xf ≧ Yf ≧ Zf, this area is divided into four points A, B, D,
The inside and the surface of the tetrahedron with H as the vertex. Therefore, since points A, B, D, and H may be interpolation points, the grid point data of these points is not changed to those obtained by extrapolation.

Also, of the four faces of this tetrahedron, ΔAB
D and △ BDH share a surface with the surface of the cube ABCDEFHG. That is, △ ABD is a part of □ ABDC, and △ BDH is a part of □ BDHF. In this case, points on the ABDC (including points on the ABD)
Are essentially A, B, D,
Four-point interpolation using the four grid point data C is performed, and these four grid point data are not changed to those obtained by extrapolation. Similarly, since points on the □ BDHF (including points on the △ BDH) are obtained by four-point interpolation using the four grid point data of B, D, H, and F, these four grid point data are also obtained. Changing is not what you want. Therefore, when interpolation points exist in the area of Xf ≧ Yf ≧ Zf, the six points A, B, C, D, F, and H are not changed to grid point data obtained by extrapolation, and the remaining points are not changed. The two pieces of grid point data E and G are data to be changed to data obtained by extrapolation.

As is clear from the above description, in any of the six interpolation areas divided by the lower-order bit data Xf, Yf, Zf, the grid point data to be changed by extrapolation is B, C, E. Any one of G, D, and F is combined, as shown above.

The extrapolation for obtaining the grid point data is performed based on the following equation.

[0038]

B + C + E = 2A + H + α (4T-2A-2H) (1) G + D + F = A + 2H + α (4T-2A-2H) (2) For example, when Xf ≧ Yf ≧ Zf, E and G are obtained by extrapolation. The interpolation calculation is performed by the interpolation formulas (3) and (4), which are modified from the above (1) and (2).

[0039]

E '= 2A + H + α (4T-2A-2H) -BC (3) G ′ = A + 2H + α (4T-2A-2H) -DF (4) where α is 0 or more and 1 or less. This is a constant, which is predetermined in consideration of the accuracy of the interpolation operation and the like. That is,
Three grid points (Xh, Y
h, Zh), (Xh + ／, Yh + ／, Zh + 1)
/ 2) and (Xh + 1, Yh + 1, Zh + 1) have different interpolation contents.

When α = 1, the quadratic interpolation takes the values of A, T, and H at the respective lattice points, and when α = 1/2, the values of A and H take the values of the lattice points at both ends. Next Bezier interpolation, α
When = 0, primary interpolation takes the values of A and H at the lattice points at both ends. When the value is any other value, the interpolation is intermediate between the above-described interpolation contents.

The above equations (1) and (2) are basically derived as linear interpolation based on the relationship between the position vectors of the respective grid points, and will be briefly described below.

Grid data A, B, C, D, E, F,
When the position vectors of the grid points respectively corresponding to G, H and T are expressed as a, b, c, d, e, f, g, h and t, the grid point data B, C,
When the position vectors b, c, and e corresponding to E are represented using, for example, the position vectors a and h, as is clear from the positional relationship shown in FIG.

[0043]

(Ba) + (ca) + (ea) = ha And when you transform this,

[0044]

## EQU7 ## b + c + e = 2a + h. Similarly, for position vectors g, d, and t,

[0045]

## EQU8 ## The relation of g + d + f = a + 2h can be obtained.

On the other hand, from the relationship of 2t = a + h, α (4t
-2a-2h) = 0 is added to the right side of the above two equations, respectively.

[0047]

The following relationship can be obtained: b + c + e = 2a + h + α (4t−2a−2h) g + d + f = a + ah + α (4t−2a−2h) Then, the relations expressed by the above two equations are regarded as the relations of the corresponding grid point data, whereby the above equations (1) and (2) are obtained. That is, the above equations (1) and (2) are obtained as basic equations for linear interpolation.

In the present embodiment, (3),
The grid point data E ', G' obtained by extrapolation based on the equation (4) and the original grid point data A, B, C, D,
A conventional three-dimensional eight-point interpolation operation shown in the following equation is performed from a total of eight grid point data of F and H to obtain conversion data P _O (when Xf ≧ Yf ≧ Zf).

[0049]

P _O = {(2 ^ m-Xf) (2 ^ m-Yf) (2 ^ m-Zf) A + Xf (2 ^ m-Yf) (2 ^ m-Zf) B + (2 ^ m-Xf) Yf (2 ^ m-Zf) C + XfYf (2 ^ m-Zf) D + (2 ^ m-Xf) (2 ^ m-Yf) ZfE '+ Xf (2 ^ m-Yf) ZfF + (2 ^ m-Xf) YfZfG '+ XfYfZfH} / 2 ^ 3m (5) In the above equation, ＾ represents a power.

In the above equation, x = Xf / 2 ＾ m,
If y = Yf / 2 ＾ m and z = Zf / 2 ＾ m, the above equation can be modified as the following equation.

[0051]

P _O = A + x (BA) + y (CA) + z (E′-A) + xy (AB-C + D) + xz (ABE ′ + F) + yz (ACE ′ + G ') + Xyz (-A + B + C-D + E'-FG' + H) (6) In the above equation (5) or (6), the interpolation point is Xf ≧
Although the interpolation formula is in the case of being in the area represented by Yf ≧ Zf, it goes without saying that a similar interpolation formula can be obtained in any of the above six cases.

Here, for example, there is a possibility that the interpolation point may be a point on the achromatic axis in color conversion, for example, Xf = Y
When f = Zf, that is, when x = y = z, the above equation (6) becomes the following equation.

[0053]

P _O = A + (B + C + E'-3A) x + (3A-2B-2C-2E '+ D + F + G') x ^ 2 + (-A + B + C-D + E'-FG'-H) x ^ 3 (7) x = y = z Then, when equations (3) and (4) are substituted into equation (7),

[0054]

P _O = A + {H-A + α (4T-2A-2H)} x + α (2A + 2H-4T) x ^ 2 (8), where α = 1,1 / 2,0 The interpolation formula is as follows.

[0055]

When α = 1, P0 = A + (4T-3A-H) x + (2A + 2H-4T) x ^ 2 (9) When α = 1/2, P0 = A + (2T-2A) x + (A + H-2T) x ^ 2 (10) When α = 0, P0 = A + (HA) x (11) When α = 1, x = 0 and P0 = A, x = 1/2 P1 =
T, a quadratic function of P1 = H at x = 1, α = 1 /
In the case of 2, P = 0 = A when x = 0, and P2 = (A
+ H + 2T) / 4, a quadratic function of P2 = H at x = 1, and when α = 0, P = 0 = A at x = 0, P3 = (A + H) / 2 at x = 1/2, x = 1 Is a linear function of P3 = H.

As described above, the interpolation operation of the present embodiment takes the form of eight-point interpolation (in the case of three-dimensional input) as shown in equation (5) or (6). , High interpolation accuracy can be maintained. At the same time, since the grid point data obtained by the extrapolation is used in the above-mentioned eight-point interpolation, the lattice point data (the data of the center of the interpolation cube) on the achromatic axis related to the generation of the black color data K is used for the extrapolation. ) Can be reflected, and the interpolation error at the time of generating the data K in the color conversion can be reduced.

Next, a second interpolation calculation process (hereinafter simply referred to as a first calculation process) which is equivalent to the above-described interpolation calculation process of the present embodiment (hereinafter, also simply referred to as a first calculation process) and which can simplify a circuit or software. The second arithmetic processing)
This will be described as a modification of the present embodiment.

In the second operation processing, first,

[0059]

Sb = 2A + H + α (4T-2A-2H) -BCE (12) Sd = A + AH + α (4T-2A-2H) -DFG (13) These are added to the original values of the grid point data of the grid point data to be obtained by extrapolation. That is, for example, when Xf ≧ Yf ≧ Zf, the above-mentioned Sb and Sd are added to the grid point data E and G instead of obtaining the grid point data E ′ and G ′ by extrapolation, and a three-dimensional eight-point interpolation calculation is performed. Perform The interpolation formula in this case is as follows.

[0060]

P1 = {(2 ^ m-Xf) (2 ^ m-Yf) (2 ^ m-Zf) A + Xf (2 ^ m-Yf) (2 ^ m-Zf) B + (2 ^ m-Xf) Yf (2 ^ m-Zf) C + XfYf (2 ^ m-Zf) D + (2 ^ m-Xf) (2 ^ m-Yf) Zf (E + Sb) + Xf (2 ^ m- Yf) ZfF + (2 ^ m-Xf) YfZf (G + Sd) + XfYfZfH} / 2 ^ 3m (14) where E + Sb is equal to grid point data E 'obtained by extrapolation, and G + Sd is a similar grid. Since it is equal to the point data G ', it can be said that the above equation (14) is equivalent to the above equation (5) or (6).

The first arithmetic processing and the second arithmetic processing of the present embodiment are not so different in the load on the CPU or the like when performed by software processing.
As will be described later with reference to FIGS. 5 and 6, an example of the second arithmetic processing can be implemented by an additional circuit with a smaller number of circuits.

<Two-Dimensional Case> When the present embodiment is applied to a two-dimensional input case, there is substantially no difference from the above-mentioned three-dimensional input case. In this case, the input data is Xi and Yi, and the interpolation space is also two-dimensional. Then, for the three-dimensional cube described above, the square is the minimum unit of the interpolation space.

As shown in FIG. 4, let A, B, C, and D be grid point data located at each vertex of a square, and let T be grid point data located at the center of the square. At this time, the grid point data obtained by the extrapolation is divided into two cases depending on the magnitude relationship between the lower m-bit data Xf and Yf of the two input data. The number is one.

The extrapolation formulas for the two cases are as follows.

[0065]

(17) When Xf ≧ Yf, C ′ = A + D + α (4T-2A-2D) -B (15) When Yf> Xf, B ′ = A + D + α (4T-2A-2D) − C (16) A total of 4 of the grid point data obtained by extrapolation by the above equation (15) or (16) and the original grid point data A, D, B (or C) without extrapolation A two-dimensional four-point interpolation operation represented by the following equation can be performed using the lattice point data (when Xf ≧ Yf).

[0066]

P9 = {(2 ^ m-Xf) (2 ^ m-Yf) A + Xf (2 ^ m-Yf) B + (2 ^ m-Xf) YfC '+ XfYfD} / 2 ^ 2m (17 The range of α and its meaning are the same as in the case of the above-described three-dimensional input interpolation calculation. That is, the interpolation characteristic on the Xf = Yf axis differs depending on the value of α as follows. (Hereinafter, x = Xf / 2 ＾ m) When α = 1, P9 = A at x = 0 and P9 = A at x = １ ／
T, a quadratic function of P9 = D at x = 1, and α = 1 /
In the case of 2, P9 = A at x = 0 and P9 = (A +
D + 2T) / 4, a quadratic function of P9 = D when x = 1, and when α = 0, P9 = A at x = 0 and P9 at x = １ ／
= (A + D) / 2, where x = 1 and P9 = D.

As in the case of the three-dimensional case, if the above-mentioned arithmetic processing is the first arithmetic processing, the following second arithmetic processing can be considered. That is,

[0068]

## EQU19 ## Sa = A + D + α (4T-2A-2D) -BC (18), and the above Sa is added to the grid point data B or C according to the magnitude relation between Xf and Yf to obtain a two-dimensional 4 Point interpolation calculation can be performed. Thus, the final interpolation formula is as follows.

[0069]

If Xf ≧ Yf, P10 = {(2 ^ m-Xf) (2 ^ m-Yf) A + Xf (2 ^ m-Yf) B + (2 ^ m-Xf) Yf (C + Sa ) + XfYfD} / 2 ^ 2m (19) When Yf> Xf, P11 = {(2 ^ m-Xf) (2 ^ m-Yf) A + Xf (2 ^ m-Yf) (B + Sa) + (2 ^ m-Xf) YfC + XfYfD} / 2 ^ 2m (20)

[0070]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A data conversion device according to one embodiment of the present invention will be described below with reference to the drawings.

<First Embodiment> FIG. 5 is a circuit block diagram of a data conversion apparatus for two-dimensional input.
FIG. 9 shows a circuit in the case where α = 1 in the first arithmetic processing represented by the equation is set.

In FIG. 5, reference numerals 101 and 102 denote terminals for inputting two-dimensional input data Xi and Yi, respectively.
The input data Xi and Yi are separated into upper n-bit data Xh and Yh and lower m-bit data Xf and Yf, respectively. The upper n-bit data Xh and Yh are sent to the address generator 105 and the lower n-bit data Xf and Yf. Yf is the comparison unit 1
07 and the two-dimensional four-point interpolation calculator 109. The comparison unit 107 determines the magnitude relationship between Xf and Yf and outputs a comparison result. The two-dimensional four-point interpolation calculator 109 calculates the above (1)
A two-dimensional four-point interpolation operation is performed by an operation expression represented by the expression (7).

Reference numeral 111 to 114 denote lookup table memories (hereinafter also referred to as LUTs) which hold grid point data of grid points which are vertices of the square in FIG. 4. Reference numeral 115 denotes a point located at the center of the square. This is an LUT that holds grid point data. The LUTs 111 to 114 respectively
Xh and Yh, Xh + 1 and Yh, Xh and Yh + 1, Xh +
1 and Yh + 1 are connected, whereby the grid point data A,
B, C, and D are read. The address given to the LUT 115 is an address signal connecting Xh and Yh as in the memory 111, and grid point data T is read from the LUT 115.

Reference numeral 121 denotes a shifter circuit for quadrupling the output T of the LUT 115, and 123A denotes an extrapolation interpolation operation “4T−
A computing unit that calculates ACD ”, and a computing unit 123B that similarly calculates extrapolation interpolation operation“ 4T-ABD ”.

135 and 137 are provided by the arithmetic unit 123
Limiters 141 for limiting the outputs of B and 123A to a predetermined range, respectively, and 141 is a terminal for outputting converted data.

In the above configuration, LUTs 111 and 1
The grid point data A and D read from 14 are input to the four-point interpolation calculator 109 as they are. On the other hand, the LUT 112
Point data read out from the memory 113 and the arithmetic unit 1
The grid point data as the extrapolation result output from 23A and 123B is selectively input to the four-point interpolation calculation unit 109 by the selectors 132 and 134 according to the output of the comparison unit 107. That is, when the magnitude relationship between the lower-order bit data Xf and Yf satisfies Xf ≧ Yf, the comparing section 107 outputs an “H” signal.
2 and 134 are both L by selecting the H side.
The grid point data B from the UT 112 and the grid point data C ′ = 4T−A−B−D by extrapolation from the calculation unit 123B are 4
The data is input to the point interpolation calculator 109. As a result, the four-point interpolation calculation unit 109 performs the interpolation calculation shown in the above equation (17), and outputs the converted data P9 from the terminal 141.

On the other hand, if Xf <Yf, the comparing section 107 outputs an “L” signal, whereby the selectors 132 and 134 select the L side, and the grid point data C from the LUT 113 and the external data from the calculating section 123A are output. Lattice point data B ′ = 4T−A−C−D by interpolation is input to the four-point interpolation calculation unit 109.

The operation units 123A and 123B
The output data from each of them has a predetermined range (0 to 255 if the grid point data is 8 bits).
, The limiters 135, 137
In the above, it is restricted within the above-mentioned predetermined range.

<Second Embodiment> The present embodiment relates to a second operation process in contrast to the first operation process shown in the first embodiment.
The present invention relates to a data conversion device configured based on the above equations (18), (19) and (20). In this embodiment,
As in the first embodiment, the configuration shown in FIG. 6 limited to the case where α = 1, which is the secondary interpolation characteristic, will be described.

In the structure shown in FIG. 6, the first structure shown in FIG.
The main difference from the arithmetic processing is that Sa calculated by the arithmetic unit 123 is added to grid point data read from the LUT.

That is, the grid point data A, B, C, and D read from the LUTs 11 to 114 are directly input to the arithmetic unit 123.
, On the other hand, the grid point data T read from the LUT 115 is quadrupled by the shifter circuit 121,
The signal is input to the addition terminal of the arithmetic unit 123. As a result, the calculation unit 123 calculates “4T-A-B-C-D-C” as the value of Sa (when α = 1) shown in the above equation (18),
The calculation result is output. The result of this operation is input to the gate circuits 125 and 127.
The gate circuit 127 is controlled by an output signal of the comparison unit 107 according to the magnitude relationship between f and Yf, and the gate circuit 127 is controlled by a signal inverted by the inversion circuit 129 of the output signal of the comparison unit 107. In this case, when Xf ≧ Yf, the comparison unit 10
7, the output signal of the gate circuit 125 is "4T-A-B-C-D", and the output of the gate circuit 127 is "4". 0 ". Thus, the adder 131 adds “4T-A-B-C-D-D” to the grid point data C, and the adder 133 adds “0”. As a result, the four-point interpolation calculator 109 outputs the calculation result shown in the above equation (19). On the other hand, when Yf> Xf,
Conversely, “0” is added in the adder 131 and the adder 13
In 3, “4T-A-B-C-D” for the grid point data B
Is added, and the four-point interpolation calculator 109 outputs the calculation result shown in the above equation (20).

When the circuit configuration of the second embodiment relating to the second arithmetic processing is compared with the circuit configuration relating to the first arithmetic processing shown in FIG. 5, the configuration shown in FIG. 6 of the present embodiment is simpler. It can be realized by a simple additional circuit.

<Third Embodiment> FIG. 7 is a circuit block diagram showing a data converter according to a third embodiment of the present invention.

This embodiment is different from the second embodiment in that the LU
The content of T115 is changed from “T” to “4T-A
−BCD ”to eliminate the need for the arithmetic unit 123. The arithmetically operated data“ 4TABCD ”read from the LUT 115 is used as the gate circuit 1
Other circuit elements are the same as those in the second embodiment except that they are directly input to 25 and 127.

<Fourth Embodiment> FIG. 8 is a circuit block diagram showing a configuration of a data converter according to a fourth embodiment of the present invention.

In the present embodiment, the number of adders and limiters used in the third embodiment is reduced from two to one. In FIG. 8, 133 is an adder, 137
Indicates a limiter. That is, in order to reduce the number of adders and limiters, selectors 151, 152,
153 are provided. Each of these selectors is a comparator 10
When the control signal is "1", each selector selects the terminal on the H side, and when the control signal is "0", each selector selects the terminal on the L side. As a result, when Xf ≧ Yf, the output signal of the comparison unit 107 becomes “1”, and the selector 151 selects the output data “C” of the LUT 113. In response to the selected data “C”, the output data “4T-ABC-
D "is added by the adder 133. The addition result is sent to the H-side terminal of the selector 152 and the L-side terminal of the selector 153 via the limiter 137. At this time, the control signal of the selector is" 1 "as described above. ”, The selector 15
2 selects the above addition result, while the selector 153 selects the output data “B” of the LUT 112.

As a result, four data of “A”, “B”, “4T-A-BD”, and “D” are input to the two-dimensional four-point interpolation calculation unit 109, and the result of the interpolation calculation is obtained. Is terminal 14
1 is output. On the other hand, when Xf <Yf, the two-dimensional four-point interpolation calculation unit 109 similarly outputs “A”, “4”
The four data of T-A-C-D "," C ", and" D "are input, and the result of the interpolation operation is output to a terminal 141.

<Fifth Embodiment> FIG. 9 is a circuit block diagram showing a configuration of a data converter according to a fifth embodiment of the present invention.

The present embodiment relates to the configuration of a data conversion circuit which can handle any value of α not limited to α = 1, and the configuration shown in FIG. 9 is shown in FIG. 6 according to the second embodiment. It is based on configuration. In order to be able to correspond to an arbitrary value of α, the content held in the LUT 115 is “T”
To “2T-A-D” and the multiplier 155
And a calculation unit 157 are newly provided. In the multiplier 155, the data "2T-A-
D is multiplied by 2α, and the arithmetic unit 157 adds “A” and “D” to the multiplication result “α (4T-2A-2D)” and subtracts “B” and “C”. The operation result "A + D + α (4T-2A-2D) -BC" is sent to the gate circuits 125 and 127. Thereafter, the interpolation operation is performed under the same control as in the above-described second embodiment. The calculation result shown in the expression (19) or (20) is the terminal 1
It is output to 41.

In the case of this embodiment, if the configuration is such that the user or the like can arbitrarily set the value of α, the mode of the interpolation calculation is changed according to the type of data used in the data conversion or for each color to be converted. It is also possible to do.

<Sixth Embodiment> FIG. 10 is a circuit block diagram showing a data converter according to a sixth embodiment of the present invention.

In each of the above embodiments, the interpolation operation apparatus for two-dimensional input data has been described.
An interpolation operation device for dimension input data will be described. The present embodiment also relates to a configuration when α = 1, which is a secondary interpolation characteristic, is set.

In FIG. 10, 201, 202 and 2
03 is a terminal for inputting three-dimensional input data Xi, Yi and Zi, respectively. Input data Xi, Yi, Zi
Are separated into upper n-bit data Xh, Xh, Zh and lower m-bit data Xf, Yf, Zf, respectively.
The upper n-bit data Xh, Yh, Zh is sent to the address generator 205, and the lower n-bit data Xf, Xf, Zf are sent to the comparator 207 and the three-dimensional eight-point interpolation calculator 209.

The comparison unit 207 determines the magnitude relation between Xf, Yf, and Zf, and compares the comparison result with X_MAX, Y_MAX, Z
_MAX, X_MIN, Y_MIN, Z_MIN are output. X_MAX is a signal that becomes “1” when Xf is the maximum value, and becomes “0” otherwise, and X_M
IN is a signal that becomes “1” when Xf is the minimum value, and becomes “0” otherwise. Y_MAX, Z_MA
X, Y_MIN and Z_MIN are similar signals.

Reference numerals 211 to 218 denote LUTs for holding grid point data of grid points corresponding to vertices of a cube (see FIG. 3) as an interpolation space. Reference numeral 219 denotes grid point data of a point corresponding to the center of the cube. LUT to be held. LU
Xh, Yh, Zh, and T21-218,
Xh + 1 and Yh and Zh, Xh and Yh + 1 and Zh, Xh +
1 and Yh + 1 and Zh, Xh and Yh and Zh + 1, Xh + 1
, Yh and Zh + 1, Xh and Yh + 1 and Zh + 1, Xh +
1, Yh + 1 and Zh + 1 are provided as eight concatenated address signals, whereby grid point data A, B, C, D, E, F,
G and H are read. The address given to the LUT 219 is an address signal connecting Xh, Yh, and Zh, as in the LUT 211, whereby the lattice point data T of the center point is read from the LUT 219.

221 is a shifter circuit for quadrupling the output T of the LUT 219, 223 and 225 are adders for adding “A + D + F + G” and “B + C + E + H”, and 227 and 229 are each for “4T− (A
+ D + F + G) "and" 4T- (B + C + E + H) ". Gate circuits 231 to 236 gate the result of the subtraction, and each of the gate circuits has an A for the number of bits.
It is composed of ND elements. 241 to 246 are adders for adding data gated by the gate circuits 231 to 236 with respect to the above subtraction result to grid point data;
Reference numeral 6 denotes a limiter for limiting the output of the adder to a predetermined range. Reference numeral 261 denotes a terminal for outputting the calculation result of the 8-point interpolation calculation unit 209 as conversion data.

In the above configuration, LUTs 211 to 21
8, the grid point data A, B, C, D, E,
F, G, H are input to the adder 223 or 225,
Thereby, “A + D + F + G” and “B + C + E + H”
Is calculated, and the addition result is sent to the subtraction terminals of the subtracters 227 and 229. On the other hand, the grid point data T read from the LUT 219 is quadrupled by the shifter circuit 221,
The signals are input to the addition terminals of the subtracters 227 and 229, and “4T− (A + D + F + G)” and “4T− (B + C + E + H)” are calculated by these subtractors, and the subtraction results are sent to the gate terminals 231 to 236. Can be

Each gate circuit has the subtraction result and the comparison unit 2
07 output signals X_MAX, Y_MAX, Z_MAX,
X_MIN, Y_MIN, and Z_MIN are input, so that, for example, when Xf is the maximum value and Zf is the minimum value,
The output of the gate circuit 233 is “4T− (B + C + E +
H), and the output of the gate circuit 236 is “4T− (A + D +
F + G) ”, and the outputs of the other gate circuits are all“ 0. ”In this case, the adder 243 adds the gate output“ 4T− (B + C + E) to the grid point data E.
+ H) ”is added, and the adder 246 adds the grid point data G
Is added to the gate output "4T- (A + D + F + G)". The value added here is the above (12), (13)
This is a value set to α = 1 in the equation. Then, the addition results are sent to the three-dimensional eight-point interpolation calculation unit 209 via the limiters 253 and 256. On the other hand, the grid point data A, B, C, D, F, and H other than the grid point data E and G are input to the three-dimensional eight-point interpolation calculator 209 as they are.

As a result, finally, the eight grid point data input by the three-dimensional eight-point interpolation calculator 209 and the Xf,
The interpolation calculation process shown in the above equation (14) is performed from Yf and Zf, and the calculation result is output to the output terminal 261.

It should be noted that the various configurations of the interpolation arithmetic device for two-dimensional input data described in the third to fifth embodiments can also be applied to the interpolation arithmetic device for three-dimensional input data as in this embodiment. Of course.

<Seventh Embodiment> FIG. 11 is a circuit block diagram showing a configuration of a data conversion circuit according to a seventh embodiment of the present invention.

In this embodiment, “4T” is used instead of the LUT 219 storing the grid point data “T” in the sixth embodiment.
− (A + D + F + G) ”and LUT 272 storing“ 4T− (B + C + E + H) ”
Is used. Thereby, the adders 223 and 22
5 and the subtractors 227 and 229 (see FIG. 10) are not required, but the number of LUTs is increased from nine to ten. However, since the stored data is difference data, the bit width may be small. In this case, in FIG.
The data “4T− (A + D + F +
G) "goes to the gate circuits 231, 232, 233 and L
The data “4T− (B + C + E) read from the UT 272
+ H) "is input to the gate circuits 234, 235, and 236. The other circuit blocks perform the same operations as in the sixth embodiment (see FIG. 10).

In the first to seventh embodiments described above, the hardware configuration capable of performing data conversion at high speed by using the interpolation operation has been described. However, application of the present invention is not limited to the above hardware, and processing equivalent to the above hardware can be executed by software. In this case, the calculation suitable for the hardware configuration is naturally different from the calculation suitable for the software processing, and there is also a calculation part that can be further optimized by using the software processing. Hereinafter, these will be described.

For example, comparing the sixth embodiment with the seventh embodiment, it is more advantageous in terms of processing speed to perform the arithmetic processing according to the configuration of the seventh embodiment in the software processing. In this case, the disadvantage is that “4T− (A + D + F +
G) "or" 4T- (B + C + E + H) "requires an extra memory, but the upper bits of the input data are Xh, Yh, and Zh, each having 4 bits, and having 8 data bits. In the case of bits, the amount of extra memory required to convert and output one color data is 4 k
Bytes, so it is only 16k bytes for 4 colors. In the case of software processing, data can be stored in a low-cost general-purpose memory, so that the above memory capacity is almost negligible.

In the above-described embodiment, the limiter for limiting the grid point data obtained by the extrapolation to the predetermined range in all cases is provided at the subsequent stage of the adder. However, considering the continuity of the color space to be interpolated, the grid point data obtained by extrapolation rarely exceeds the above-mentioned predetermined range, and exceeds this range only in some specific regions of the space. Sometimes. Therefore, by limiting the range in advance to the data corresponding to the unique region held in the LUT, it is possible to prevent the data from exceeding the predetermined range. As a result, all the limiters become unnecessary, and even in software processing, No limiter processing is required.

Note that how to apply the above-mentioned restrictions differs depending on the format of the data held in the LUT. For example, when data relating to the grid point data T is held as T (sixth embodiment: corresponding to FIG. 10), "4T- (A + D + F + G)"
And the case where "4T- (B + C + E + H)" is calculated in advance and is retained (seventh embodiment: corresponding to FIG. 11).

FIGS. 12 and 13 are flowcharts showing a processing procedure for limiting the grid point data T to a predetermined range when the grid point data T is held as it is. Here, the limited range is 0 to 255 (corresponding to 8 bits).

The basic idea of this processing is “T
− (A + D + F + G) ”is replaced with grid point data D, F or G
"T- (B + C + E + H)"
Is added to the maximum value of the grid point data B, C, or E, the value of T is limited so as not to exceed 255, and “T− (A + D + F + G)” is replaced with the grid point data D, When adding to the minimum value of F or G, "T-
In any case where "(B + C + E + H)" is added to the minimum value of the grid point data B, C, or E, the value of T is limited so as not to become smaller than 0.

The processing is described below with reference to FIGS.
This will be described with reference to the flowchart shown in FIG.

Step S3 shown in FIG. 12 and FIG.
The processing from 01 to S343 is performed on all sets of grid point data.

That is, in step S301, first,
Nine grid point data of a certain interpolation cube (A, B, C, D,
E, F, G, H, and T) are read from the memory or the LUT, and in step S303, “4T− (A + D + F + G)”
And "4T- (B + C + E + H)" are calculated, and they are Ta and Tb, respectively. Next, in step S305, the maximum value MAXa of the grid point data D, F, and G and the maximum value MAXb of the grid point data B, C, and E are obtained.

Next, at step S307, Ta + MA
If it is determined that the condition of Xa> 255 and Tb + MAXb> 255 is satisfied, in step S315, the upper limit T1 of T determined by the data A, D, F, G, MAXa
And the upper limit T2 of T determined by B, C, E, H, and MAXb, and the smaller of T1 and T2 is defined as Td.

On the other hand, if the above conditions are not satisfied, it is determined in steps S309 and S311 whether or not the two conditions of Ta + MAXa> 255 and Tb + MAXb> 255 are satisfied. Here, (Ta + MAXa> 25
When 5) holds, in step S317, data A,
The upper limit of T determined by D, F, G, MAXa is set to Td, and when (Tb + MAXb> 255) is satisfied, data B, C, E, H, MA are set in step S319.
Let Td be the upper limit of T determined by Xb. If none of the conditions is satisfied, the process moves to step S321.

The processing in steps S321 to S333 is as follows.
The lower limit of T is obtained in the same manner as in the processing of steps S305 to S319, and is set as Td. If none of the conditions is satisfied until the end, T is set to Td in step S341.

The Td obtained as described above is stored in the LUT or the memory in step S343. Then, in step S345, it is determined whether or not the above processing has been completed for all the grid points. If it is determined that the processing has not been completed, the grid point coordinates are updated in step S347,
Returning to the processing of step S301, when it is determined that the processing has been completed, this processing is completed.

FIGS. 14 and 15 show "4T- (A + D
+ F + G) "and" 4T- (B + C + E + H) "are calculated in advance, and are stored in the LUT in a flowchart showing a processing procedure for restricting these data to a certain range in advance. The range is 0 to 255 as described above.

The basic concept of the processing is that “4T− (A + D + F + G)” is stored in the grid point data D,
Based on the maximum value, “4T− (A +
D + F + G) ”. Also,“ 4T− (A
+ D + F + G) ”so as not to exceed the lower limit of the above-mentioned predetermined range even if added to the minimum value of the grid point data D, F or G.
The lower limit of “4T− (A + D + F + G)” is set based on the minimum value.

In FIG. 14 and FIG.
Reference numerals 301, S303, and S305 correspond to those shown in FIG.
3 is the same as that in FIG. 3, and the same step numbers are assigned.

In step S351, (Ta + MAXa>
It is determined whether or not the condition of (255) is satisfied. When it is determined that this condition is satisfied, Taa is set to 255-Ta in step S353, and this is set to "4T- (A
+ D + F + G) ”. On the other hand, when it is determined that the above condition is not satisfied, in step S355, (Ta)
+ MINa <0) is determined, and
When this condition is satisfied, Ta is determined in step S357.
a is set to -MINa, and this is set to "4T- (A + D + F
+ G) ”. If it is determined that none of the conditions is satisfied, Ta is set to Taa in step S359. The range of“ 4T− (A + D + F + G) ”is limited by the above processing, and is limited. The value Taa is set in step S36.
At 1 the data is stored in the LUT or the memory.

Similarly, in steps S363 to S373, the range of “4T− (B + C + E + H)” is limited, and the limited value Tbb is stored in the LUT or the memory.

Finally, it is determined in step S375 whether or not the above processing has been completed for all the grid points. If not, the grid point coordinates are updated in step S377, and the processing in step S301 is performed. The processing is completed if the processing has been completed.

By performing the above-described processing on the grid point data, the result of adding Taa to D, F, and G is always 0 or more and 255 or less, which is 8 bits. The same applies when Tbb is added to B, C, and E.

[0123]

As described above, according to the present invention, of the conversion data corresponding to each vertex of the n-dimensional hypercube as the interpolation space, some of the conversion data correspond to the center of the hypercube. The data is converted into data including the converted data, and the interpolation operation is performed using the data after the change and the converted data corresponding to each of the vertices excluding the converted data related to the change. In data conversion or the like that requires interpolation precision for data, the interpolation precision can be improved, and complicated calculations including division and the like do not have to be performed to improve the interpolation precision.

As a result, only the multiplication and addition / subtraction are required for the arithmetic processing in the data conversion, and the arithmetic processing time can be reduced. Further, for example, a conventional three-dimensional eight-point interpolation arithmetic circuit or two-dimensional four-point interpolation arithmetic circuit can be used, so that the number of newly designed arithmetic units is reduced.

[Brief description of the drawings]

FIG. 1 is a schematic diagram conceptually showing an interpolation space defined by upper bits of three input data.

FIG. 2 is a schematic diagram conceptually showing a general interpolation space of a five-point interpolation method.

FIG. 3 is a diagram illustrating a positional relationship among lattice point data A, B, C, D, E, F, G, H, and T in a three-dimensional input interpolation space.

FIG. 4 is a diagram showing a positional relationship among grid point data A, B, C, D, and T in a two-dimensional input interpolation space.

FIG. 5 is a diagram showing a circuit configuration of the data conversion device according to the first embodiment of the present invention.

FIG. 6 is a diagram showing a circuit configuration of a data conversion device according to a second embodiment of the present invention.

FIG. 7 is a diagram showing a circuit configuration of a data conversion device according to a third embodiment of the present invention.

FIG. 8 is a diagram showing a circuit configuration of a data conversion device according to a fourth embodiment of the present invention.

FIG. 9 is a diagram showing a circuit configuration of a data conversion device according to a fifth embodiment of the present invention.

FIG. 10 is a diagram showing a circuit configuration of a data conversion device according to a sixth embodiment of the present invention.

FIG. 11 is a diagram showing a circuit configuration of a data conversion device according to a seventh embodiment of the present invention.

FIG. 12 is a diagram illustrating, according to an embodiment of the present invention, grid point data corresponding to a body center in a body-centered cubic grid as an interpolation space;
It is a part of a flowchart showing a procedure of a process of restricting a predetermined range.

FIG. 13 shows another part of the flowchart.

FIG. 14 is a part of a flowchart showing a procedure of a process of restricting, in another embodiment of the present invention, the already-calculated data used in the interpolation calculation to a certain range in advance.

FIG. 15 is another part of the flowchart shown in FIG. 14;

[Explanation of symbols]

101, 102, 201 to 203 Data input terminal 105, 205 Address generation unit 107, 207 Comparison unit 109 Two-dimensional four-point interpolation calculation unit 209 Three-dimensional eight-point interpolation calculation unit 111 to 115 LUT for storing grid point data (two-dimensional data LUT for storing grid point data (for three-dimensional data conversion) 271 and 272 LUT for storing calculated data (for three-dimensional data conversion) 131, 133, 323, 225, 241-246 Adder 227, 229 Subtractor 125,127,231-236 Gate circuit 135,137,251-256 Limiter 132,134,151-153 Selector 141,261 Conversion data output terminal

Claims (12)

[Claims] 1. A data conversion device for converting n input signals into another signal, wherein the conversion device generates conversion data corresponding to each vertex of an n-dimensional hypercube based on the n input signals. Data generation means; data change means for changing at least one of the plurality of pieces of conversion data generated by the conversion data generation means to data including conversion data corresponding to the center of the n-dimensional hypercube; And the conversion data generated by the conversion data generation unit and the conversion data obtained by excluding the conversion data before being changed by the data change unit, and using the n data in the n-dimensional hypercube. And an interpolation operation means for performing an interpolation operation according to a position defined based on the input signals and outputting the interpolation operation result. Over data conversion device. 2. The conversion data generation means includes storage means for storing conversion data corresponding to each vertex of the n-dimensional hypercube, and an address for generating an address of the storage means based on the n input signals. The data conversion device according to claim 1, further comprising a generation unit. 3. The data change means includes: storage means for storing at least conversion data corresponding to the center of the n-dimensional hypercube; and address generation means for generating an address of the storage means based on the n input signals. And means for generating the changed data based on the converted data corresponding to the center read by the address generating means and the data corresponding to each of the vertices. 3. The data conversion device according to 2. 4. The conversion means further comprises an addition means for adding data including at least conversion data corresponding to the center to at least one of the plurality of conversion data generated by the conversion data generation means, 4. The data conversion device according to claim 1, wherein the data after the change is generated by an adding unit. 5. The change data specifying means for determining the at least one conversion data to be changed in accordance with a position defined based on the n input signals in the n-dimensional hypercube. The data converter according to claim 1, further comprising: 6. The change data specifying unit includes a comparison unit that determines a magnitude relationship between values defined by a part of each of the n input signals, and the change unit specifies the change according to a determination result of the comparison unit. The data conversion apparatus according to claim 5, wherein the at least one conversion data to be performed is determined. 7. The data after the change by the change means,
The data according to any one of claims 1 to 6, wherein the data is obtained by extrapolation using the converted data excluding the converted data before the change and the converted data corresponding to the center. Data converter. 8. The conversion means further includes a subtraction means for multiplying the conversion data corresponding to the center by an integer and then subtracting a part or all of the plurality of conversion data from the integer-multiplied conversion data. The data conversion device according to claim 3, further comprising: 9. The storage device according to claim 1, wherein said storage means is a look-up table or a single memory.
9. The data conversion device according to any one of claims 8 to 8. 10. The apparatus according to claim 1, wherein said adding means includes an adder for adding data to be added to the converted data, and a limiter for limiting the addition result to a predetermined range. 5. The data conversion device according to 4. 11. The interpolating means is a two-dimensional four-point interpolating circuit, a three-dimensional eight-point interpolating circuit, or an n-dimensional two n-point interpolating circuit. 11. The data conversion device according to any one of 1 to 10. 12. A data conversion method for converting n input signals into another signal, comprising: generating conversion data corresponding to each vertex of an n-dimensional hypercube based on the n input signals; Changing at least one of the generated plurality of pieces of conversion data into data including conversion data corresponding to the center of the n-dimensional hypercube; and changing the data out of the changed data and the generated conversion data. Using the converted data excluding the converted data before being performed, performs an interpolation operation corresponding to a position defined based on the n input signals in the n-dimensional hypercube, and outputs the interpolation operation result A data conversion method having each step.