JPH1084395A - Automatic frequency control circuit for frequency shift keying receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To allow a control circuit to have a provision for a frequency shift keying signal with a wide shift width without being affected by a content of a modulation code. SOLUTION: A frequency shift keying signal inputted to a frequency discriminator 5 is fed via a low pass filter 6 to a comparator 7, in which the signal is compared with an output from a reference voltage generator 8 and from which a rectangular wave is obtained. The comparator output is given to a clock recovery circuit 14 and a pulse generating circuit 16, from which a sampling pulse is obtained and the pulse is multiplied with the comparator output by a multiplier 13 and the product is converted into a DC voltage via a loop filter 12. The voltage denotes an error with respect to a reference shift width. The voltage is multiplied with the comparator output by a multiplier 11, from which a correction signal whose amplitude is the error voltage is obtained and fed to an adder/subtractor 10, in which the reference shift width is corrected. As a result, a frequency error signal whose shift width is corrected is obtained and the signal is used to control a VCO 19 via a loop filter 18 so as to correct a center frequency error.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a circuit configuration technology for configuring an automatic frequency control circuit (hereinafter, referred to as an AFC circuit) in a frequency shift keying receiver (hereinafter, referred to as an FSK receiver). .

[0002]

2. Description of the Related Art In an FSK receiver, a code distortion occurs in a demodulated signal unless the center of the FSK signal is made to coincide with the center of the frequency discriminator. However, generally, there are frequency errors in the received signal frequency, the local oscillator frequency, the center frequency of the frequency discriminator, and the like, and an AFC circuit that corrects these frequency errors is used.

[0003] This AFC circuit is, for that purpose, FSK.
It must be operated to reduce the center frequency error of the signal to the frequency discriminator. However, since the FSK signal itself is a signal whose frequency changes to f0 or f1 depending on the modulation code “0” or “1”, the occurrence probability of the code information “0” and “1” in the conventional AFC circuit Accordingly, it follows the moving average frequency between f0 and f1 determined by the above. Therefore, NRZ (Non Return to Zero)
If “0” or “1” is continuously transmitted in a code or the like for a long time, the AFC circuit converges to one of the frequencies, causing a large error.

[0004] As a method for avoiding this adverse effect, there is a method using a Manchester code, a method using a scrambler / descrambler or the like to always keep the moving average frequency near the center frequency irrespective of the modulation code.

The Manchester code is a method in which each bit of information is converted into a two-bit zero-balanced code and transmitted. Since the moving average value is always at the center, the AFC circuit can be used without providing a protection circuit. Does not malfunction. However, since the transmission bandwidth is twice as large as that of the NRZ code, the transmission efficiency is extremely low.

On the other hand, in the method using a scrambler / descrambler, a code to be transmitted is randomized, transmitted, and after reception, the random component is removed and the code is restored. In this method, since the code is randomized, the moving average frequency is maintained substantially at the center, and, similarly to the above, the protection circuit for the AFC circuit is not particularly required. However, this method requires special circuits such as a scrambler (transmitting side) and a descrambler (receiving side), and causes a problem in codes transmitted until the scramble operation starts.

[0007] In such a method without using a protection circuit,
There are various advantages and disadvantages, and at present, various AFCs for FSK have been devised.

For example, as one example, a positive peak hold circuit and a negative peak hold circuit are provided at the output of the frequency discriminator, and an attempt is made to detect a center frequency error from an average value of both outputs. This method works well while the keying is being performed properly, but when a continuous transmission of "1" or "0" occurs, the hold circuit on the non-continuous side gradually discharges. Also, it is gradually pulled down to the frequency of the continuously transmitted code, so that the moving average frequency cannot be maintained at the center.

Another example is disclosed in Japanese Patent Application Laid-Open No. Hei 7-23595.
4: There is a circuit disclosed in a demodulation correction circuit for an FSK receiver. In this example, normally, the output of the frequency discriminator is subjected to waveform shaping into a rectangular wave as a demodulated output in addition to a comparator and the like, and is fed back to a local oscillator for frequency conversion (VCO: voltage controlled oscillator) at the preceding stage to form an AFC. Is done. In this state, as described above, control is performed so that the moving average value that changes depending on the modulation code becomes zero. However, in this method, the moving average value is obtained from the comparator output, and the moving average value is subtracted from the control voltage. Detect the correct center frequency error. Then, the VCO
Is to control. Hereinafter, this operation will be described with reference to FIG.

In FIG. 1, FIG. 1 (a) shows an example when there is no center frequency error, and FIG. 1 (b) shows an example when there is a center frequency error (FIG. 1 (c) will be described later). The output waveform e is a comparator output waveform (which is simply abbreviated as a comparator output waveform, but is actually a waveform obtained by attenuating the comparator output waveform to have an amplitude equal to the discriminator output amplitude). The difference between the moving average values of the two waveforms, that is, the difference between the two smoothed outputs, is the difference between the two (e−d).
= F), it is apparent from the waveform f of this difference that if the amplitudes of d and e are equal,
The waveform of the difference f is converted into a waveform irrelevant to the code length. If there is a frequency error, it can be seen from the waveform f of FIG.

Accordingly, the error voltage obtained by smoothing the waveform f in FIG. 1 is zero regardless of the code content when there is no error in the center frequency, and when the center frequency has an error, the error voltage is proportional to the error frequency. An ideal operation of generating a voltage can be expected.

However, this ideal operation is performed only when the amplitudes of d and e are equal (that is, only when a certain shift frequency width and a certain discriminator sensitivity are satisfied). In other cases, the contents of the modulation code are affected.

[0013]

In the conventional AFC, F
The function of detecting the frequency error with respect to the center frequency and correcting the frequency error irrespective of the content of the modulation code, which is the original purpose of the AFC for the SK receiver, has not been realized in every state. Therefore, the present invention provides an AFC circuit that detects and corrects the center frequency error without being affected by the contents of the modulation code, and that also supports an FSK signal having a wide range of shift width.

[0014]

According to the method described in Part 2 of the prior art, it is possible to correctly follow the center frequency without being affected by the content of the modulation code because of a specific shift frequency width and a specific discrimination. As described above, it is only at the time of instrument sensitivity. Such a condition occurs in this method because the amplitude of the rectangular wave as a reference signal applied to the subtractor is constant even if the shift frequency width or the discriminator sensitivity changes. Therefore, according to the present invention, the tracking control is performed so that the amplitude of the reference signal always becomes the same as the output of the discriminator. As a result, even if the FSK signal has a different shift frequency width, or if there is a slight error in the modulator sensitivity or the discriminator sensitivity, the modulation code content is not affected.
An FC circuit can be configured.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The principle and embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a circuit diagram of an FSK receiver using an AFC circuit according to one embodiment of the present invention. In FIG. 2, 1 is an input terminal of an FSK signal, 2 is a frequency converter,
3 is a 1F (intermediate frequency) amplifier, 4 is a limiter (amplitude controller), 5 is a frequency discriminator, 6 is a low-pass filter, 7
Is a comparator, 8 is a reference voltage generator, 9 is an attenuator, 1
0 is an adder / subtractor, 11 is a multiplication terminal, 12 is a loop filter, 13 is a multiplier, 14 is a clock recovery circuit, 15 is a demodulation output terminal, 16 is a pulse generator, 17 is a sampler, 1
8 is a loop filter, 19 is a VCO (voltage controlled oscillator)
It is.

The FSK signal applied to the input terminal 1 is converted to an IF by a frequency converter 2, amplified by an IF amplifier 3 and applied to a frequency discriminator 5, where it is frequency-detected and converted to a baseband signal. Become. This signal is applied to a comparator 7 through a low-pass filter 6, where it is compared with a reference voltage from a reference voltage generator 8, converted into a rectangular wave, and output to a demodulation output terminal 15.

The operation will be described below with reference to the waveform diagrams of FIGS. FIG. 4 shows an example in which there is no error in the center frequency but an error in the shift frequency width, and FIG. 5 shows an example in which both the center frequency and the shift frequency width have errors. In both figures, the number assigned to each waveform indicates that it is the same numbered circuit output of FIG.

The output of the low-pass filter 6 is applied to an adder / subtractor 10 together with the comparator 7. Addition and subtraction are
As shown in FIG. 3, various circuit configurations are possible, but the operation is the same in all cases.
(A) will be described. The input / output numbers of the circuit in FIG. 3 indicate that the circuits are connected to the same numbered circuits in the circuit in FIG.

First, when there is no center frequency error shown in FIG. 4, reference numeral 7 denotes a comparator output waveform, and reference numeral 20 denotes an output waveform of the subtracter 20 (FIG. 3). The output of the comparator is applied to the attenuator 9, where a reference shift width signal for determining the reference shift width is set. The reference shift width is defined as a value when the discriminator output for the FSK signal having the shift width most likely to be used or the shift width of the center value of the various shift widths becomes equal to the output amplitude of the attenuator 9. The shift width is determined by the amplitude of the rectangular wave output from the attenuator 9. Therefore, although the frequency discriminator sensitivity and the comparator output amplitude are related correctly, the amplitude of the output rectangular wave of the attenuator 9 becomes a reference of the shift width correction loop. Is referred to as a reference shift width signal. FIG. 4 shows that in this expression,
7 is an output waveform of each unit when a signal having a shift narrower than a reference shift width is received. The subtracter 20 subtracts the output of the low-pass filter 6 (dotted waveform 6 in FIG. 4) from the output of the subtracter 21, and the subtracter 21 subtracts the output of the multiplier 11 from the output of the attenuator 9. + Written on the input side of the subtractor in FIG.
“-” Indicates a method of subtraction and a method of subtraction. 4 in FIG.
Means that the output of the multiplier 11 is zero, that is, the shift width correction loop (comprising the subtractor 20, the sampler 17, the multiplier 13, the loop filter 12, the multiplier 11, and the subtractor 21) has not yet performed the correction operation. 3 shows the waveforms of FIG.

Reference numeral 14 denotes a clock waveform reproduced from a comparator output waveform, and reference numeral 16 denotes a sampling pulse created from the clock waveform. In the sampler 17, the output waveform of the subtracter 21 is sampled by the sampling pulse 16, so that the output of the sampler 17 is as shown in FIG. This waveform is multiplied by the comparator output waveform 7 in the multiplier 13, and as a result, as shown in FIG. 13, the pulse becomes only a positive polarity pulse in this case. This pulse is smoothed by the loop filter 12 at the next stage, and
Is converted to a DC voltage as shown in FIG. This voltage represents an error with respect to the reference shift width (error voltage in the shift width correction loop), as can be understood from the above description. Therefore, when this voltage is multiplied by the output waveform of the comparator, a correction signal (a signal for correcting the output of the subtractor 21) having the error voltage as its amplitude is obtained as shown at 11 in FIG. Therefore, if this correction signal is added to the subtractor 21 to correct the reference shift width, the correction is normally performed at 2 in FIG.
Correction is performed as indicated by the dotted line 1 '.

As a result, the output of the subtractor 20 becomes as shown at 20 ', and a frequency error signal in which the error of the frequency shift width is corrected is obtained. However, in the case of FIG. 4, since there is no center frequency error as assumed at first, even if this 20 'waveform is smoothed by the loop filter 18 and added to the VCO,
No control over the center frequency is generated. In this manner, the correction for the shift frequency error is performed.

In the case of the circuit shown in FIG. 3C, the attenuator 9 can be omitted by selecting the resistance value.

Next, a case where there is an error in both the center frequency and the shift width shown in the example of FIG. 5 will be described. As shown at 6 in FIG. 5, it is assumed that the output of the low-pass filter 6 is slightly shifted in the positive voltage direction because there is an error in the center frequency, and the output of the subtracter 21 is (Same as 21 in FIG. 4).

Further, when there is a center frequency error, there is a slight error before and after the conversion point timing of the comparator output waveform, which is reproduced by the averaging function of the clock reproduction circuit into a clock of the correct timing. And Then, the output of the sampler 17 and the multiplier 13
Since the output, the output of the loop filter 12 and the output of the multiplier 11 are as shown in the same figure in FIG. 5, the output of the subtracter 21 is corrected as indicated by a dotted line 21 ′.
The output of the subtracter 20 is corrected as shown in FIG.
As is clear from the comparison with the lower waveform in FIG. 1B, the waveform of 20 'has already been corrected for the shift frequency error component and has left the center frequency error component. The VCO is controlled by the component through the loop filter 18, and the center frequency error is corrected.

In this way, the errors in the shift width and the center frequency are corrected respectively.

If the control system is of type 0 (there is no integrator (in this case,
In the case of () determined by the type of the loop filter), an error of the reciprocal of the loop gain remains, so that the influence of the modulation code can be improved in accordance with the loop gain. Of course, one control system
It goes without saying that an ideal operation can be expected if the type is used (one integrator). However, if the loop gain is increased to some extent even in the 0 type, it is practically sufficient. It is for the following reasons. That is, in the case of type 0, since there is no integrator, the influence of the moving average value due to the occurrence probability of the sign “1” or “0” is still affected. However, in the present invention, since the reference shift width is set, the control is stopped at this position even in the worst case.

[0028]

As described in detail above, the normal F
Since the AFC for SK receivers has a property of following the moving average frequency of the FSK signal, the transmission of a normal NRZ code is affected by the content of the code and is likely to cause a code error. For this reason, various methods have been used in which the AFC itself is devised or the operation is added to the transmission code, but each has advantages and disadvantages. On the other hand, according to the present invention, it becomes possible to have the ability to follow only the center frequency without being affected by the code content even for FSK signals of various shift widths. An FSK receiver that does not cause malfunction by AFC can be configured.

[Brief description of the drawings]

FIG. 1 is a waveform diagram for explaining an operation of a control method of a conventional example.

FIG. 2 is a circuit configuration diagram for explaining one embodiment of the present invention.

FIG. 3 is a circuit configuration diagram illustrating a configuration example of an adder / subtractor that is a part of the circuit illustrated in FIG. 2;

FIG. 4 is a waveform diagram showing an embodiment according to the present invention when the center frequency has no error and the shift frequency width has an error.

FIG. 5 is a waveform diagram showing one embodiment according to the present invention when there is an error in both the center frequency and the shift frequency width.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 signal input terminal 2 frequency converter 3 IF amplifier 4 limiter 5 frequency discriminator 6 low-pass filter 7 comparator 8 reference voltage generator 9 attenuator 10 adder / subtractor 11 multiplier 12 loop filter 13 multiplier 14 clock recovery circuit 15 demodulation output terminal 16 Pulse generator 17 Sampler 18 Loop filter 19 VCO 20 Subtractor 21. Subtractor

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Kazuo Kawai 1-15-8 Hosen, Hodogaya-ku, Yokohama

Claims (1)

[Claims] 1. An automatic frequency control circuit for a frequency shift keying receiver which obtains a demodulated signal by adding an output of a frequency shift keying signal input to a frequency discriminator to a waveform shaping circuit to obtain a demodulated signal. And compares the output waveform of the frequency shift keying signal input to the attenuated rectangular waveform obtained by attenuating the output of the waveform shaping circuit to a predetermined amplitude with a rectangular wave obtained by correcting a control error due to the magnitude of the frequency shift width. A first control loop that drives the voltage controlled oscillator to adjust the center frequency of the frequency shift keying signal input to the frequency discriminator to the center frequency of the frequency discriminator; and a bit obtained by reconstructing the smoothed output from the demodulated signal. By multiplying the demodulated signal by the pulse signal sampled by the clock pulse and smoothing the multiplied output, A second control loop for correcting an attenuated rectangular waveform of the first control loop by using an error voltage with respect to a set value of a shift width of the frequency shift keying signal obtained by the frequency shift keying. Automatic frequency control circuit for receiver.