JPH1079296A - El display device and its driving circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To decrease a luminance unevenness of electroluminescence device, protect the destruction of inner transistor device or the like in such a case that the connection of electroluminescence device is put into release condition, and reduce a noise caused by vibration which electroluminescence device emits. SOLUTION: An electroluminescence display device is provided with a step-up circuit 10 stepping up a voltage of a direct current power source 2 by accepting a pulse signal generated as an output by an oscillation circuit 6; switching means 20 consisting of first - fourth MOSFETs 21-24 and a turnover voltage equipment 25 while being connected with the set-up circuit 10; an electroluminescence device 1 connected with output terminals X, Y of the switching means 20; and a voltage detection circuit transmitting a control signal which indicates the switching procedure to the switching means 20. The step-up circuit 10 comprises a series circuit in which a coil 11 and a diode 12 are connected in series with each other, and a step-up transistor 13 in which a control electrode accepts a pulse signal and a principal electrode is connected with a common connector of the series circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a drive circuit for an electroluminescence (hereinafter abbreviated as EL) element and an EL display device using the drive circuit, and more particularly to a booster coil and a semiconductor integrated circuit device. It relates to a combined display device.

[0002]

2. Description of the Related Art In recent years, an EL display device using an EL element for a backlight or for displaying characters or the like has been used for a dial of a wristwatch or a display plate of a portable information device.

Hereinafter, a conventional EL display device will be described with reference to the drawings.

FIG. 10 is a circuit diagram showing an EL display device using a conventional EL element driving circuit. In FIG.
Reference numeral 51 denotes an EL element for causing the display panel to emit light; 52, a DC voltage source; 53, a coil for boosting the DC voltage source 52 to generate an applied voltage to be applied to the EL element 51; Is a diode for preventing the application of a voltage. Region 10 integrated on semiconductor substrate
At 0, reference numeral 55 denotes a boosting transistor composed of an N-channel type MOS whose source electrode is grounded, reference numeral 56 denotes an oscillation circuit whose output terminal is connected to the gate electrode of the boosting transistor 55, and which determines the switching frequency of the boosting transistor 55, and reference numeral 57 denotes A frequency dividing circuit 60 for inverting the polarity of the voltage applied to the EL element 51 and determining the frequency of the AC signal when generating the AC signal, and inverting the polarity of the voltage applied to the EL element 51 to generate the AC signal It is a switching circuit.

The switching circuit 60 has a drain electrode connected to the cathode of the diode 54, a source electrode connected to the first output terminal X or the second output terminal Y, and a polarity of the voltage applied to the EL element 51. A first N-channel MOS transistor 61 and a second N-channel MOS transistor 62, which are switches for inverting the gate, a source electrode is grounded, and a drain electrode is connected to a source electrode of the first N-channel MOS transistor 61. A third N-channel MOS transistor 63 having a gate electrode commonly connected to the gate electrode of the second N-channel MOS transistor 62; a source electrode grounded; and a drain electrode connected to the second N-channel MOS transistor 62. The MOS transistor 62 is connected to the source electrode and the gate electrode is connected to the first N Yan'neru type MOS transistor 61
A fourth N-channel MOS transistor 64 connected in common with the gate electrode of the first and third N-channel MOS transistors 61 and 63; a signal applied to the gate electrodes of the first and third N-channel MOS transistors 61 and 63; And an inverter 65 for inverting the polarities of signals applied to the gate electrodes of the four N-channel MOS transistors 62 and 64, respectively.

In FIG. 10, an N-channel type M
Arrows added to symbols representing OS transistors 61 and the like indicate source electrodes, and similar arrows are added in other drawings.

[0007] The operation of the EL display device configured as described above will be described below. As shown in FIG. 10, the gate voltage V56 applied to the gate electrode of the boost transistor 55
Is determined by the oscillation circuit 56, and the time change of the gate voltage V56 is shown in FIG. In FIG. 11, T
Indicates the cycle of the gate voltage V56, and V65 indicates the oscillation circuit 5
6 shows the output voltage of the inverter 65 determined by the oscillation frequency of No. 6 and the frequency division ratio of the frequency dividing circuit 57. Here, the output voltage V
The frequency of 65 is about 400 Hz. At this time, if the dividing ratio of the dividing circuit 57 is set to, for example, 1/16,
The cycle of the output voltage V65 is 16T. T shown in FIG.
= 0 to 8T (period a in the figure), the output voltage V65 is at a low level, and the second and third N-channel MOS transistors 62 and 63 are turned off.
First and fourth N-channel MOS transistors 6
1, 64 are turned on. At this time, the second output terminal Y to the EL element 51 becomes GND, and the first output terminal X becomes, for example, 5
The voltage is boosted to about 0 to 80V.

V51 shown in FIG. 11 is a second output terminal Y
Shows the voltage applied to the EL element 51 on the basis of. During the period of t = 8T to 16T (period b in the figure), the output voltage V65 of the inverter 65 is at a high level, so that the second and third N-channel MOS transistors 62 and 63 are turned on, and the first And the fourth N-channel MOS transistors 61 and 64 are turned off. At this time, the applied voltage V51 of the EL element 51 is discharged through the drain-source conductive path of the third N-channel MOS transistor 63, and, contrary to the period a, the first output terminal X to the EL element 51 Becomes GND, and the second output terminal Y is boosted.

As described above, the conventional EL display device raises the voltage applied to the EL element 51 and inverts the polarity in accordance with the cycle determined by using the oscillation circuit 56 and the frequency dividing circuit 57. It is composed of a circuit.

[0010]

However, the driving circuit of the conventional EL display device inverts the polarity of the voltage applied to the EL element at a predetermined cycle (= 8T).
It has the following three problems.

First, when a plurality of EL elements are used in a display device, the voltage applied to each EL element fluctuates in accordance with the variation in the capacitance of each EL element. Has the problem that This conventional luminance unevenness will be described with reference to the drawings. FIG. 12 shows a change in the voltage applied to the EL element due to a variation in the capacitance of the conventional EL element itself. In FIG. 12, the solid line is E
The voltage applied to the EL element when the capacitance value of the L element is relatively small is shown, and the broken line shows the voltage applied to the EL element when the capacitance value of the EL element is relatively large.
As shown in FIG. 12, according to a conventional driving circuit, in a display device including a plurality of EL elements,
The voltage applied to the EL elements varies by about ± 20% due to the variation in the capacitance of the elements, so that the luminance of each EL element is not the same, and the luminance unevenness occurs on the entire display surface of the device.

Second, when the EL element is exchanged or the connection of the EL element is disconnected for some reason, the capacitance which is much larger than the transistor is lost, and the capacitance is inversely proportional to the voltage. Further, since the drain voltage of the transistor rises so as to exceed the withstand voltage of the transistor, the transistor is broken.
That is, when the EL element is replaced or when the connection of the EL element is disconnected for some reason, the first to fourth N-channel MOS transistors 61 to 64 in the switching circuit 60 are set as loads on the drive circuit shown in FIG. And only the capacitance of the drain electrode is several pF to several tens of pF.
F, which is extremely small as compared with the capacitance value of the EL element 51 of 1000 pF or more, the drain voltage of each of the N-channel MOS transistors 61 to 64 exceeds the drain withstand voltage by the applied voltage boosted by the coil 53. It will be boosted.

Third, as shown in FIG. 12, the waveform of the applied voltage to the EL element has a steep falling portion from the boosted voltage to 0 V when the polarity is switched. Therefore, since the frequency at which the polarity is switched is around 400 Hz, the steep falling portion of the waveform of the applied voltage is E
There is a problem that vibration is applied to the L element to generate noise. In particular, in mobile communication devices such as mobile phones and other electronic devices that are defective when noise occurs during use, reduction of the vibration sound of the EL element is desired, and improvement of the waveform of the voltage applied to the EL element is indispensable. It has become.

A first object of the present invention is to reduce luminance unevenness of an EL element, and to prevent destruction of an element such as an internal transistor when the connection of the EL element is left open. A third object is to reduce noise due to vibration generated by the EL element.

[0015]

In order to achieve the first or second object, the invention according to claim 1 provides an EL display device,
Boosting signal generating means for boosting a power supply voltage in response to a pulse signal to generate a boosting signal; and, when the boosting signal is input, outputting a first output signal and inverting the polarity of the boosting signal. A switching means for outputting a second output signal; an EL element connected to an output side of the switching means; a first output signal received from the switching means; A voltage detection circuit that outputs a control signal to the switching means based on a voltage to invert the polarity of a second output signal of the switching means.

According to the structure of the first aspect, the voltage detecting means is connected to the switching means for generating an AC signal for driving the EL element, and the voltage detecting means receives the first output signal from the switching means. Since the switching means is controlled based on the predetermined voltage of the first output signal, the polarity of the second output signal of the switching means is inverted when the predetermined voltage is reached regardless of time. The variation in the magnitude of the application voltage is suppressed.

According to a second aspect of the present invention, in the configuration of the first aspect, the step-up signal generating means includes a series circuit in which a coil and a diode are connected in series at a connection portion, and a main electrode connected to the series circuit. And a control electrode connected to the booster transistor and having a control electrode receiving the pulse signal.

According to a third aspect of the present invention, in the configuration of the first aspect, an oscillation circuit for outputting the pulse signal to the boosting signal generating means is further provided, and the switching means has a transistor. The signal generating means includes a diode having a cathode connected to the main electrode of the transistor of the switching means, and a coil having one end connected to the voltage source and the other end connected to the anode of the diode at a connection portion. A series circuit, a main electrode connected to a connection portion of the series circuit, a control electrode including a boosting transistor receiving the pulse signal, and a control signal output by the voltage detection circuit is a control electrode of a transistor of the switching means. Is added.

In order to achieve the third object, the invention according to claim 4 is characterized in that the second output signal of the switching means has a configuration in which the output waveform is dulled to the configuration of claims 1 to 3. Is what you do.

According to the fourth aspect of the present invention, since the output waveform of the second output signal of the switching means for generating the AC signal for driving the EL element is dull, the steep fall of the applied voltage is gentle. Become.

According to a fifth aspect of the present invention, in order to achieve the third object, the switching means is connected in series between the switching means and the EL element and discharged from the switching means. And a configuration further including a resistor for delaying the discharge time of the electric charge.

According to the fifth aspect of the present invention, the switching means for generating an AC signal for driving the EL element comprises a charge connected to the EL element via a resistor connected in series between the switching means and the EL element. Is discharged, the output waveform at the time of the discharge is slowed down due to the delay caused by the resistance component of the resistor, so that the steep fall of the applied voltage becomes gentle.

In order to achieve the first or second object,
According to a sixth aspect of the present invention, there is provided a driving circuit for a display device, comprising: a first N-channel MOS having drain electrodes connected to each other
A transistor and a second N-channel MOS transistor, a source electrode is grounded, a drain electrode is connected to a source electrode of the first N-channel MOS transistor, and a gate electrode is the second N-channel MOS transistor.
A third N-channel MOS transistor connected to the gate electrode of the S transistor; a source electrode grounded; a drain electrode connected to the source electrode of the second N-channel MOS transistor; and a gate electrode connected to the first N-channel MOS transistor. A fourth N-channel MOS transistor connected to the gate electrode of the N-channel MOS transistor, a first output terminal connected to the drain electrode of the third N-channel MOS transistor, A switching circuit having a second output terminal connected to the drain electrode of the N-channel MOS transistor; and receiving the input of output signals from the first output terminal and the second output terminal of the switching circuit; The first and fourth N-channel type MOs in a circuit
A common gate electrode of the S transistor and the second and third
And a voltage detection circuit for transmitting control signals having phases opposite to each other to a common gate electrode of the N-channel MOS transistor.

According to the configuration of claim 6, the switching circuit for generating an AC signal for driving the EL element is connected to a voltage detection circuit for receiving an output signal of the switching circuit and outputting a control signal to the switching circuit. Therefore, since the polarity of the output signal of the switching circuit is inverted based on the output signal of the switching circuit regardless of time, E
Variations in the magnitude of the AC voltage for driving the L element are suppressed.

According to a seventh aspect of the present invention, in the configuration of the sixth aspect, in the voltage detection circuit, the voltage polarity of the control signal is inverted when an output signal of the switching circuit exceeds a predetermined voltage. It is to be added.

In order to achieve the third object, an eighth aspect of the present invention is to add a configuration in which the output signal of the switching circuit has a dull output waveform to the configuration of the sixth or seventh aspect. is there.

According to the eighth aspect of the present invention, the output signal of the switching circuit for generating the AC signal for driving the EL element has a slowed output waveform, so that the steep fall of the applied voltage becomes gentle.

According to a ninth aspect of the present invention, there is provided a power supply apparatus according to the sixth or seventh aspect, further comprising a circuit between the switching circuit and at least one of the first and second output terminals. A configuration is further added that further includes a resistor connected in series and delaying a discharge time of the electric charge discharged from the switching circuit.

According to the ninth aspect of the present invention, the switching circuit for generating the AC signal for driving the EL element is discharged through the resistor connected in series between the switching circuit and the EL element. The output waveform at that time is delayed due to the resistance component of the resistor and becomes dull, so that the steep fall of the applied voltage becomes gentle.

[0030]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described with reference to the drawings.

FIG. 1 shows an EL according to a first embodiment of the present invention.
FIG. 3 is a circuit diagram illustrating an EL display device using a driving circuit. In FIG. 1, reference numeral 1 denotes an EL element that causes a display panel to emit light, 2 denotes a DC voltage source, 10 denotes a booster circuit as a booster signal generating unit that boosts the DC voltage source 2 and generates an applied voltage to be applied to the EL element 1. Reference numeral 20 denotes a switching circuit as switching means for generating an AC signal by inverting the polarity of the voltage applied to the EL element 1, and 30 denotes a region integrated on a semiconductor substrate.

The booster circuit 10 includes a coil having one end connected to the DC voltage source 2, an anode connected to the other end of the coil 11, a cathode connected to the switching circuit 20, and an opposite voltage to the coil 11. , A source electrode is grounded, and a drain electrode as a main electrode is connected to the coil 11 and the diode 1.
And a step-up transistor 13 made of an N-channel MOS connected to the common connection of the two.

Reference numeral 6 denotes an oscillating circuit whose output side is connected to a gate electrode as a control electrode of the boosting transistor 13, whose input side is connected to the DC voltage source 2, and which determines the switching frequency of the boosting transistor 13. Is connected to the DC voltage source 2, the other input terminal is connected to the first output terminal X and the second output terminal Y for connection of the EL element 1, the output terminal is connected to the switching circuit 20, and the EL element 1 Is a voltage detection circuit for detecting a predetermined voltage as a first output signal for inverting the polarity of an applied voltage with respect to.

The switching circuit 20 has a drain electrode connected to the cathode of the diode 12 in the booster circuit 10 and a source electrode connected to the first output terminal X or the second output terminal X.
, A first N-channel MOS transistor 21 and a second N-channel MOS transistor 22 which are switches for inverting the polarity of the voltage applied to the EL element 1 and a source electrode are grounded, A third N-channel MOS transistor 23 having a drain electrode connected to the source electrode of the first N-channel MOS transistor 21 and a gate electrode commonly connected to the gate electrode of the second N-channel MOS transistor 22 And the source electrode is grounded, the drain electrode is connected to the source electrode of the second N-channel MOS transistor 22, and the gate electrode is connected to the first N-channel MOS transistor 22.
A fourth N-channel MOS transistor 24 commonly connected to the gate electrode of the S transistor 21 and a control signal output from the voltage detection circuit 7 are input, and the first and third N-channel MOS transistors 21, An inverter 25 for inverting the polarities of the control signal applied to the gate electrode 23 and the control signals applied to the gate electrodes of the second and fourth N-channel MOS transistors 22 and 24, respectively. Have been. Note that a potential difference generated between the first output terminal X and the second output terminal Y corresponds to a second output signal.

In this embodiment, the drive circuit of the EL display device includes at least the switching circuit 20 and the voltage detection circuit 7.

Hereinafter, the operation of the EL display device having the driving circuit configured as described above will be described.

FIG. 2 is a timing chart of the driving circuit according to the first embodiment of the present invention.
V7 indicates an output signal of the voltage detection circuit 7, and V1 indicates a voltage applied to the EL element 1 with reference to the second output terminal Y to the EL element 1. As shown in FIG. 2, during a period in which the output signal V7 of the voltage detection circuit 7 is at a high level (period a in the drawing), the first and fourth N
The channel type MOS transistors 21 and 24 are turned on, and the second and third N-channel type MOS transistors 22 and 23 are turned off. At this time, the second output terminal Y of the two output terminals to the EL element 1 shown in FIG.
D, the first output terminal X is boosted by the coil 11 and the boosting transistor 13, and has an applied voltage of, for example, 50 to 80 V. When the applied voltage V1 reaches the predetermined voltage + VP, the voltage detection circuit 7 detects the voltage, and this time is low until the voltage detection circuit 7 detects the predetermined voltage (-VP) (period b in the figure). A level signal V7 is output.
At this time, contrary to the period a, the first and fourth N-channel MOS transistors 21 and 24 are turned off, and EL
The electric charge accumulated in the element 1 is discharged through the third N-channel MOS transistor 23, and the first
Output terminal X becomes GND, and the voltage output from the second output terminal Y by the coil 11 and the boost transistor 13 appears.

The predetermined voltage VP is applied to the N-channel MO
It is set to be equal to or less than the withstand voltage of each drain of the S-type transistors 21 to 24 and equal to or less than the withstand voltage of the EL element 1.

As the voltage detection circuit, a circuit using a Zener diode, a circuit using resistance division, a comparator, or the like can be considered, but a circuit using a high-precision and inexpensive Zener diode is preferable. In this case,
Variations in the applied voltage V1 to the EL element 1 can be suppressed to variations in the characteristics of the Zener diode itself.

As described above, according to the present embodiment, it is monitored that the voltage applied to the EL element 1 in the voltage detection circuit 7 is raised to the predetermined voltage VP without depending on time, and the predetermined voltage VP is monitored. Since the polarity of the applied voltage V1 of the EL element 1 is inverted when detected, it is assumed that an EL element having a relatively large capacitance indicated by a solid line and an EL element having a relatively small capacitance indicated by a broken line in FIG. Also, since the maximum value of the absolute value of the applied voltage V1 of each EL element is substantially the same, uneven brightness does not occur in a display device including a plurality of EL elements. Here, the variation in the capacitance of each element appears in the time axis direction, but since the alternating current is about 400 Hz, the variation in the time axis direction does not affect the display.

The predetermined voltage VP detected by the voltage detection circuit 7 is equal to N-channel MOS transistors 21 to 24.
Are set to be equal to or less than the drain withstand voltage of the EL element 1 and to be equal to or less than the withstand voltage of the EL element 1. Therefore, even when the EL element 1 is replaced or the connection of the EL element 1 is disconnected for some reason, each transistor constituting the drive circuit Is not applied with a voltage equal to or higher than the predetermined voltage VP, the transistors are not destroyed.

Although a MOS transistor is used as the boosting transistor 13, the present invention is not limited to this, and may be a bipolar transistor.

Hereinafter, a second embodiment of the present invention will be described with reference to the drawings.

FIG. 4 shows an EL device according to a second embodiment of the present invention.
FIG. 3 is a circuit diagram illustrating an EL display device using a driving circuit. In FIG. 4, the same components as those of the EL display device shown in FIG. As a new component, as shown in FIG. 4, a common connection point between the source electrode of the first N-channel MOS transistor 21 and the drain electrode of the third N-channel MOS transistor 23 in the switching circuit 20 and the first output A resistor 8 is connected in series with the terminal X.
In FIG. 4, V4A represents the voltage at the common connection point between the source electrode of the first N-channel MOS transistor 21 and the drain electrode of the third N-channel MOS transistor 23, and V4B represents the voltage at the first output terminal X. V4C represents the voltage at the common connection point between the source electrode of the second N-channel MOS transistor 22 and the drain electrode of the fourth N-channel MOS transistor 24, that is, the voltage of the second output terminal Y; V4D is EL
It represents the potential difference between the first output terminal X and the second output terminal Y, which is the applied voltage of the element 1, that is, the difference between V4B and V4C.

Hereinafter, the operation of the EL display device configured as described above will be described. As described in the first embodiment, in FIG. 4, the frequency of the gate voltage of the boosting transistor 13 of the boosting circuit 10 depends on the output signal of the oscillation circuit 6. Therefore, the first and fourth N-channel MOS transistors 21 and 24 are turned on, and the second and third N-channel MOS transistors 22 and 23 are turned on.
Is in the off state, the first N-channel type M is provided by the coil 11 of the booster circuit 10 and the booster transistor 13.
The voltage V4A of the source electrode of the OS transistor 21 is boosted, and the voltage V4C of the second output terminal Y becomes 0V.

This situation will be specifically described with reference to the drawings. While the voltage V4A shown in FIG. 5A is being boosted, the voltage V4C shown in FIG. 5C remains at 0V.
Further, as shown in FIG. 5B, the voltage V4B after passing through the resistor 8 causes a voltage drop by the resistor 8, and when the voltage V4B is further increased to a predetermined voltage VP, The voltage detection circuit 7 shown in FIG. 3 detects the predetermined voltage VP and inverts the control signal. Receiving the control signal,
And fourth N-channel MOS transistors 21 and 21
4 is turned off, and the second and third N-channel type MOS
Since the transistors 22 and 23 are turned on, FIG.
The voltage V4C shown in FIG. 5A is boosted, and the voltage V4A shown in FIG.
Becomes 0V. At this time, as shown in FIG. 5B, since the voltage V4B is discharged through the resistor 8, the voltage V4B is integrated by the product of the capacitance component of the EL element 1 and the resistance component of the resistor 8, so that the voltage V4B rises. The falling waveform slows down.

Next, when the voltage V4C shown in FIG. 5 (c) is boosted to the predetermined voltage VP, the ON / OFF of each transistor is reversed again, and the voltage V4A shown in FIG. 5 (a) is boosted. . At this time, the voltage V4C falls to 0V, and the voltage V4B instantaneously drops to the minus potential by the voltage drop of the voltage V4C, and then starts increasing.

As shown in FIG. 5D, the applied voltage V4D applied to the EL element 1 is the difference between the voltages V4B and V4C. Therefore, the voltage waveform of the applied voltage V4D changes from the boosted voltage VP to 0V. The falling part of is blunted. Further, the maximum value V of the absolute value of the applied voltage V4D of the EL element 1 is obtained.
P is the same as when the resistor 8 is not provided, and EL
The luminance of the element 1 is not reduced.

As described above, according to the present embodiment, the voltage detection circuit 7 is provided, and the voltage detection circuit 7 monitors that the voltage applied to the EL element 1 is raised to the predetermined voltage VP, and detects the predetermined voltage VP. When the detection is performed, the polarity of the applied voltage V4D of the EL element 1 is reversed. Therefore, even if the EL element having a relatively large capacity and the EL element having a relatively small capacity are mixed, the applied voltage V4D of each EL element is mixed. Are substantially the same, and thus a display device including a plurality of EL elements does not have luminance unevenness.

The predetermined voltage VP is an N-channel MOS.
It is set to be equal to or less than the withstand voltage of each drain of the type transistors 21 to 24 and equal to or less than the withstand voltage of the EL element 1, and the voltage detection circuit 7 monitors the predetermined voltage VP which is the maximum value of the applied voltage V4D. When replacing 1 or E
Even if the connection of the L element 1 is disconnected for some reason, a voltage equal to or higher than the predetermined voltage VP is not applied to each transistor constituting the drive circuit, so that each transistor is not destroyed.

Further, since the resistor 8 is provided in series between the switching circuit 20 and the first output terminal X, a steep falling waveform of the applied voltage V4D caused by generating an AC signal is delayed. Accordingly, the vibration can be reduced, so that the vibration generated by the EL element can be reduced. As a result, noise due to vibration is suppressed.

Further, since the delay can be performed while maintaining the predetermined voltage VP, noise can be reduced without lowering the luminance of the EL element.

To reduce the vibration sound of the EL element, that is, the driving sound, the resistance of the resistor 8 is set to several kΩ,
0 V from the boosted voltage in the voltage waveform applied to L element 1
The fall time up to the above may be set to several tens μsec.

FIG. 6 is a circuit diagram showing an EL display device according to a first modification of the second embodiment, in which a resistor 8 is connected between the switching circuit 20 and the first output terminal X instead. FIG. 4 is a circuit diagram in a case where the switching circuit is connected in series between a switching circuit and a second output terminal. Voltage V4A shown in FIG.
Indicates the voltage of the source electrode of the second N-channel MOS transistor 22. In this case, as shown in the output signal waveform diagram of FIG.
4C causes a voltage drop by the resistor 8 and is discharged through the resistor 8, so that the falling waveform is slowed down. Therefore, as shown in FIG.
4C, and the voltage waveform of the applied voltage V4D of the EL element 1 has a blunted falling portion from the boosted voltage VP to 0V. Thereby, the same effect as that of the second embodiment can be obtained.

FIG. 8 is a circuit diagram showing an EL display device according to a second modification of the second embodiment, in which a first resistor 8A is connected between a switching circuit 20 and a first output terminal X. Are connected in series, and a second resistor 8B is connected in series between the switching circuit 20 and the second output terminal Y. FIG. The voltage V4A shown in FIG.
The voltage of the source electrode of the channel type MOS transistor 21 is shown, and the voltage V4E is the voltage of the source electrode of the second N-channel type MOS transistor 22. In this case, as shown in the output signal waveform diagram of FIG. 9B, the voltage V4B after passing through the first resistor 8A is discharged through the first resistor 8A, and As shown in the output signal waveform diagram of (c), the voltage V4C after passing through the second resistor 8B is discharged through the second resistor 8B.
Since the falling waveforms respectively become dull, as shown in FIG. 9E, the voltage waveform of the applied voltage V4D of the EL element 1 becomes dull at the falling portion from the boosted voltage VP to 0V. Thereby, the same effect as that of the second embodiment can be obtained. As shown in the output signal waveform diagrams of FIGS. 9B and 9C, when the voltage is boosted, the voltage starts dropping after the voltage instantaneously drops.

By the way, when a resistor is inserted between the driving circuit and the output terminal in the conventional EL display device,
The following problems occur.

FIG. 13 is a circuit diagram showing an EL display device in which a conventional driving circuit is provided with a resistor for reducing noise. FIG.
In the figure, the same components as those of the EL display device shown in FIG. As a new component, as shown in FIG. 13, a common connection point between the source electrode of the first N-channel MOS transistor 61 and the drain electrode of the third N-channel MOS transistor 63 in the switching circuit 60 and the first output A resistor 58 is connected in series with the terminal X. In FIG. 13, V5A is a first N-channel type M
The voltage at the common connection point between the source electrode of the OS transistor 61 and the drain electrode of the third N-channel MOS transistor 63 is shown, V5B is the voltage of the first output terminal X, and V5C is the second N-channel MOS transistor. Source electrode of transistor 62 and fourth N-channel type MO
V5 represents the voltage at the common connection point of the drain electrodes of the S transistors 64, that is, the voltage of the second output terminal Y;
D is a potential difference between the first output terminal X and the second output terminal Y, which is the applied voltage of the EL element 1, that is, V5B and V5C
And the difference between the two.

The operation of the conventional EL display device having such a configuration will be described. First, in FIG. 13, when the first and fourth N-channel MOS transistors 61 and 64 are on and the second and third N-channel MOS transistors 62 and 63 are off, the booster circuit 10 The voltage V of the source electrode of the first N-channel MOS transistor 61 is determined by the coil 53 and the boost transistor 55.
5A is boosted, and the voltage V5C of the second output terminal Y is 0 V
Becomes

This will be described with reference to the drawings. FIG.
While the voltage V5A shown in FIG.
The voltage V5C shown in (c) remains at 0V. Further, as shown in FIG. 14B, the voltage V5B after passing through the resistor 58 causes a voltage drop due to the resistor 58, so that the voltage V5B is (Va−V
The voltage drops by b).

Next, after a predetermined time t1 determined by the frequency dividing circuit 57, the first and fourth N-channel MOS transistors 61 and 64 are turned off, and the second and third N-channel MOS transistors 62 and 62 are turned off. Since the switch 63 is turned on, the voltage V5C shown in FIG.
V5A shown in (a) becomes 0V. At this time, FIG.
As shown in (b), since the voltage V5B is discharged through the resistor 58, the capacitance component of the EL element 51 and the resistor 58
, The falling waveform is dull.

Next, as shown in FIGS. 14A and 14C, after a lapse of the next predetermined time t1, the on / off of each transistor is reversed again, the voltage V5A is boosted, and
The voltage V5C falls to 0V, and the voltage V5C shown in FIG.
5B instantaneously drops to a negative potential by the voltage drop of V5C and then starts to boost.

As shown in FIG. 14D, the EL element 51
Applied voltage V5D is voltage V5B, voltage V5C
In the voltage waveform of the applied voltage V5D, the falling portion from the boosted voltage to 0V is blunted.

As described above, since the sharp voltage waveform at the falling portion which causes the conventional driving noise of the EL element 51 can be delayed, noise is reduced.

However, as shown in FIG. 14D, the voltage V5D applied to the EL element 51 is reduced by the voltage drop (Va-Vb) caused by the provision of the resistor 58.
Since it is lower than that of a conventional EL display device in which the resistor 58 is not provided, there is a disadvantage that the display brightness is reduced.

As shown in the circuit diagram of the EL display device in FIG. 15, even when the resistor 58 is connected in series to the second output terminal Y side instead of the first output terminal X side. ,
As shown in FIG. 16D, the applied voltage V
It can be seen that 5D is reduced by the voltage drop (Va−Vb) due to the resistor 58, as compared with the conventional EL display device without the resistor 58.

As shown in the circuit diagram of the EL display device shown in FIG. 17, the first resistor 58A is connected to the first output terminal X.
Side, and the second resistor 58B is connected to the second
18 is connected in series to the output terminal Y side of FIG.
As shown in (e), the applied voltage V5D of the EL element 51
Are compared with a conventional EL display device in which the first resistor 58A and the second resistor 58B are not provided.
It can be seen that the voltage drops by 2 × (Va−Vb) by 8B.

On the other hand, the EL of the first embodiment
According to the EL display device of the second embodiment in which a resistor is added to the display device, since the predetermined boosted voltage does not decrease, noise can be reduced without lowering the luminance of the EL element. .

[0068]

According to the EL display device of the first aspect, the voltage detecting means determines the polarity of the second output signal when the first output signal of the switching means reaches a predetermined voltage regardless of time. Is inverted, the variation in the magnitude of the applied voltage for driving the EL element is suppressed, so that the luminance unevenness on the display surface is suppressed.

Since the voltage is inverted when the applied voltage reaches a predetermined voltage, even when the output terminal to the EL element is released, the predetermined voltage is set to be equal to or less than the withstand voltage of the transistor constituting the switching means. Then, the transistor is not destroyed.

According to the EL display device of the second aspect, the boosting signal generating means includes a series circuit in which a coil and a diode are connected in series at a connection portion, and a main electrode connected to a connection portion of the series circuit. Since the control electrode is constituted by the boosting transistor receiving the input of the pulse signal, the voltage of the DC voltage source can be surely boosted.

According to the EL display device of the third aspect, an oscillation circuit for outputting a pulse signal to the boost signal generation means, a series circuit and a drain in which a coil and an anode of a diode are connected in series at a connection portion. Since the electrode is provided with the boost signal generating means including the boost transistor connected to the connection portion, the voltage of the DC voltage source can be reliably boosted.

The first output signal output from the switching means is input to the input side of the voltage detection circuit, and the control signal output from the voltage detection circuit is input to the control electrode of the transistor of the switching means. The voltage detection circuit can reliably detect the voltage of the first output signal and can reliably invert the polarity of the second output signal from the switching means.

According to the EL display device of the present invention, since the output waveform of the second output signal of the switching means for generating an AC signal for driving the EL element is dull, the applied voltage is steep. Since the gentle fall becomes gentle, vibration of the EL element caused by the AC component of the applied voltage can be reduced. As a result, noise due to vibration is suppressed.

According to the EL display device of the present invention, since the resistor is connected between the switching means and the EL element and delays the discharge time of the electric charge discharged from the switching means, the switching is provided. The output waveform at the time of discharging the second output signal in the means can be easily and reliably blunted by the signal delay generated from the resistance component of the resistor.

According to the driving circuit of the display device of the present invention, since the polarity of the output signal of the switching circuit is inverted based on the output signal of the switching circuit irrespective of time, the alternating current for driving the EL element is obtained. Since the variation in the magnitude of the voltage is suppressed, the uneven brightness on the display surface is suppressed.

According to the drive circuit of the display device of the present invention, when the output signal of the switching circuit exceeds a predetermined voltage in the voltage detection circuit, the voltage polarity of the control signal is inverted, so that the switching circuit Can reliably output an AC signal of a predetermined voltage to the EL element.

Further, since the applied voltage is inverted when it exceeds a predetermined voltage, even when the output terminal to the EL element is opened, the predetermined voltage is set to be equal to or less than the withstand voltage of the transistor constituting the switching means. Then, the transistor is not destroyed.

According to the display device driving circuit of the eighth aspect of the present invention, the output signal of the switching circuit for generating an AC signal for driving the EL element has a steep output waveform, so that the applied voltage is steep. Since the fall becomes gentle, the vibration of the EL element caused by the AC component of the applied voltage is reduced, and as a result, noise due to the vibration is suppressed.

According to a ninth aspect of the present invention, the display device driving circuit further includes a resistor connected between the switching circuit and the EL element for delaying a discharge time of the electric charge discharged from the switching circuit. Therefore, the output waveform of the output signal at the time of discharge in the switching circuit can be easily and reliably blunted by a signal delay generated from the resistance component of the resistor.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an EL display device using an EL drive circuit according to a first embodiment of the present invention.

FIG. 2 is a timing chart of output signals of an oscillation circuit, an output terminal, and a voltage detection circuit of the EL display device according to the first embodiment of the present invention.

FIG. 3 is a diagram illustrating the EL of the driving circuit according to the first embodiment of the present invention.
4 is a graph showing an output signal applied to the device.

FIG. 4 is a circuit diagram showing an EL display device using an EL drive circuit according to a second embodiment of the present invention.

FIG. 5 shows a signal waveform of an output signal of an EL drive circuit according to a second embodiment of the present invention, and (a) is a graph showing a voltage waveform between a switching circuit and a resistor;
(B) is a graph showing a voltage waveform of a first output terminal to which a resistor is connected, (c) is a graph showing a voltage waveform of a second output terminal to which no resistor is connected,
(D) is a graph showing a signal waveform composed of a difference between the first output terminal and the second output terminal.

FIG. 6 is a circuit diagram showing an EL display device using an EL drive circuit according to a first modification of the second embodiment of the present invention.

FIG. 7 shows a signal waveform of an output signal of an EL drive circuit according to a first modification of the second embodiment of the present invention, and (a) is a graph showing a voltage waveform between a switching circuit and a resistor. (B) is a graph showing a voltage waveform at a second output terminal to which a resistor is connected, (c) is a graph showing a voltage waveform at a first output terminal to which no resistor is connected, (D) is a graph showing a signal waveform composed of a difference between the first output terminal and the second output terminal.

FIG. 8 is a circuit diagram showing an EL display device using an EL drive circuit according to a second modification of the second embodiment of the present invention.

FIG. 9 shows a signal waveform of an output signal of an EL drive circuit according to a second modification of the second embodiment of the present invention, wherein (a) shows a voltage waveform between a switching circuit and a first resistor; (B) is a graph showing the voltage waveform of the first output terminal to which the first resistor is connected, and (c) is a graph showing
Is a graph showing a voltage waveform at a second output terminal to which the second resistor is connected, (d) is a graph showing a voltage waveform between the switching circuit and the second resistor,
(E) is a graph showing a signal waveform composed of a difference between the first output terminal and the second output terminal.

FIG. 10 is a circuit diagram showing an EL display device using a conventional EL drive circuit.

FIG. 11 is a timing chart of output signals of an oscillation circuit, a frequency divider, and an output terminal of a conventional EL display device.

FIG. 12 is a graph showing an output signal applied to an EL element of a conventional driving circuit.

FIG. 13 is a circuit diagram showing an EL display device in which a resistor is provided in a conventional EL drive circuit.

14 shows a signal waveform of an output signal when a resistor is provided in a conventional EL drive circuit, and FIG. 14 (a) is a graph showing a voltage waveform between a switching circuit and a resistor;
(B) is a graph showing a voltage waveform of a first output terminal to which a resistor is connected, (c) is a graph showing a voltage waveform of a second output terminal to which no resistor is connected,
(D) is a graph showing a signal waveform composed of a difference between the first output terminal and the second output terminal.

FIG. 15 is a circuit diagram showing an EL display device in which a resistor is provided in a conventional EL drive circuit.

FIG. 16 shows a signal waveform of an output signal when a resistor is provided in a conventional EL drive circuit, and (a) is a graph showing a voltage waveform between the switching circuit and the resistor;
(B) is a graph showing a voltage waveform of a second output terminal to which a resistor is connected, (c) is a graph showing a voltage waveform of a first output terminal to which no resistor is connected,
(D) is a graph showing a signal waveform composed of a difference between the first output terminal and the second output terminal.

FIG. 17 shows a conventional EL drive circuit including a first resistor and a second resistor.
FIG. 2 is a circuit diagram showing an EL display device provided with the resistor of FIG.

FIG. 18 shows a conventional EL drive circuit including a first resistor and a second resistor.
Shows the signal waveform of the output signal when the resistor of
(A) is a graph showing a voltage waveform between a switching circuit and a first resistor, and (b) is a graph showing a voltage waveform at a first output terminal to which the first resistor is connected. , (C) is a graph showing a voltage waveform of a second output terminal to which the second resistor is connected, and (d) is a graph showing a voltage waveform between the switching circuit and the second resistor. FIG. 7E is a graph showing a signal waveform composed of a difference between the first output terminal and the second output terminal.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 EL element 2 DC voltage source 6 Oscillation circuit 7 Voltage detection circuit 8 Resistor 8A 1st resistor 8B 2nd resistor 10 Boost circuit (boost signal generation means) 11 Coil 12 Diode 13 Boost transistor 20 Switching circuit (switching) Means 21 first N-channel MOS transistor 22 second N-channel MOS transistor 23 third N-channel MOS transistor 24 fourth N-channel MOS transistor 25 inverter 30 integrated on a semiconductor substrate Area X First output terminal Y Second output terminal

Claims (9)

[Claims] A boosting signal generating means for boosting a power supply voltage in response to a pulse signal to generate a boosting signal; receiving the boosting signal, outputting a first output signal; A switching unit for inverting the polarity and outputting a second output signal; an EL element connected to an output side of the switching unit; a first output signal received from the switching unit when the first output signal is input; By outputting a control signal to the switching means based on a predetermined voltage of the output signal of
And a voltage detection circuit for inverting the polarity of the second output signal of the switching means.
Display device. 2. The boosting signal generating means includes: a series circuit in which a coil and a diode are connected in series at a connection portion; a main electrode connected to a connection portion of the series circuit; 2. The EL display device according to claim 1, comprising a boosting transistor receiving an input. 3. An oscillator circuit for outputting the pulse signal to the boosting signal generating means, wherein the switching means has a transistor, wherein the boosting signal generating means has a cathode which is a transistor of the switching means. A series circuit consisting of a diode connected to the main electrode of the first circuit, a coil having one end connected to the voltage source and the other end connected to the anode of the diode at a connection portion, and a main electrode connected to the series circuit. And a control electrode having a boosting transistor receiving the pulse signal, wherein a control signal output from the voltage detection circuit is input to a control electrode of a transistor of the switching means. 3. The EL display device according to claim 1. 4. The EL display device according to claim 1, wherein an output waveform of the second output signal of the switching means is blunted. 5. The semiconductor device according to claim 1, further comprising a resistor connected in series between said switching means and said EL element, for delaying a discharge time of a charge discharged from said switching means. 4. The EL display device according to any one of claims 1 to 3. 6. A first N-channel MOS transistor and a second N-channel MOS transistor having drain electrodes connected to each other, a source electrode grounded, and a drain electrode connected to said first N-channel MOS transistor. A third N-channel MOS transistor having a gate electrode connected to the gate electrode of the second N-channel MOS transistor, a source electrode grounded, and a drain electrode connected to the second N-channel MOS transistor. A fourth N-channel MOS transistor having a gate electrode connected to the source electrode of the channel-type MOS transistor and a gate electrode connected to the gate electrode of the first N-channel MOS transistor; A first output terminal connected to the drain electrode; 4, a switching circuit having a second output terminal connected to the drain electrode of the N-channel MOS transistor, and receiving input of output signals from the first output terminal and the second output terminal of the switching circuit; A common gate electrode of the first and fourth N-channel MOS transistors in the switching circuit and the second and third N-channel MOS transistors;
A drive circuit for a display device, comprising: a common gate electrode of a channel type MOS transistor; and a voltage detection circuit for transmitting control signals of opposite phases to each other. 7. The display device according to claim 6, wherein in the voltage detection circuit, when an output signal of the switching circuit exceeds a predetermined voltage, a voltage polarity of the control signal is inverted. Drive circuit. 8. The output signal of the switching circuit, the output waveform of which is dulled.
Or the driving circuit of the display device according to 7. 9. A resistor connected in series between the switching circuit and at least one of the first and second output terminals for delaying a discharge time of charges discharged from the switching circuit. The driving circuit for a display device according to claim 6, wherein the driving circuit is provided.